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<title>Tianocore/edk2-platforms.git/Silicon/SiFive, branch CodeCleanup</title>
<subtitle>EDK II sample platform branches and tags (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup'/>
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<updated>2023-04-17T10:18:55+00:00</updated>
<entry>
<title>Platform/Siliocn: Fix building failure caused by wrong lib.</title>
<updated>2023-04-17T10:18:55+00:00</updated>
<author>
<name>Evan Chai</name>
<email>evan.chai@intel.com</email>
</author>
<published>2023-04-06T05:24:23+00:00</published>
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<id>urn:sha1:ea10112eebb3b8a51e0e7bc62643a60277152717</id>
<content type='text'>
RiscVSbiLib was implemented in MdePkg/Library/BaseRiscVSbiLib.

Cc: Daniel Schaefer &lt;git@danielschaefer.me&gt;
Cc: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Cc: Andrei Warkentin &lt;andrei.warkentin@intel.com&gt;
Signed-off-by: Evan Chai &lt;evan.chai@intel.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>Silicon/SiFive: Fix build error</title>
<updated>2022-02-18T06:10:30+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2022-01-21T08:04:14+00:00</published>
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<id>urn:sha1:1d547f349b3c7f739a7d627cf8b44d4db0fc0dd2</id>
<content type='text'>
Fix the build error caused by the spelling correction.

Signed-off-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Cc: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Cc: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>Platform/SiFive: CoreInfoHob uses RiscVFirmwareContextLib</title>
<updated>2021-11-10T06:50:03+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2021-06-18T10:25:58+00:00</published>
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<id>urn:sha1:a25cda6f75690904051976b4dcea1519581a6cb7</id>
<content type='text'>
CoreInfoHob uses RiscVFirmwareContextLib to get the
pointer of FirmwareContext.

Cc: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Cc: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Signed-off-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Reviewed-by: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
</content>
</entry>
<entry>
<title>Silicon/RISC-V: Update old SMBIOS struct filed name</title>
<updated>2020-12-22T06:05:26+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2020-12-22T05:56:16+00:00</published>
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<id>urn:sha1:884efae1e043f13e8745aeba9f50dd60e044f93a</id>
<content type='text'>
The "ProcessorManufacture" field of SMBIOS_TABLE_TYPE4 was recently
renamed to "ProcessorManufacturer". This is causing a compilation
error for RISC-V/SiFive builds. Switch to the new name.

Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Abner Chang &lt;abner.chang@hpe.com&gt;
Cc: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Cc: Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Signed-off-by: Mark Salter &lt;msalter@redhat.com&gt;
Reviewed-by: Abner Chang &lt;abner.chang@hpe.com&gt;
</content>
</entry>
<entry>
<title>Silicon/SiFive: Handle case of NULL FirmwareContext</title>
<updated>2020-10-02T01:34:47+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2020-10-02T01:34:47+00:00</published>
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<id>urn:sha1:b728a4ef5038fc457797fc0b6f84a4391bea86c7</id>
<content type='text'>
Abort creating the SMBIOS HOBs if there's no firmware context to get the
information from.
Turn SbiLib functions for getting mscratch into VOID since they can never
practically fail.

Signed-off-by: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Reviewed-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Cc: Abner Chang &lt;abner.chang@hpe.com&gt;
Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
</content>
</entry>
<entry>
<title>Silicon/SiFive: fix RELEASE builds of U54 PeiCoreInfoHobLib</title>
<updated>2020-08-30T13:28:13+00:00</updated>
<author>
<name>Leif Lindholm</name>
<email>leif@nuviainc.com</email>
</author>
<published>2020-08-29T13:15:19+00:00</published>
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<id>urn:sha1:50639477fc0f27749eeabb98966c5825f0e653e3</id>
<content type='text'>
In function CreateU54E51CoreProcessorSpecificDataHob(), the
FirmwareContext variable gets initialized an ASSERT_EFI_ERROR
macro, meaning the initialization gets folded out for RELEASE
builds. Use a temporary variable for the ASSERT instead.

Fixes a build error of both u540 and u500 with gcc 8.3.

Cc: Abner Chang &lt;abner.chang@hpe.com&gt;
Cc: Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Cc: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Signed-off-by: Leif Lindholm &lt;leif@nuviainc.com&gt;
Reviewed-by: Abner Chang &lt;abner.chang@hpe.com&gt;
</content>
</entry>
<entry>
<title>SiFive/U54: Initial version of SiFive U54 core library.</title>
<updated>2020-08-23T13:56:47+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2019-10-16T07:30:34+00:00</published>
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<id>urn:sha1:b1925736e328046a5adda7cc6a1e9c3461ded2a5</id>
<content type='text'>
SiFive U54 core library for building core information hob data.

Signed-off-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Co-authored-by: Daniel Schaefer &lt;daniel.schaefer@hpe.com&gt;
Reviewed-by:Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Acked-by:Leif Lindholm &lt;leif.lindholm@linaro.org&gt;

Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Cc: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Cc: Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>Silicon/SiFive: Initial version of SiFive silicon package.</title>
<updated>2020-08-23T13:57:03+00:00</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2019-10-16T07:24:18+00:00</published>
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<id>urn:sha1:6ce99cb142013aabd59e2271f54d49c727ab86be</id>
<content type='text'>
This is the initial version of SiFive silicon package. Provides PCD
tokens.

Signed-off-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Reviewed-by:Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Acked-by:Leif Lindholm &lt;leif.lindholm@linaro.org&gt;

Cc: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Cc: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Cc: Gilbert Chen &lt;gilbert.chen@hpe.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
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