<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2-platforms.git/Silicon/Marvell/Library, branch CodeCleanup</title>
<subtitle>EDK II sample platform branches and tags (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup</id>
<link rel='self' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/'/>
<updated>2023-11-16T17:09:52+00:00</updated>
<entry>
<title>Silicon/Marvell: Restructure package</title>
<updated>2023-11-16T17:09:52+00:00</updated>
<author>
<name>Narinder Dhillon</name>
<email>ndhillon@marvell.com</email>
</author>
<published>2023-11-02T03:45:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=ec5de71d83f3a6327c90887456782d15565e6e36'/>
<id>urn:sha1:ec5de71d83f3a6327c90887456782d15565e6e36</id>
<content type='text'>
Current Marvell package structure makes it difficult to add new silicon
packages that reuse common elements without creating nested DEC files.

This patch creates a new MarvellSiliconPkg folder and moves the current
common elements inside it.

Also gMarvellTokenSpaceGuid has been renamed to
gMarvellSiliconTokenSpaceGuid to align with new package name.

Signed-off-by: Narinder Dhillon &lt;ndhillon@marvell.com&gt;
Reviewed-by: Leif Lindholm &lt;quic_llindhol@quicinc.com&gt;
</content>
</entry>
<entry>
<title>Marvell: IcuLib: Rework default interrupt map</title>
<updated>2021-08-02T03:30:47+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2021-07-26T22:49:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=73ccc21d918cce8f36f6c9b7b0e5940b36455634'/>
<id>urn:sha1:73ccc21d918cce8f36f6c9b7b0e5940b36455634</id>
<content type='text'>
The ICU to GIC interrupt mapping was fixed to support
the maximum of two CP11x south bridge units. Rework
the default map to use only the interrupts wired
to controllers supported in the ACPI tables.
Thanks to above all necessary IRQs from the CN913x
SoCs (maximum 3 CP11x) can be mapped and passed to the OS.

Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
</content>
</entry>
<entry>
<title>Marvell/Library: UtmiLib: Fix USB mux configuration</title>
<updated>2020-05-19T15:15:00+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2020-03-22T13:42:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=66d22b1b440631a8229ad52ef235d96cb5e8819b'/>
<id>urn:sha1:66d22b1b440631a8229ad52ef235d96cb5e8819b</id>
<content type='text'>
If UTMI connected to USB Device, the MUX must be configured
prior to the PHY init. Add missing register update in the
relevant code.

Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
Reviewed-by: Leif Lindholm &lt;leif@nuviainc.com&gt;
</content>
</entry>
<entry>
<title>Marvell/Library: UtmiLib: Fix pll initialization for the second port</title>
<updated>2020-05-19T15:14:53+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2020-03-20T04:55:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=65fc8faf59db3556ff02beed54fdeef6d6434685'/>
<id>urn:sha1:65fc8faf59db3556ff02beed54fdeef6d6434685</id>
<content type='text'>
According to Design Reference Specification the PHY PLL and Calibration
register from PHY0 are shared for multi-port PHY. PLL control registers
inside other PHY channels are not used.

This fixes issues in scenarios when only UTMI port1 was in use, which
resulted with lack of correct PLL initialization. On the occasion
add relevant comments, describing the register groups in the header
file.

Based on original change from Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;

Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
Reviewed-by: Leif Lindholm &lt;leif@nuviainc.com&gt;
</content>
</entry>
<entry>
<title>Marvell/Library: UtmiLib: Update USB2.0 analog settings</title>
<updated>2020-05-19T15:14:44+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2020-03-20T04:37:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=a05b66b73b1fe0dde20d99e42c4faf664addb405'/>
<id>urn:sha1:a05b66b73b1fe0dde20d99e42c4faf664addb405</id>
<content type='text'>
This patch introduce following modifications, allowing to
overcome the instabilities observed with certain USB2.0 endpoints:
* Add additional step which enables the Impedance and PLL calibration.
* Enable old squelch detector instead of the new analog squelch detector
  circuit and update host disconnect threshold value.
* Update LS TX driver strength coarse and fine adjustment values.

Based on original change from Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;

Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
Reviewed-by: Leif Lindholm &lt;leif@nuviainc.com&gt;
</content>
</entry>
<entry>
<title>Marvell/Library: IcuLib: Fix debug information</title>
<updated>2019-10-14T09:18:15+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2019-07-01T10:58:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=0d8b8bfe26be02b9b966121b00a382c05e655cb6'/>
<id>urn:sha1:0d8b8bfe26be02b9b966121b00a382c05e655cb6</id>
<content type='text'>
In case the number of CP11x components exceeded the maximum
of currently supported, the user is informed with the information.
It turned out that the print arguments were incorrect - fix it.

Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
Reviewed-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
</content>
</entry>
<entry>
<title>Marvell/Library: ArmadaSoCDescLib/MppLib: Extend Xenon information</title>
<updated>2019-10-14T09:18:15+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2019-07-01T11:05:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=e9f32b99b7f5a0bbf0fe8830e5af629ecaafecc5'/>
<id>urn:sha1:e9f32b99b7f5a0bbf0fe8830e5af629ecaafecc5</id>
<content type='text'>
Hitherto SoC description and MppLib libraries code assumed
that there could be only two Xenon SdMmc controller
instances in the SoC. Remove those limitations, so that
to support CN913x SoCs, which may have up to 4 of such interfaces.

Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
Acked-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
</content>
</entry>
<entry>
<title>Silicon/Marvell: Replace BSD License with BSD+Patent License</title>
<updated>2019-07-29T17:32:05+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2019-07-23T20:13:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=52e4b254f6bf648f7e2bdbfca75103e1a811a280'/>
<id>urn:sha1:52e4b254f6bf648f7e2bdbfca75103e1a811a280</id>
<content type='text'>
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Email thread with approval from Marvell:

  https://edk2.groups.io/g/devel/message/41507

Cc: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Cc: Marcin Wojtas &lt;mw@semihalf.com&gt;
Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Reviewed-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Reviewed-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
</content>
</entry>
<entry>
<title>Silicon/Marvell: Replace BSD License with BSD+Patent License</title>
<updated>2019-05-17T21:22:34+00:00</updated>
<author>
<name>Michael D Kinney</name>
<email>michael.d.kinney@intel.com</email>
</author>
<published>2019-05-15T22:49:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=918e3c62a2ed592b65475d9426be17e82d12e0da'/>
<id>urn:sha1:918e3c62a2ed592b65475d9426be17e82d12e0da</id>
<content type='text'>
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

NOTE: Files with a BSD 3-Clause license are not modified by this patch
      series.

Cc: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney &lt;michael.d.kinney@intel.com&gt;
Reviewed-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
</content>
</entry>
<entry>
<title>Marvell/Library: ComPhyLib: Update mode parameter for PCIE power on</title>
<updated>2019-04-20T17:30:36+00:00</updated>
<author>
<name>Marcin Wojtas</name>
<email>mw@semihalf.com</email>
</author>
<published>2019-04-17T21:20:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=14d177e378bd34c3e36710db1ff457dcea6da64d'/>
<id>urn:sha1:14d177e378bd34c3e36710db1ff457dcea6da64d</id>
<content type='text'>
Most recent ARM-TF ComPhy PCIE initialization routines check
additional mode parameter in order to determine, where the SMC
is called from (OS / firmware). Adjust to that.

This patch fixes the Linux boot with DT.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas &lt;mw@semihalf.com&gt;
Reviewed-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
</content>
</entry>
</feed>
