Tianocore/edk2-platforms.git/Silicon/Intel, branch CodeCleanup

Silicon/Intel: Support MM_STANDALONE for the PCH SPI Interface

2024-06-28T08:49:41+00:00

This patch Add a new PchSpiStandaloneMm.inf driver for the PCH SPI Interface support. Signed-off-by: Ray Ni Co-authored-by: Jiaxin Wu

Silicon/Intel: Support MM_STANDALONE for SmmSpiFlashCommonLib

2024-06-28T06:01:19+00:00

Signed-off-by: Ray Ni Co-authored-by: Jiaxin Wu

IntelSiliconPkg: Update Header File to Align FIT Specification 1.5

2024-06-19T02:32:57+00:00

(1) Add the below definition for FIT entry type - FIT_TYPE_03_DIAGNOSTIC_ACM - FIT_TYPE_05_MMC_FIRMWARE_IMAGE - FIT_TYPE_06_FIT_RESET_STATE - FIT_TYPE_1A_VAB_PROVISIONING_TABLE - FIT_TYPE_1B_VAB_KEY_MANIFEST - FIT_TYPE_1C_VAB_IMAGE_MANIFEST - FIT_TYPE_1D_VAB_IMAGE_HASH_DESC - FIT_TYPE_2C_SACM_DEBUG - FIT_TYPE_2E_GRANULAR_SCRTM_ERROR (2) Add the below definition to support FIT table range - FIT_TABLE_LOWER_ADDRESS - FIT_TABLE_UPPER_ADDRESS (3) Add the below definition and structure for Type02 (Ver. 0x200) entry - FIT_TYPE_02_VERSION_200 - FIT_TYPE_02_VERSION_200_ENTRY Cc: Ashraf Ali S Cc: Rangasai V Chaganty Cc: Ray Ni Signed-off-by: Jason1 Lin

PACKAGE_GUID duplication in Intel silicon folders

2024-05-02T23:52:41+00:00

https://bugzilla.tianocore.org/show_bug.cgi?id=4759 Modify PACKAGE_GUID duplication in Intel silicon folders. Cc: Sai Chaganty Cc: Rosen Chuang Cc: Saloni Kasbekar Reviewed-by: Nate DeSimone Cc: Paul Lohr Reviewed-By: Giri Mudusuru Signed-off-by: Dora Hsueh

AlderlakeSiliconPkg: Update for SPI2 Protocol and Identify flash regions by GUID

2024-04-08T22:35:41+00:00

https://bugzilla.tianocore.org/show_bug.cgi?id=4664 1. Updates references to the "PCH_SPI_PROTOCOL" to instead refer to "PCH_SPI2_PROTOCOL". 2. Updates the library to identify flash regions by GUID and internally map the GUID entries to values specific to AlderlakeSiliconPkg. 3. Libs/modules that need to reference IntelSiliconPkg are updated. 4. Add B_TCO_IO_TCO1_CNT_TMR_HLT define. Cc: Sai Chaganty Cc: Rosen Chuang Reviewed-by: Saloni Kasbekar Cc: Haoyu Tang Reviewed-by: Nate DeSimone Signed-off-by: Dora Hsueh

Silicon/Intel/FitGen：FIT change for FBM entry.

2024-03-08T08:29:34+00:00

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4621 1)Refer to FIT spec change, add a new entry in FIT table - FSP Boot Manifest(Type 0xD) to store the location of FBM. 2)We found that 0xD was occupied by FIT_TABLE_TYPE_BIOS_DATA_AREA. But all FIT specs in archive show record 0xD as reserved.After confirming with architect,we will use 0xD for FBM and update FitGen.c accordingly. Reviewed-by: Yuwei Chen Signed-off-by: Liqi Liu Cc: Chen Christine Cc: Feng Bob C Cc: Chagnanty Rangasai V Cc: Liming Gao

IntelSiliconPkg/VTd: Reset the one-shot bits before modifing GCMD_REG

2024-03-01T08:31:28+00:00

Here is the process of modify GCMD_REG. Read GSTS_REG Reset the one-shot bits. Modify the target comamnd value. Write the command value to GCMD_REG. Wait until GSTS_REG indicates command is serviced. Reviewed-by: Jenny Huang Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Sheng Wei

IntelSiliconPkg/VTd: Remove ASSERT in VTdSetAttribute

2024-02-06T06:24:36+00:00

When PcdVTdPolicyPropertyMask BIT2 is set and ACPI DMAR table is not ready, It is no need to hit an assert, and just returns EFI_NOT_READY. Reviewed-by : Jenny Huang Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Chiang Chris Signed-off-by: Sheng Wei

IntelSiliconPkg/VTd: Print Flags field in DeviceScopeEntry

2023-10-24T07:54:45+00:00

Flags field is defined in Device Scope Structure since VT-d spec 4.0. Print Device Scope Structure Flags field when dump DMAR table. Change-Id: I37365ea4c1e6cfa0a1842a5830761367777b7d2c Signed-off-by: Sheng Wei Reviewed-by: Jenny Huang Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Jenny Huang

IntelSiliconPkg/Vtd: fix incorrect number of arguments

2023-10-24T07:54:45+00:00

Fix incorrect number of arguments in VtdLibDumpSetAttribute(). Signed-off-by: Sheng Wei Reviewed-by: Jenny Huang Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Jenny Huang