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<title>Tianocore/edk2-platforms.git/Platform/RaspberryPi/AcpiTables, branch CodeCleanup</title>
<subtitle>EDK II sample platform branches and tags (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup</id>
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<updated>2023-11-22T15:12:53+00:00</updated>
<entry>
<title>multiple Arm platforms: set WritePolicyValid for all cache types</title>
<updated>2023-11-22T15:12:53+00:00</updated>
<author>
<name>Marcin Juszkiewicz</name>
<email>marcin.juszkiewicz@linaro.org</email>
</author>
<published>2023-11-15T12:46:08+00:00</published>
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<id>urn:sha1:10e2eb030de3fa96433009465aab6eff0f199117</id>
<content type='text'>
acpiview complains:

ERROR: On Arm based systems, all cache properties must be provided in
the cache type structure. Missing 'Write Policy Valid' flag.

ACPI specification says:

&gt; Set to 1 if the write policy attribute described is valid. A value
&gt; of 0 indicates that, where possible, processor architecture specific
&gt; discovery mechanisms should be used to ascertain the value of this
&gt; attribute.

Signed-off-by: Marcin Juszkiewicz &lt;marcin.juszkiewicz@linaro.org&gt;
Reviewed-by: Leif Lindholm &lt;quic_llindhol@quicinc.com&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Update for IORT revision macro renaming</title>
<updated>2022-07-29T18:38:45+00:00</updated>
<author>
<name>Sami Mujawar</name>
<email>sami.mujawar@arm.com</email>
</author>
<published>2022-07-14T16:55:25+00:00</published>
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<id>urn:sha1:b8c4f5c787f00ea85c3f5b177a683fb54e79b370</id>
<content type='text'>
The IORT Specification E.d updates the IORT table revision to 5. To
reflect this change the IORT header file has been updated to rename
the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro which was at Rev 0 to
EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00.

Therefore, update the usage of EFI_ACPI_IO_REMAPPING_TABLE_REVISION
macro in the IORT table for RaspberryPi platform to
EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00.

Signed-off-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
Reviewed-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Reviewed-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Add 'clock-frequency' property for miniuart</title>
<updated>2022-02-08T16:54:47+00:00</updated>
<author>
<name>Adrien Thierry</name>
<email>athierry@redhat.com</email>
</author>
<published>2022-02-08T15:45:27+00:00</published>
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<id>urn:sha1:b0f3f903720e8399400b1ce45065274462069f2d</id>
<content type='text'>
Describe the miniuart clock frequency in a _DSD property, so that it can
be read from the Linux driver [1]

The miniuart clock frequency is the core clock frequency on the
Raspberry Pi. It can be modified by the user using the 'core_freq'
property in the config.txt file. So, we fetch it from the underlying
Raspberry Pi firmware.

[1] https://lore.kernel.org/all/20220207232129.402882-1-athierry@redhat.com/

Signed-off-by: Adrien Thierry &lt;athierry@redhat.com&gt;
Reviewed-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Remove TypeTranslation attribute</title>
<updated>2021-10-10T21:07:44+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>mark.kettenis@xs4all.nl</email>
</author>
<published>2021-10-10T19:48:14+00:00</published>
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<id>urn:sha1:ab6fcc28fd99ea449d33e47cec7b41c1fbd51351</id>
<content type='text'>
The MMIO host bridge window isn't translated as both the primary
and secondary side are MMIO.  So remove the incorrect
TypeTranslation attribute.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi/RPi4: Add _DSM ACPI method for 32-bit MMIO xHCI access</title>
<updated>2021-09-01T17:29:58+00:00</updated>
<author>
<name>Pete Batard</name>
<email>pete@akeo.ie</email>
</author>
<published>2021-09-01T16:46:10+00:00</published>
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<id>urn:sha1:901d3c52ed23f8c341424d46b89d27051043ba07</id>
<content type='text'>
With the upcoming release of Windows 11, Microsoft has introduced a new USB
Device-Specific Method (_DSM) function to enforce 64-bit xHCI registers to
be accessed through two sequential 32-bit requests. The new function (Query
controller register access type - Function 6) is documented at:
https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/usb-device-specific-method---dsm-

Support for this feature is required on the Raspberry Pi 4 where there is
a bug/limitation in the xHCI stack that prevents full range 64-bit access
from working correctly. It should be noted that an equivalent for this _DSM
is not required on Linux, as 64-bit xHCI register access is already broken
down into 2x32-bit by the drivers there.

With this _DSM, and unlike what is the case for Windows 10, Windows 11 can
now be installed on the Raspberry Pi 4 without having to alter any of the
installation files, as we were able to validate using the latest Windows 11
Build 22000 Insider image.

Signed-off-by: Pete Batard &lt;pete@akeo.ie&gt;
Tested-by: Pete Batard &lt;pete@akeo.ie&gt;
Reviewed-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Add Linux quirk support</title>
<updated>2021-08-22T13:55:32+00:00</updated>
<author>
<name>Jeremy Linton</name>
<email>jeremy.linton@arm.com</email>
</author>
<published>2021-08-20T04:16:19+00:00</published>
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<id>urn:sha1:46026ad759b718142e652618c399a1f68d4e3804</id>
<content type='text'>
Linux, for the time being has refused to support the Arm
standard SMCCC for PCIe configuration. Instead they
want to continue to maintain per device "quirks".

As the RPI isn't really ECAM this is a bit more
involved because the MCFG can't really describe
the root port+config registers situation. Further
platforms which support the SMCCC shouldn't have
a MCFG, so we need an additional way to tell linux
what it needs to know about this platform.

Signed-off-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Reviewed-by: Andrei Warkentin &lt;awarkentin@vmware.com&gt;
Reviewed-By: Samer El-Haj-Mahmoud &lt;Samer.El-Haj-Mahmoud@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Add PCIe SSDT</title>
<updated>2021-08-22T13:54:45+00:00</updated>
<author>
<name>Jeremy Linton</name>
<email>jeremy.linton@arm.com</email>
</author>
<published>2021-08-20T04:16:15+00:00</published>
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<id>urn:sha1:fc4eb72f881da00a9d5312594633dc6f7b0d409a</id>
<content type='text'>
Since we plan on toggling between XHCI and PCI the PCI
root needs to be in its own SSDT. This is all thats needed
of UEFI. The SMC conduit is provided directly to the running
OS. When the OS detects this PCIe port on a machine without
a MCFG it attempts to connect to the SMC conduit. The RPi
definition doesn't have any power mgmt, and only provides
a description of the root port.

Signed-off-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Tested-by: Jared McNeill &lt;jmcneill@invisible.ca&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Break XHCI into its own SSDT</title>
<updated>2021-08-22T13:54:38+00:00</updated>
<author>
<name>Jeremy Linton</name>
<email>jeremy.linton@arm.com</email>
</author>
<published>2021-08-20T04:16:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/Tianocore/edk2-platforms.git/commit/?id=5cf33c71cb42d677ee294b608c30617e31d2a4ff'/>
<id>urn:sha1:5cf33c71cb42d677ee294b608c30617e31d2a4ff</id>
<content type='text'>
Lets prepare to switch between XHCI and PCI by moving
the XHCI definition into its own SSDT. That way we can
select it based on the menu settings. The resource
producer/consumer flag is also corrected.

Reviewed-by: Andrei Warkentin &lt;awarkentin@vmware.com&gt;
Signed-off-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Tested-by: Jared McNeill &lt;jmcneill@invisible.ca&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi/RPi4: Fix non-standard ACPI CIDs</title>
<updated>2021-07-22T10:38:18+00:00</updated>
<author>
<name>Samer El-Haj-Mahmoud</name>
<email>Samer.El-Haj-Mahmoud@arm.com</email>
</author>
<published>2021-07-19T20:45:20+00:00</published>
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<id>urn:sha1:194269223294bb30513837d3582a6a635b672661</id>
<content type='text'>
Remove non-standard RPI ACPI _CIDs that are not needed.
This also fixes the FWTS failure reported in
https://github.com/pftf/RPi4/issues/67

The windows drivers at https://github.com/raspberrypi/windows-drivers
are still able to match the ACPI objects using the HIDs which
are supported in the drivers, with these two recent changes needed:
6469702898789e555c6947e50216a3f79e0ddeb9
and
5c5e2742b4c983b3001c473b168b0dae2fcba0c2

Cc: Leif Lindholm &lt;leif@nuviainc.com&gt;
Cc: Ard Biesheuvel &lt;ardb+tianocore@kernel.org&gt;
Cc: Pete Batard &lt;pete@akeo.ie&gt;
Cc: Andrei Warkentin &lt;awarkentin@vmware.com&gt;
Cc: Mario Bălănică &lt;mariobalanica02@gmail.com&gt;
Signed-off-by: Samer El-Haj-Mahmoud &lt;Samer.El-Haj-Mahmoud@arm.com&gt;
Tested-by: Mario Bălănică &lt;mariobalanica02@gmail.com&gt;
Reviewed-by: Sunny Wang &lt;sunny.wang@arm.com&gt;
Tested-by: Sunny Wang &lt;sunny.wang@arm.com&gt;
Reviewed-by: Andrei Warkentin &lt;awarkentin@vmware.com&gt;
</content>
</entry>
<entry>
<title>Platform/RaspberryPi: Enable Bluetooth and UART in Windows OS</title>
<updated>2021-06-12T20:04:08+00:00</updated>
<author>
<name>Sunny Wang</name>
<email>Sunny.Wang@arm.com</email>
</author>
<published>2021-06-07T07:53:39+00:00</published>
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<id>urn:sha1:086a3a3ce6c42c859ee5943eb2c4b6edcefdc241</id>
<content type='text'>
This change is based on edk2-platforms-raspberrypi-pl011-bth-noflow.diff
in https://github.com/worproject/RPi-Bluetooth-Testing/ with the
modifications and additional changes below for enabling Bluetooth
and serial port (Mini UART) in Windows IOT.
  - Remove RPIQ connection for BT_ON/OFF in Uart.asl because it is
    useless. The firmware already turns on the Bluetooth by default.
  - Move the GPIO pin muxing stuff from Uart.asl to ConfigDxe driver.

Testing Done:
  - Successfully booted Windows Windows 10 IOT (20279.1) on SD (made by
    WOR) with the RPi-Windows-Drivers release ver 0.5 downloaded from
    https://github.com/worproject/RPi-Windows-Drivers/releases
    and checked that both Bluetooth and serial port (Mini UART) can
    work fine.
  - Successfully booted VMware ESXi-Arm Fling v1.3 with only serial
    console connection (PL011 UART).

Signed-off-by: Sunny Wang &lt;sunny.wang@arm.com&gt;
Reviewed-by: Pete Batard &lt;pete@akeo.ie&gt;
Tested-by: Pete Batard &lt;pete@akeo.ie&gt;
</content>
</entry>
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