Tianocore/edk2-platforms.git/Platform/ARM/N1Sdp, branch CodeCleanupEDK II sample platform branches and tags (mirror)https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup2024-06-24T10:19:23+00:00Platform/ARM: drop use of PcdArmArchTimerFreqInHz2024-06-24T10:19:23+00:00Leif Lindholmquic_llindhol@quicinc.com2024-06-20T11:15:44+00:00urn:sha1:d9bcbf86b03f4c96cd63a97f43b985fcaef1d12d
Some Arm ltd. platforms explicitly set PcdArmArchTimerFreqInHz, however
the intended effect of that is not possible from AArch64 EL2/1, and has
never been performed unless built for ARM.
The Pcd is now being deleted, so drop the setting.
This has however affected timer timout calculations, so could lead to a
change in platform behaviour.
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Thomas Abraham <thomas.abraham@arm.com>
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp2024-05-29T15:45:58+00:00sahilsahil@arm.com2024-05-29T08:55:17+00:00urn:sha1:35bca3ca71c004b7f3d93c6f33724796c6b1bf0b
This driver enables Fault Tolerant Write protocol, which provides
fault tolerant write capability for block devices.
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM/N1Sdp: Persistent storage for N1Sdp2024-05-29T15:45:57+00:00sahilsahil@arm.com2024-05-29T08:55:16+00:00urn:sha1:9498e8ab697ac0448e3462b0fcd0eab1f85962d8
Enable persistent storage on QSPI flash device.
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM/N1Sdp: Consume N1SdpNtFwConfigPei supplied HOB2024-03-04T14:34:50+00:00sahilsahil@arm.com2024-03-01T13:39:12+00:00urn:sha1:fe41713668d42b20a2370dab27de3269e877e454
N1SdpNtFwConfigPei PEIM extracts platform information from NT_FW_CONFIG
and provides it to other modules as a PPI and a HOB.
Therefore, update ConfigurationManagerDxe to consume these values from
the HOB in the DXE phase.
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp2024-03-04T14:34:06+00:00sahilsahil@arm.com2024-01-04T13:16:15+00:00urn:sha1:e994d1c601826c2e4f05ff2188b5666d82a6189f
Incorporate N1SdpNtFwConfigPei PEI module which parses NT_FW_CONFIG and
passes it to other PEI modules(as PPI) and DXE modules(as HOB).
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM/N1Sdp: Route the Debug Serial Port to IOFPGA UART12024-03-04T14:20:57+00:00Himanshu SharmaHimanshu.Sharma@arm.com2024-01-12T21:02:02+00:00urn:sha1:9fbe629ecf5ed923c58e333e5a651c8f73cb1f79
Update the RegisterBase and Clk for the Debug Serial Port (DBG2)
to route it to the IOFPGA UART1 and make the SPCR and DBG2 Serial
Ports exclusive.
Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM/N1Sdp: Fix RemoteDdrSize cast2023-05-02T09:37:24+00:00sahilsahil@arm.com2023-05-02T08:32:26+00:00urn:sha1:b94fb01614f2a1c9f02d5f1b1834c2d4e908ceac
RemoteDdrSize calculation wraps around when booting N1Sdp in
multichip mode. Casting it to UINT64 to fix the issue.
Signed-off-by: sahil <sahil@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM: Update Morello and N1Sdp to use PrePeiCoreUniCore2022-12-13T15:00:28+00:00Rebecca Cranrebecca@quicinc.com2022-10-25T20:56:42+00:00urn:sha1:425cce5415176998da117e6433382ee771557900
Modern platforms that use TF-A should use PrePeiCoreUniCore, since
any secondary cores will be put in the TF-A holding pen and won't
reach EDK2.
Update the Morello and N1Sdp files to use PrePeiCoreUniCore instead of
PrePeiCoreMPCore.
Signed-off-by: Rebecca Cran <rebecca@quicinc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM: Bump Dsdt/Ssdt ACPI table revision2022-11-01T12:06:02+00:00Pierre Gondoispierre.gondois@arm.com2022-09-08T13:34:16+00:00urn:sha1:d13436b384fc3e39e6e633b097daafd2db43bee2
From ACPI 5.1, s19.5.28 DefinitionBlock (Declare Definition Block):
Note: For compatibility with ACPI versions before
ACPI 2.0, the bit width of Integer objects is
dependent on the ComplianceRevision of the DSDT.
If the ComplianceRevision is less than 2, all
integers are restricted to 32 bits. Otherwise,
full 64-bit integers are used. The version of the DSDT
sets the global integer width for all integers,
including integers in SSDTs.
To be up-to-date with the latest table revision, bump the version
of all dsdt/ssdt tables that are relying on an ACPI specification
version above 2.0.
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Platform/ARM: N1SDP: Update for IORT revision macro renaming2022-07-29T18:38:52+00:00Sami Mujawarsami.mujawar@arm.com2022-07-14T16:55:26+00:00urn:sha1:c1c6e30950a458c2f5b4064019aa7fe3710a6384
The IORT Specification E.d updates the IORT table revision to 5. To
reflect this change the IORT header file has been updated to rename
the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro which was at Rev 0 to
EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00.
Therefore, update the usage of EFI_ACPI_IO_REMAPPING_TABLE_REVISION
macro in the IORT table for N1SDP platform to
EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>