<feed xmlns='http://www.w3.org/2005/Atom'>
<title>Tianocore/edk2-platforms.git/Platform/ARM/N1Sdp/ConfigurationManager, branch CodeCleanup</title>
<subtitle>EDK II sample platform branches and tags (mirror)</subtitle>
<id>https://git.radix-linux.su/Tianocore/edk2-platforms.git/atom?h=CodeCleanup</id>
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<updated>2024-03-04T14:34:50+00:00</updated>
<entry>
<title>Platform/ARM/N1Sdp: Consume N1SdpNtFwConfigPei supplied HOB</title>
<updated>2024-03-04T14:34:50+00:00</updated>
<author>
<name>sahil</name>
<email>sahil@arm.com</email>
</author>
<published>2024-03-01T13:39:12+00:00</published>
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<id>urn:sha1:fe41713668d42b20a2370dab27de3269e877e454</id>
<content type='text'>
N1SdpNtFwConfigPei PEIM extracts platform information from NT_FW_CONFIG
and provides it to other modules as a PPI and a HOB.
Therefore, update ConfigurationManagerDxe to consume these values from
the HOB in the DXE phase.

Signed-off-by: sahil &lt;sahil@arm.com&gt;
Reviewed-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/ARM/N1Sdp: Fix RemoteDdrSize cast</title>
<updated>2023-05-02T09:37:24+00:00</updated>
<author>
<name>sahil</name>
<email>sahil@arm.com</email>
</author>
<published>2023-05-02T08:32:26+00:00</published>
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<id>urn:sha1:b94fb01614f2a1c9f02d5f1b1834c2d4e908ceac</id>
<content type='text'>
RemoteDdrSize calculation wraps around when booting N1Sdp in
multichip mode. Casting it to UINT64 to fix the issue.

Signed-off-by: sahil &lt;sahil@arm.com&gt;
Reviewed-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/ARM: Bump Dsdt/Ssdt ACPI table revision</title>
<updated>2022-11-01T12:06:02+00:00</updated>
<author>
<name>Pierre Gondois</name>
<email>pierre.gondois@arm.com</email>
</author>
<published>2022-09-08T13:34:16+00:00</published>
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<id>urn:sha1:d13436b384fc3e39e6e633b097daafd2db43bee2</id>
<content type='text'>
From ACPI 5.1, s19.5.28 DefinitionBlock (Declare Definition Block):
  Note: For compatibility with ACPI versions before
  ACPI 2.0, the bit width of Integer objects is
  dependent on the ComplianceRevision of the DSDT.
  If the ComplianceRevision is less than 2, all
  integers are restricted to 32 bits. Otherwise,
  full 64-bit integers are used. The version of the DSDT
  sets the global integer width for all integers,
  including integers in SSDTs.

To be up-to-date with the latest table revision, bump the version
of all dsdt/ssdt tables that are relying on an ACPI specification
version above 2.0.

Signed-off-by: Pierre Gondois &lt;Pierre.Gondois@arm.com&gt;
Reviewed-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/ARM: N1SDP: Update for IORT revision macro renaming</title>
<updated>2022-07-29T18:38:52+00:00</updated>
<author>
<name>Sami Mujawar</name>
<email>sami.mujawar@arm.com</email>
</author>
<published>2022-07-14T16:55:26+00:00</published>
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<id>urn:sha1:c1c6e30950a458c2f5b4064019aa7fe3710a6384</id>
<content type='text'>
The IORT Specification E.d updates the IORT table revision to 5. To
reflect this change the IORT header file has been updated to rename
the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro which was at Rev 0 to
EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00.

Therefore, update the usage of EFI_ACPI_IO_REMAPPING_TABLE_REVISION
macro in the IORT table for N1SDP platform to
EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00.

Signed-off-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
Reviewed-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/ARM/N1Sdp: Update PCDs to support multiple PCI root ports</title>
<updated>2022-01-24T16:07:48+00:00</updated>
<author>
<name>Khasim Syed Mohammed</name>
<email>khasim.mohammed@arm.com</email>
</author>
<published>2022-01-24T15:55:33+00:00</published>
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<id>urn:sha1:ebfdaaab7c5b0a55a5e2661f9e9618d5685dace1</id>
<content type='text'>
PCD entries are updated to add support for multiple PCI root ports.

Signed-off-by: Khasim Syed Mohammed &lt;khasim.mohammed@arm.com&gt;
Reviewed-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
Reviewed-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/ARM/N1Sdp: Configuration Manager for N1Sdp</title>
<updated>2021-11-08T09:47:58+00:00</updated>
<author>
<name>Khasim Syed Mohammed</name>
<email>khasim.mohammed@arm.com</email>
</author>
<published>2021-11-05T14:21:26+00:00</published>
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<id>urn:sha1:e14f57684e9630f815f94d05452d9d7ee884b01a</id>
<content type='text'>
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.

The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform configuration repository. The configuration manager also
implements the configuration manager protocol which returns the
hardware information requested by the table generators.

This patch implements the configuration manager for N1SDP
platform. It enables support for generating the following
ACPI tables:
             1. FACP
             2. DSDT
             3. GTDT
             4. APIC
             5. SPCR
             6. DBG2
             7. PPTT
             8. IORT
             9. MCFG
            10. SSDT - PCI
            11. SSDT - REMOTE PCI

Also added :
HMAT table and expose CCIX memory as EFI_MEMORY_SP

Signed-off-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
Signed-off-by: Khasim Syed Mohammed &lt;khasim.mohammed@arm.com&gt;
Signed-off-by: Chandni Cherukuri &lt;chandni.cherukuri@arm.com&gt;
Signed-off-by: Manoj Kumar &lt;manoj.kumar3@arm.com&gt;
Signed-off-by: Patrik Berglund &lt;patrik.berglund@arm.com&gt;
Signed-off-by: anukou01 &lt;anurag.koul@arm.com&gt;
Signed-off-by: Sayanta Pattanayak &lt;sayanta.pattanayak@arm.com&gt;
Reviewed-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
<entry>
<title>Platform/ARM/N1Sdp: Introduce platform specific asl tables</title>
<updated>2021-11-08T09:47:33+00:00</updated>
<author>
<name>Khasim Syed Mohammed</name>
<email>khasim.mohammed@arm.com</email>
</author>
<published>2021-11-05T14:21:25+00:00</published>
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<id>urn:sha1:0af55c393d7e8a155e4fd8935ad37825f3de4822</id>
<content type='text'>
This patch creates Dsdt.asl, SsdtPci.asl and SsdtRemotePci.asl files
to provide the platform specific APCI table entries.

Three PCI root ports are available on N1Sdp, PCI0 is the default root port
PCI1 is the CCIX root port and PCI2 is the Remote host root port.

The Remote host specific entries are defined in a separate file
SsdtRemotePci.asl to avoid confusions with other PCI entries
and for better readability and understanding of interfaces.

Signed-off-by: Sami Mujawar &lt;sami.mujawar@arm.com&gt;
Signed-off-by: Khasim Syed Mohammed &lt;khasim.mohammed@arm.com&gt;
Signed-off-by: Chandni Cherukuri &lt;chandni.cherukuri@arm.com&gt;
Signed-off-by: anukou01 &lt;anurag.koul@arm.com&gt;
Signed-off-by: Manoj Kumar &lt;manoj.kumar3@arm.com&gt;
Reviewed-by: Pierre Gondois &lt;pierre.gondois@arm.com&gt;
</content>
</entry>
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