diff options
Diffstat (limited to 'meta-arm/meta-arm-bsp/recipes-bsp')
29 files changed, 198 insertions, 85 deletions
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch index 566070a4f3..31fd515228 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0001-aarch64-Rename-labels-and-prepare-for-lower-EL-booti.patch @@ -1,4 +1,4 @@ -From 3e7cfbe39a2a053d2a6b0d928cc172ed9d1c6da8 Mon Sep 17 00:00:00 2001 +From 545f6950ae4dc55b4974986aa9629adb16eaf4e1 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 May 2021 07:25:00 +0100 Subject: [PATCH] aarch64: Rename labels and prepare for lower EL booting @@ -18,10 +18,10 @@ Signed-off-by: Jaxson Han <jaxson.han@arm.com> 3 files changed, 27 insertions(+), 14 deletions(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index 27ba449..84e1646 100644 +index d682ba5..fab694e 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -21,18 +21,30 @@ ASM_FUNC(_start) +@@ -34,18 +34,30 @@ ASM_FUNC(_start) /* * EL3 initialisation @@ -56,7 +56,7 @@ index 27ba449..84e1646 100644 orr x0, x0, #(1 << 0) // Non-secure EL1 orr x0, x0, #(1 << 8) // HVC enable -@@ -124,7 +136,7 @@ ASM_FUNC(_start) +@@ -145,7 +157,7 @@ ASM_FUNC(_start) bl gic_secure_init @@ -65,7 +65,7 @@ index 27ba449..84e1646 100644 err_invalid_id: b . -@@ -151,7 +163,7 @@ ASM_FUNC(jump_kernel) +@@ -172,7 +184,7 @@ ASM_FUNC(jump_kernel) bl find_logical_id bl setup_stack // Reset stack pointer @@ -74,7 +74,7 @@ index 27ba449..84e1646 100644 cmp w0, #0 // Prepare Z flag mov x0, x20 -@@ -160,7 +172,7 @@ ASM_FUNC(jump_kernel) +@@ -181,7 +193,7 @@ ASM_FUNC(jump_kernel) mov x3, x23 b.eq 1f @@ -83,7 +83,7 @@ index 27ba449..84e1646 100644 1: mov x4, #SPSR_KERNEL -@@ -178,5 +190,5 @@ ASM_FUNC(jump_kernel) +@@ -199,5 +211,5 @@ ASM_FUNC(jump_kernel) .data .align 3 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch index 46447b8f28..4ef4507e79 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0002-aarch64-Prepare-for-EL1-booting.patch @@ -1,4 +1,4 @@ -From 26f9b5354c2de9cc052531096ff92b04c3a3846f Mon Sep 17 00:00:00 2001 +From bad32d3fc127a421be416b17e4f7d6d514f06abb Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 May 2021 07:25:00 +0100 Subject: [PATCH] aarch64: Prepare for EL1 booting @@ -15,10 +15,10 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com> 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index 84e1646..b589744 100644 +index fab694e..5105b41 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -156,10 +156,14 @@ ASM_FUNC(jump_kernel) +@@ -177,10 +177,14 @@ ASM_FUNC(jump_kernel) ldr x0, =SCTLR_EL1_KERNEL msr sctlr_el1, x0 @@ -35,7 +35,7 @@ index 84e1646..b589744 100644 bl setup_stack // Reset stack pointer diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h -index 63eb1c3..b1003f4 100644 +index 49d3f86..3767da3 100644 --- a/arch/aarch64/include/asm/cpu.h +++ b/arch/aarch64/include/asm/cpu.h @@ -11,6 +11,7 @@ diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch index db81355b66..c621187bfc 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0003-aarch64-Prepare-for-lower-EL-booting.patch @@ -1,4 +1,4 @@ -From ce628de7699dd6401ddf713efaa49872e2733619 Mon Sep 17 00:00:00 2001 +From 252cbd36e51414b60ab68306f9c38e358709494d Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 May 2021 07:25:00 +0100 Subject: [PATCH] aarch64: Prepare for lower EL booting @@ -17,11 +17,11 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com> 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index b589744..6b45afc 100644 +index 5105b41..243198d 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -130,7 +130,16 @@ el3_init: - mov x0, #ZCR_EL3_LEN_MASK // SVE: Enable full vector len +@@ -151,7 +151,16 @@ el3_init: + mov x0, #ZCR_EL3_LEN_MAX // SVE: Enable full vector len msr ZCR_EL3, x0 // for EL2. -1: @@ -38,7 +38,7 @@ index b589744..6b45afc 100644 ldr x0, =COUNTER_FREQ msr cntfrq_el0, x0 -@@ -178,7 +187,7 @@ ASM_FUNC(jump_kernel) +@@ -199,7 +208,7 @@ ASM_FUNC(jump_kernel) b.eq 1f br x19 // Keep current EL @@ -47,7 +47,7 @@ index b589744..6b45afc 100644 /* * If bit 0 of the kernel address is set, we're entering in AArch32 -@@ -196,3 +205,5 @@ ASM_FUNC(jump_kernel) +@@ -217,3 +226,5 @@ ASM_FUNC(jump_kernel) .align 3 flag_keep_el: .long 0 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch index e10182e1ab..43885b93d8 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0004-gic-v3-Prepare-for-gicv3-with-EL2.patch @@ -1,4 +1,4 @@ -From 483d363bf825082b6db6de3c57d169e741861891 Mon Sep 17 00:00:00 2001 +From bff110a95a5e4c9db2d61e629b4aa4b84530201e Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 May 2021 07:25:00 +0100 Subject: [PATCH] gic-v3: Prepare for gicv3 with EL2 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch index 3b6f78a579..c6343456a7 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0005-aarch64-Prepare-for-booting-with-EL2.patch @@ -1,4 +1,4 @@ -From be814863cdd5f61d9a16eec012d500550053c8c6 Mon Sep 17 00:00:00 2001 +From ba955efb35ce1d41b562190d7c2fbcbcf8ef97ff Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 May 2021 07:25:00 +0100 Subject: [PATCH] aarch64: Prepare for booting with EL2 @@ -15,10 +15,10 @@ Reviewed-by: Andre Przywara <andre.przywara@arm.com> 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index 6b45afc..908764a 100644 +index 243198d..3593ca5 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -195,10 +195,18 @@ ASM_FUNC(jump_kernel) +@@ -216,10 +216,18 @@ ASM_FUNC(jump_kernel) */ bfi x4, x19, #5, #1 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch index aaacc72945..18dc7ed7e4 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0006-aarch64-Introduce-EL2-boot-code-for-Armv8-R-AArch64.patch @@ -1,4 +1,4 @@ -From 81df76f8d94cb6c31c01739b078a72bdb8497441 Mon Sep 17 00:00:00 2001 +From 8e44fac113d935affed1550480631f3fe7f30584 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 May 2021 07:25:00 +0100 Subject: [PATCH] aarch64: Introduce EL2 boot code for Armv8-R AArch64 @@ -36,10 +36,10 @@ Signed-off-by: Jaxson Han <jaxson.han@arm.com> 2 files changed, 92 insertions(+), 2 deletions(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index 908764a..def9192 100644 +index 3593ca5..a219ea7 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -24,16 +24,24 @@ ASM_FUNC(_start) +@@ -37,16 +37,24 @@ ASM_FUNC(_start) * Boot sequence * If CurrentEL == EL3, then goto EL3 initialisation and drop to * lower EL before entering the kernel. @@ -66,7 +66,7 @@ index 908764a..def9192 100644 mov w0, #1 ldr x1, =flag_keep_el str w0, [x1] -@@ -139,6 +147,85 @@ el3_init: +@@ -160,6 +168,85 @@ el3_init: str w0, [x1] b el_max_init @@ -152,7 +152,7 @@ index 908764a..def9192 100644 el_max_init: ldr x0, =COUNTER_FREQ msr cntfrq_el0, x0 -@@ -148,6 +235,7 @@ el_max_init: +@@ -169,6 +256,7 @@ el_max_init: b start_el_max err_invalid_id: @@ -161,7 +161,7 @@ index 908764a..def9192 100644 /* diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h -index b1003f4..91f803c 100644 +index 3767da3..3c0e00d 100644 --- a/arch/aarch64/include/asm/cpu.h +++ b/arch/aarch64/include/asm/cpu.h @@ -25,6 +25,7 @@ @@ -172,7 +172,7 @@ index b1003f4..91f803c 100644 #define SPSR_EL2H (9 << 0) /* EL2 Handler mode */ #define SPSR_HYP (0x1a << 0) /* M[3:0] = hyp, M[4] = AArch32 */ -@@ -43,6 +44,7 @@ +@@ -50,6 +51,7 @@ #else #define SCTLR_EL1_KERNEL SCTLR_EL1_RES1 #define SPSR_KERNEL (SPSR_A | SPSR_D | SPSR_I | SPSR_F | SPSR_EL2H) diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch index b130854895..131e271012 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0007-Allow-enable-psci-to-choose-between-smc-and-hvc.patch @@ -1,4 +1,4 @@ -From f5a31b4f4ea8daaa0d337d5a2322ddb1912083fc Mon Sep 17 00:00:00 2001 +From 0b9a966b8a28961b078215ee7169e32a976d5e7d Mon Sep 17 00:00:00 2001 From: Qi Feng <qi.feng@arm.com> Date: Wed, 26 May 2021 17:52:01 +0800 Subject: [PATCH] Allow --enable-psci to choose between smc and hvc @@ -40,7 +40,7 @@ Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com> 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/Makefile.am b/Makefile.am -index f941b07..88a27de 100644 +index 5731a19..fc66662 100644 --- a/Makefile.am +++ b/Makefile.am @@ -50,11 +50,11 @@ endif diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch index 2ce28b7071..d3ccb2ebe9 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0008-aarch64-Disable-CNTPCT_EL0-trap-for-v8-R64.patch @@ -1,4 +1,4 @@ -From 3f4614e02f0f8d2522510578da2752f8e3511bb3 Mon Sep 17 00:00:00 2001 +From 521c121eccb386aca7c75d92528e495546adccec Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Mon, 25 Oct 2021 17:09:13 +0800 Subject: [PATCH] aarch64: Disable CNTPCT_EL0 trap for v8-R64 @@ -24,10 +24,10 @@ Change-Id: I4147e66341c8153312021e6f2ab67d0037246da1 1 file changed, 12 insertions(+) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index def9192..6dbd5cc 100644 +index a219ea7..27b1139 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -219,6 +219,18 @@ el2_init: +@@ -240,6 +240,18 @@ el2_init: orr x0, x0, #(1 << 41) // HCR_EL2.API 1: msr hcr_el2, x0 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch index 0c310eb553..c34d01c386 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0009-lds-Mark-the-mem-range.patch @@ -1,4 +1,4 @@ -From 2851f0e6c1216894b9498d7b91256bb1ef49e544 Mon Sep 17 00:00:00 2001 +From 780df234d98db81485b1f351f902a68def35c9d4 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 2 Nov 2021 15:10:28 +0800 Subject: [PATCH] lds: Mark the mem range diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch index 0305f8ba00..2d12db593b 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0010-common-Introduce-the-libfdt.patch @@ -1,4 +1,4 @@ -From fadf04f44b679d85e55b2e5f220fecbebb52ad03 Mon Sep 17 00:00:00 2001 +From b3762b6c5a56bf594bc5cb63d145e8efd86e106e Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 28 Dec 2021 17:02:17 +0800 Subject: [PATCH] common: Introduce the libfdt diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch index 871a178f98..b7726f5175 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0011-common-Add-essential-libc-functions.patch @@ -1,4 +1,4 @@ -From 0f2c7ca446063be6b193fbf870d38c0af19e15c5 Mon Sep 17 00:00:00 2001 +From e2eff4f80e65cb3fcbe6345b5376a6bf7de7e2cc Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 28 Dec 2021 17:28:25 +0800 Subject: [PATCH] common: Add essential libc functions diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch index 5917ef2052..b77ab3e27b 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0012-Makefile-Add-the-libfdt-to-the-Makefile-system.patch @@ -1,4 +1,4 @@ -From de5d2b6c200ae5dd8113751e58bf7cf5844eec5a Mon Sep 17 00:00:00 2001 +From f4d5cf4c3424598a2b3bb391717313b70c79ea28 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 28 Dec 2021 17:42:48 +0800 Subject: [PATCH] Makefile: Add the libfdt to the Makefile system @@ -17,7 +17,7 @@ Change-Id: I472bc28cdc5cde3b22461a4b7d7a3752ae382b4b 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Makefile.am b/Makefile.am -index 88a27de..5e8668a 100644 +index fc66662..ab2c3a9 100644 --- a/Makefile.am +++ b/Makefile.am @@ -36,6 +36,9 @@ PSCI_CPU_OFF := 0x84000002 @@ -30,10 +30,10 @@ index 88a27de..5e8668a 100644 ARCH_OBJ := boot.o stack.o utils.o if BOOTWRAPPER_32 -@@ -125,11 +128,12 @@ CHOSEN_NODE := chosen { \ - CPPFLAGS += $(INITRD_FLAGS) - CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/ +@@ -127,11 +130,12 @@ CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/ CFLAGS += -Wall -fomit-frame-pointer + CFLAGS += -ffreestanding -nostdlib + CFLAGS += -fno-stack-protector +CFLAGS += -fno-stack-protector CFLAGS += -ffunction-sections -fdata-sections CFLAGS += -fno-pic -fno-pie @@ -44,7 +44,7 @@ index 88a27de..5e8668a 100644 # Don't lookup all prerequisites in $(top_srcdir), only the source files. When # building outside the source tree $(ARCH_SRC) needs to be created. -@@ -150,10 +154,13 @@ $(ARCH_SRC): +@@ -152,10 +156,13 @@ $(ARCH_SRC): $(COMMON_SRC): $(MKDIR_P) $@ diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch index 136e18ed2e..2346109c02 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0013-platform-Add-print_hex-func.patch @@ -1,4 +1,4 @@ -From 5b8cb5192dbd0332e027e8999c3afe4433983291 Mon Sep 17 00:00:00 2001 +From f0ece5e8cac761a76a86df7204bae7c6ef09215f Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Wed, 29 Dec 2021 10:50:21 +0800 Subject: [PATCH] platform: Add print_hex func diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch index ea51816029..f4ea89c609 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0014-common-Add-mem-usage-to-memreserve.patch @@ -1,4 +1,4 @@ -From b447242cd2457bec20d47fe6a8a5758d97a3bde3 Mon Sep 17 00:00:00 2001 +From f4704146e1af9f6e0a2220db6b39a328c813fac1 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Wed, 19 Jan 2022 16:19:02 +0800 Subject: [PATCH] common: Add mem usage to /memreserve/ @@ -20,7 +20,7 @@ Change-Id: I2ea80cdf736a910fa2c3deb622e21d50f04be960 create mode 100644 common/device_tree.c diff --git a/Makefile.am b/Makefile.am -index 5e8668a..734de92 100644 +index ab2c3a9..e905602 100644 --- a/Makefile.am +++ b/Makefile.am @@ -34,7 +34,7 @@ endif diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch index 0411ef0229..7d59e5fc3b 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0015-boot-Add-the-enable-keep-el-compile-option.patch @@ -1,4 +1,4 @@ -From 8271c21bcff260295203214b7b8c87cdb8236453 Mon Sep 17 00:00:00 2001 +From 5995f83592aea874f5b423538e36675e2204582b Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 4 Jan 2022 17:01:55 +0800 Subject: [PATCH] boot: Add the --enable-keep-el compile option @@ -23,7 +23,7 @@ Change-Id: I3ba9c87cf0b59d163ca433f74c9e3a46e5ca2c63 4 files changed, 20 insertions(+), 1 deletion(-) diff --git a/Makefile.am b/Makefile.am -index 734de92..054becd 100644 +index e905602..6604baa 100644 --- a/Makefile.am +++ b/Makefile.am @@ -33,6 +33,10 @@ PSCI_CPU_ON := 0xc4000003 @@ -38,10 +38,10 @@ index 734de92..054becd 100644 COMMON_OBJ := boot.o bakery_lock.o platform.o lib.o device_tree.o diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index 6dbd5cc..157c097 100644 +index 27b1139..c079d22 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -233,7 +233,11 @@ el2_init: +@@ -254,7 +254,11 @@ el2_init: msr cnthctl_el2, x0 isb @@ -53,7 +53,7 @@ index 6dbd5cc..157c097 100644 ldr x1, =spsr_to_elx str w0, [x1] // fall through -@@ -313,5 +317,5 @@ ASM_FUNC(jump_kernel) +@@ -334,5 +338,5 @@ ASM_FUNC(jump_kernel) .align 3 flag_keep_el: .long 0 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch index a6b16e403a..e93a300fb7 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0016-Makefile-Change-COUNTER_FREQ-to-100-MHz.patch @@ -1,4 +1,4 @@ -From dd3e3f414d0e6ed1643c2e2ccac676b7fc1dc7a9 Mon Sep 17 00:00:00 2001 +From 0c0695cd3160ccdb95bae29b7668918015c0b6aa Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Tue, 1 Feb 2022 11:28:46 +0000 Subject: [PATCH] Makefile: Change COUNTER_FREQ to 100 MHz @@ -17,7 +17,7 @@ Change-Id: Ia9ad0f8ee488d1a887791f1fa1d8f3bf9c5887fd 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile.am b/Makefile.am -index 40bc5d6..b48173c 100644 +index 6604baa..cc6504e 100644 --- a/Makefile.am +++ b/Makefile.am @@ -13,7 +13,7 @@ SCRIPT_DIR := $(top_srcdir)/scripts @@ -29,6 +29,3 @@ index 40bc5d6..b48173c 100644 CPU_IDS := $(shell perl -I $(SCRIPT_DIR) $(SCRIPT_DIR)/findcpuids.pl $(KERNEL_DTB)) NR_CPUS := $(shell echo $(CPU_IDS) | tr ',' ' ' | wc -w) --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch index 8d981f525c..b63d8d1d3f 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0017-PSCI-Apply-flush-cache-after-setting-branch_data.patch @@ -1,4 +1,4 @@ -From 6923f2a0c59cf92ba5ad50ec1d658a357b4ba5d7 Mon Sep 17 00:00:00 2001 +From fa73d885be85eee4369b292ec601e7b024a68807 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 2 Nov 2021 10:48:39 +0800 Subject: [PATCH] PSCI: Apply flush cache after setting branch_data @@ -47,6 +47,3 @@ index 945780b..6efc695 100644 return PSCI_RET_SUCCESS; } --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch index 97cd3cb9e0..dd2b96537f 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0018-PSCI-Add-function-call-entry-point.patch @@ -1,4 +1,4 @@ -From ed46e83df2400b1b3f3364169aacf787bd91bd45 Mon Sep 17 00:00:00 2001 +From 9da48e3433b919868650cd60e28827273a42c63b Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 25 Jan 2022 14:56:36 +0800 Subject: [PATCH] PSCI: Add function call entry point @@ -69,6 +69,3 @@ index 6efc695..8fdefb5 100644 void __noreturn psci_first_spin(unsigned int cpu) { if (cpu == MPIDR_INVALID) --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch index 1f10209da1..c0d1fcbbb8 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0019-lds-Rearrange-and-mark-the-sections.patch @@ -1,4 +1,4 @@ -From 36b5fa3f4db49ac7aef42ff1d58a895226c7e96c Mon Sep 17 00:00:00 2001 +From 7c5e40d9f8699a55ac2187c035429c643e6d0ef0 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Tue, 2 Nov 2021 15:10:28 +0800 Subject: [PATCH] lds: Rearrange and mark the sections @@ -56,6 +56,3 @@ index ab98ddf..85451f9 100644 PROVIDE(firmware_end = .); ASSERT(etext <= (PHYS_OFFSET + TEXT_LIMIT), ".text overflow!") --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch index cafcc09bed..1573be05c4 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0020-common-Provide-firmware-info-using-libfdt.patch @@ -1,4 +1,4 @@ -From 8bdbb64d13f14d40546b71dbcfee2b2a8ea002a5 Mon Sep 17 00:00:00 2001 +From 3c1140c29c39561848056fb4b9a03042b00279f3 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Wed, 29 Dec 2021 15:17:38 +0800 Subject: [PATCH] common: Provide firmware info using libfdt @@ -340,6 +340,3 @@ index 4d0876c..7f7befc 100644 + + dt_dump_all(fw_node); +} --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch index 943afdee3a..9b367a7bfb 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/boot-wrapper-aarch64/files/fvp-baser-aemv8r64/0021-boot-Enable-firmware-node-initialization.patch @@ -1,4 +1,4 @@ -From 6dfc937d1ae54d2ae9f8c60ca29ba73ca14dc8c4 Mon Sep 17 00:00:00 2001 +From b1105e862e8f770fc195bc20e9c64d231dd32f66 Mon Sep 17 00:00:00 2001 From: Jaxson Han <jaxson.han@arm.com> Date: Wed, 29 Dec 2021 15:33:17 +0800 Subject: [PATCH] boot: Enable firmware node initialization @@ -29,7 +29,7 @@ Change-Id: Ib274485a34d26215595fd0cd737be86610289817 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/Makefile.am b/Makefile.am -index 054becd..b01809c 100644 +index cc6504e..fbe6b81 100644 --- a/Makefile.am +++ b/Makefile.am @@ -23,7 +23,7 @@ DEFINES += -DCPU_IDS=$(CPU_IDS) @@ -41,20 +41,20 @@ index 054becd..b01809c 100644 if KERNEL_32 DEFINES += -DKERNEL_32 -@@ -132,7 +132,7 @@ CHOSEN_NODE := chosen { \ - CPPFLAGS += $(INITRD_FLAGS) - CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/ +@@ -134,7 +134,7 @@ CFLAGS += -I$(top_srcdir)/include/ -I$(top_srcdir)/$(ARCH_SRC)/include/ CFLAGS += -Wall -fomit-frame-pointer + CFLAGS += -ffreestanding -nostdlib + CFLAGS += -fno-stack-protector -CFLAGS += -fno-stack-protector +CFLAGS += -fno-stack-protector -fno-builtin CFLAGS += -ffunction-sections -fdata-sections CFLAGS += -fno-pic -fno-pie LDFLAGS += --gc-sections diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S -index 157c097..f310387 100644 +index c079d22..daaa674 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S -@@ -240,6 +240,10 @@ el2_init: +@@ -261,6 +261,10 @@ el2_init: #endif ldr x1, =spsr_to_elx str w0, [x1] @@ -65,7 +65,7 @@ index 157c097..f310387 100644 // fall through el_max_init: -@@ -319,3 +323,5 @@ flag_keep_el: +@@ -340,3 +344,5 @@ flag_keep_el: .long 0 ASM_DATA(spsr_to_elx) .long 0 @@ -93,6 +93,3 @@ index ee2bea0..38b2dca 100644 *mbox = (unsigned long)&entrypoint; sevl(); --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb index 5bb8c37c56..dce29a93cd 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb @@ -8,7 +8,8 @@ LICENSE = "BSD-3-Clause & Apache-2.0" LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0 \ file://cmsis/LICENSE.txt;md5=e3fc50a88d0a364313df4b21ef20c29e" -SRC_URI = "gitsm://git.gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx.git;protocol=https;branch=master" +SRC_URI = "gitsm://git.gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx.git;protocol=https;branch=master \ + file://race.patch" SRCREV = "8c9dca74b104ff6c9722fb0738ba93dd3719c080" PV .= "+git${SRCPV}" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/race.patch b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/race.patch new file mode 100644 index 0000000000..c6bc4f2234 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/race.patch @@ -0,0 +1,66 @@ +Upstream-Status: Submitted [https://gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx/-/issues/1] +Signed-off-by: Ross Burton <ross.burton@arm.com> + +From 34e1c04534607f5605255f39fb46e26261fc9c4e Mon Sep 17 00:00:00 2001 +From: Ross Burton <ross.burton@arm.com> +Date: Tue, 8 Sep 2020 11:49:08 +0100 +Subject: [PATCH] tools/gen_module_code: atomically rewrite the generated files + +The gen_module rule in rules.mk is marked as .PHONY, so make will +execute it whenever it is mentioned. This results in gen_module_code +being executed 64 times for a Juno build. + +However in heavily parallel builds there's a good chance that +gen_module_code is writing a file whilst the compiler is reading it +because make also doesn't know what files are generated by +gen_module_code. + +The correct fix is to adjust the Makefiles so that the dependencies are +correct but this isn't trivial, so band-aid the problem by atomically +writing the generated files. + +Change-Id: I82d44f9ea6537a91002e1f80de8861d208571630 +Signed-off-by: Ross Burton <ross.burton@arm.com> +--- + tools/gen_module_code.py | 19 ++++++++++++++----- + 1 file changed, 14 insertions(+), 5 deletions(-) + +diff --git a/tools/gen_module_code.py b/tools/gen_module_code.py +index 7b3953845..ee099b713 100755 +--- a/tools/gen_module_code.py ++++ b/tools/gen_module_code.py +@@ -17,6 +17,7 @@ + import argparse + import os + import sys ++import tempfile + + DEFAULT_PATH = 'build/' + +@@ -53,13 +54,21 @@ + + def generate_file(path, filename, content): + full_filename = os.path.join(path, filename) +- with open(full_filename, 'a+') as f: +- f.seek(0) +- if f.read() != content: ++ ++ try: ++ with open(full_filename) as f: ++ rewrite = f.read() != content ++ except FileNotFoundError: ++ rewrite = True ++ ++ if rewrite: ++ with tempfile.NamedTemporaryFile(prefix="gen-module-code", ++ dir=path, ++ delete=False, ++ mode="wt") as f: + print("[GEN] {}...".format(full_filename)) +- f.seek(0) +- f.truncate() + f.write(content) ++ os.replace(f.name, full_filename) + + + def generate_header(path, modules): diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-image.bb b/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-image.bb index 76a7126b29..3a1639eaa2 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-image.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-image.bb @@ -7,10 +7,15 @@ COMPATIBLE_MACHINE = "corstone1000" inherit image inherit wic_nopt tfm_sign_image +inherit uefi_capsule PACKAGE_INSTALL = "" -IMAGE_FSTYPES += "wic wic.nopt" +IMAGE_FSTYPES += "wic wic.nopt uefi_capsule" + +UEFI_FIRMWARE_BINARY = "${PN}-${MACHINE}.${CAPSULE_IMGTYPE}" +UEFI_CAPSULE_CONFIG = "${THISDIR}/files/${PN}-capsule-update-image.json" +CAPSULE_IMGTYPE = "wic.nopt" do_sign_images() { # Sign TF-A BL2 @@ -19,7 +24,8 @@ do_sign_images() { # Update BL2 in the FIP image cp ${RECIPE_SYSROOT}/firmware/${TFA_FIP_BINARY} . - fiptool update --tb-fw ${TFM_IMAGE_SIGN_DIR}/signed_${TFA_BL2_BINARY} \ + fiptool update --tb-fw \ + ${TFM_IMAGE_SIGN_DEPLOY_DIR}/signed_${TFA_BL2_BINARY} \ ${TFM_IMAGE_SIGN_DIR}/${TFA_FIP_BINARY} # Sign the FIP image diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/images/files/corstone1000-image-capsule-update-image.json b/meta-arm/meta-arm-bsp/recipes-bsp/images/files/corstone1000-image-capsule-update-image.json new file mode 100644 index 0000000000..0f011ff740 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/images/files/corstone1000-image-capsule-update-image.json @@ -0,0 +1,11 @@ +{ + "Payloads": [ + { + "FwVersion": "5", + "Guid": "e2bb9c06-70e9-4b14-97a3-5a7913176e3f", + "LowestSupportedVersion": "1", + "Payload": "$UEFI_FIRMWARE_BINARY", + "UpdateImageIndex": "0" + } + ] +} diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend index ff22ff12de..392c6090e1 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend @@ -1,3 +1,4 @@ # Machine specific TFAs COMPATIBLE_MACHINE:corstone1000 = "corstone1000" +SRCREV:corstone1000 = "5f591f67738a1bbe6b262c53d9dad46ed8bbcd67" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend index 09ed3f793a..09ed3f793a 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-number-of-assets.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-number-of-assets.patch new file mode 100644 index 0000000000..f0368b84f9 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-number-of-assets.patch @@ -0,0 +1,38 @@ +From decb355247c4ba4b876997f55c27ec3f55dbacd2 Mon Sep 17 00:00:00 2001 +From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> +Date: Mon, 23 Jan 2023 13:25:28 +0000 +Subject: [PATCH] Platform: corstone1000: Increase number of assets + +As Corstone1000 stores at boot time few efi variables. +Therefore, number of assets is increased to compansate this early usage. + +Note: Adding platform customized configs to config_tfm.h + More information see: +https://tf-m-user-guide.trustedfirmware.org/configuration/header_file_system.html + +Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> +Upstream-Status: Pending [Not submitted yet] +--- + platform/ext/target/arm/corstone1000/config_tfm_target.h | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/platform/ext/target/arm/corstone1000/config_tfm_target.h b/platform/ext/target/arm/corstone1000/config_tfm_target.h +index bf8d2f95f7..e968366639 100644 +--- a/platform/ext/target/arm/corstone1000/config_tfm_target.h ++++ b/platform/ext/target/arm/corstone1000/config_tfm_target.h +@@ -16,4 +16,12 @@ + #undef PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE + #define PLATFORM_SERVICE_OUTPUT_BUFFER_SIZE 256 + ++/* The maximum number of assets to be stored in the Internal Trusted Storage. */ ++#undef ITS_NUM_ASSETS ++#define ITS_NUM_ASSETS 20 ++ ++/* The maximum number of assets to be stored in the Protected Storage area. */ ++#undef PS_NUM_ASSETS ++#define PS_NUM_ASSETS 20 ++ + #endif /* __CONFIG_TFM_TARGET_H__ */ +-- +2.25.1 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-1.7.0-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-1.7.0-corstone1000.inc index 279109e02c..d89aca3778 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-1.7.0-corstone1000.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-1.7.0-corstone1000.inc @@ -11,6 +11,9 @@ TFM_PLATFORM_IS_FVP ?= "FALSE" EXTRA_OECMAKE += "-DPLATFORM_IS_FVP=${TFM_PLATFORM_IS_FVP}" EXTRA_OECMAKE += "-DCC312_LEGACY_DRIVER_API_ENABLED=OFF" +## Setting SPM backend to IPC +EXTRA_OECMAKE += "-DCONFIG_TFM_SPM_BACKEND=IPC" + # libmetal LICENSE += "& BSD-3-Clause" LIC_FILES_CHKSUM += "file://../libmetal/LICENSE.md;md5=fe0b8a4beea8f0813b606d15a3df3d3c" @@ -26,6 +29,11 @@ SRCREV_openamp = "347397decaa43372fc4d00f965640ebde042966d" EXTRA_OECMAKE += "-DLIBOPENAMP_SRC_PATH=${S}/../openamp -DLIBOPENAMP_BIN_PATH=${B}/libopenamp-build" +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +SRC_URI:append= " \ + file://0001-Platform-corstone1000-Increase-number-of-assets.patch \ + " + do_install() { install -D -p -m 0644 ${B}/install/outputs/tfm_s_signed.bin ${D}/firmware/tfm_s_signed.bin install -D -p -m 0644 ${B}/install/outputs/bl2_signed.bin ${D}/firmware/bl2_signed.bin |