blob: aca4dc037b70b7284e6f997264c4c66d2701d8ac (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __LINUX_MDIO_BITBANG_H
#define __LINUX_MDIO_BITBANG_H
#include <linux/phy.h>
struct module;
struct mdiobb_ctrl;
struct mdiobb_ops {
struct module *owner;
/* Set the Management Data Clock high if level is one,
* low if level is zero.
*/
void (*set_mdc)(struct mdiobb_ctrl *ctrl, int level);
/* Configure the Management Data I/O pin as an input if
* "output" is zero, or an output if "output" is one.
*/
void (*set_mdio_dir)(struct mdiobb_ctrl *ctrl, int output);
/* Set the Management Data I/O pin high if value is one,
* low if "value" is zero. This may only be called
* when the MDIO pin is configured as an output.
*/
void (*set_mdio_data)(struct mdiobb_ctrl *ctrl, int value);
/* Retrieve the state Management Data I/O pin. */
int (*get_mdio_data)(struct mdiobb_ctrl *ctrl);
};
struct mdiobb_ctrl {
const struct mdiobb_ops *ops;
};
int mdiobb_read(struct mii_bus *bus, int phy, int reg);
int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val);
/* The returned bus is not yet registered with the phy layer. */
struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl);
/* The bus must already have been unregistered. */
void free_mdio_bitbang(struct mii_bus *bus);
#endif
|