1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
|
/*
* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <linux/delay.h>
#include "mt76x2u.h"
#include "eeprom.h"
#include "../mt76x02_phy.h"
#include "../mt76x02_usb.h"
static void mt76x2u_init_dma(struct mt76x02_dev *dev)
{
u32 val = mt76_rr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG));
val |= MT_USB_DMA_CFG_RX_DROP_OR_PAD |
MT_USB_DMA_CFG_RX_BULK_EN |
MT_USB_DMA_CFG_TX_BULK_EN;
/* disable AGGR_BULK_RX in order to receive one
* frame in each rx urb and avoid copies
*/
val &= ~MT_USB_DMA_CFG_RX_BULK_AGG_EN;
mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val);
}
static void mt76x2u_power_on_rf_patch(struct mt76x02_dev *dev)
{
mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) | BIT(16));
udelay(1);
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x1c), 0xff);
mt76_set(dev, MT_VEND_ADDR(CFG, 0x1c), 0x30);
mt76_wr(dev, MT_VEND_ADDR(CFG, 0x14), 0x484f);
udelay(1);
mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(17));
usleep_range(150, 200);
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x130), BIT(16));
usleep_range(50, 100);
mt76_set(dev, MT_VEND_ADDR(CFG, 0x14c), BIT(19) | BIT(20));
}
static void mt76x2u_power_on_rf(struct mt76x02_dev *dev, int unit)
{
int shift = unit ? 8 : 0;
u32 val = (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift;
/* Enable RF BG */
mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) << shift);
usleep_range(10, 20);
/* Enable RFDIG LDO/AFE/ABB/ADDA */
mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), val);
usleep_range(10, 20);
/* Switch RFDIG power to internal LDO */
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x130), BIT(2) << shift);
usleep_range(10, 20);
mt76x2u_power_on_rf_patch(dev);
mt76_set(dev, 0x530, 0xf);
}
static void mt76x2u_power_on(struct mt76x02_dev *dev)
{
u32 val;
/* Turn on WL MTCMOS */
mt76_set(dev, MT_VEND_ADDR(CFG, 0x148),
MT_WLAN_MTC_CTRL_MTCMOS_PWR_UP);
val = MT_WLAN_MTC_CTRL_STATE_UP |
MT_WLAN_MTC_CTRL_PWR_ACK |
MT_WLAN_MTC_CTRL_PWR_ACK_S;
mt76_poll(dev, MT_VEND_ADDR(CFG, 0x148), val, val, 1000);
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x148), 0x7f << 16);
usleep_range(10, 20);
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x148), 0xf << 24);
usleep_range(10, 20);
mt76_set(dev, MT_VEND_ADDR(CFG, 0x148), 0xf << 24);
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x148), 0xfff);
/* Turn on AD/DA power down */
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x1204), BIT(3));
/* WLAN function enable */
mt76_set(dev, MT_VEND_ADDR(CFG, 0x80), BIT(0));
/* Release BBP software reset */
mt76_clear(dev, MT_VEND_ADDR(CFG, 0x64), BIT(18));
mt76x2u_power_on_rf(dev, 0);
mt76x2u_power_on_rf(dev, 1);
}
static int mt76x2u_init_eeprom(struct mt76x02_dev *dev)
{
u32 val, i;
dev->mt76.eeprom.data = devm_kzalloc(dev->mt76.dev,
MT7612U_EEPROM_SIZE,
GFP_KERNEL);
dev->mt76.eeprom.size = MT7612U_EEPROM_SIZE;
if (!dev->mt76.eeprom.data)
return -ENOMEM;
for (i = 0; i + 4 <= MT7612U_EEPROM_SIZE; i += 4) {
val = mt76_rr(dev, MT_VEND_ADDR(EEPROM, i));
put_unaligned_le32(val, dev->mt76.eeprom.data + i);
}
mt76x02_eeprom_parse_hw_cap(dev);
return 0;
}
struct mt76x02_dev *mt76x2u_alloc_device(struct device *pdev)
{
static const struct mt76_driver_ops drv_ops = {
.tx_prepare_skb = mt76x02u_tx_prepare_skb,
.tx_complete_skb = mt76x02u_tx_complete_skb,
.tx_status_data = mt76x02_tx_status_data,
.rx_skb = mt76x02_queue_rx_skb,
};
struct mt76x02_dev *dev;
struct mt76_dev *mdev;
mdev = mt76_alloc_device(sizeof(*dev), &mt76x2u_ops);
if (!mdev)
return NULL;
dev = container_of(mdev, struct mt76x02_dev, mt76);
mdev->dev = pdev;
mdev->drv = &drv_ops;
return dev;
}
static void mt76x2u_init_beacon_offsets(struct mt76x02_dev *dev)
{
mt76_wr(dev, MT_BCN_OFFSET(0), 0x18100800);
mt76_wr(dev, MT_BCN_OFFSET(1), 0x38302820);
mt76_wr(dev, MT_BCN_OFFSET(2), 0x58504840);
mt76_wr(dev, MT_BCN_OFFSET(3), 0x78706860);
}
int mt76x2u_init_hardware(struct mt76x02_dev *dev)
{
int i, k, err;
mt76x2_reset_wlan(dev, true);
mt76x2u_power_on(dev);
if (!mt76x02_wait_for_mac(&dev->mt76))
return -ETIMEDOUT;
err = mt76x2u_mcu_fw_init(dev);
if (err < 0)
return err;
if (!mt76_poll_msec(dev, MT_WPDMA_GLO_CFG,
MT_WPDMA_GLO_CFG_TX_DMA_BUSY |
MT_WPDMA_GLO_CFG_RX_DMA_BUSY, 0, 100))
return -EIO;
/* wait for asic ready after fw load. */
if (!mt76x02_wait_for_mac(&dev->mt76))
return -ETIMEDOUT;
mt76x2u_init_dma(dev);
err = mt76x2u_mcu_init(dev);
if (err < 0)
return err;
err = mt76x2u_mac_reset(dev);
if (err < 0)
return err;
mt76x02_mac_setaddr(dev, dev->mt76.eeprom.data + MT_EE_MAC_ADDR);
dev->mt76.rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG);
mt76x2u_init_beacon_offsets(dev);
if (!mt76x02_wait_for_txrx_idle(&dev->mt76))
return -ETIMEDOUT;
/* reset wcid table */
for (i = 0; i < 256; i++)
mt76x02_mac_wcid_setup(dev, i, 0, NULL);
/* reset shared key table and pairwise key table */
for (i = 0; i < 16; i++) {
for (k = 0; k < 4; k++)
mt76x02_mac_shared_key_setup(dev, i, k, NULL);
}
mt76_clear(dev, MT_BEACON_TIME_CFG,
MT_BEACON_TIME_CFG_TIMER_EN |
MT_BEACON_TIME_CFG_SYNC_MODE |
MT_BEACON_TIME_CFG_TBTT_EN |
MT_BEACON_TIME_CFG_BEACON_TX);
mt76_rmw(dev, MT_US_CYC_CFG, MT_US_CYC_CNT, 0x1e);
mt76_wr(dev, MT_TXOP_CTRL_CFG, 0x583f);
err = mt76x2_mcu_load_cr(dev, MT_RF_BBP_CR, 0, 0);
if (err < 0)
return err;
mt76x02_phy_set_rxpath(dev);
mt76x02_phy_set_txdac(dev);
return mt76x2u_mac_stop(dev);
}
int mt76x2u_register_device(struct mt76x02_dev *dev)
{
struct ieee80211_hw *hw = mt76_hw(dev);
int err;
INIT_DELAYED_WORK(&dev->cal_work, mt76x2u_phy_calibrate);
mt76x02_init_device(dev);
err = mt76x2u_init_eeprom(dev);
if (err < 0)
return err;
err = mt76u_alloc_queues(&dev->mt76);
if (err < 0)
goto fail;
err = mt76u_mcu_init_rx(&dev->mt76);
if (err < 0)
goto fail;
err = mt76x2u_init_hardware(dev);
if (err < 0)
goto fail;
err = mt76_register_device(&dev->mt76, true, mt76x02_rates,
ARRAY_SIZE(mt76x02_rates));
if (err)
goto fail;
/* check hw sg support in order to enable AMSDU */
if (mt76u_check_sg(&dev->mt76))
hw->max_tx_fragments = MT_SG_MAX_SIZE;
else
hw->max_tx_fragments = 1;
set_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
mt76x02_init_debugfs(dev);
mt76x2_init_txpower(dev, &dev->mt76.sband_2g.sband);
mt76x2_init_txpower(dev, &dev->mt76.sband_5g.sband);
return 0;
fail:
mt76x2u_cleanup(dev);
return err;
}
void mt76x2u_stop_hw(struct mt76x02_dev *dev)
{
mt76u_stop_stat_wk(&dev->mt76);
cancel_delayed_work_sync(&dev->cal_work);
cancel_delayed_work_sync(&dev->mac_work);
mt76x2u_mac_stop(dev);
}
void mt76x2u_cleanup(struct mt76x02_dev *dev)
{
mt76x02_mcu_set_radio_state(dev, false);
mt76x2u_stop_hw(dev);
mt76u_queues_deinit(&dev->mt76);
mt76u_mcu_deinit(&dev->mt76);
}
|
