From d9b2b2a277219d4812311d995054ce4f95067725 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 13 Feb 2008 16:56:49 -0800 Subject: [LIB]: Make PowerPC LMB code generic so sparc64 can use it too. Signed-off-by: David S. Miller --- include/asm-powerpc/abs_addr.h | 3 +- include/asm-powerpc/lmb.h | 82 ++++------------------------------------- include/asm-sparc64/lmb.h | 10 +++++ include/linux/lmb.h | 83 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 103 insertions(+), 75 deletions(-) create mode 100644 include/asm-sparc64/lmb.h create mode 100644 include/linux/lmb.h (limited to 'include') diff --git a/include/asm-powerpc/abs_addr.h b/include/asm-powerpc/abs_addr.h index 4aa220718b19..98324c5a8286 100644 --- a/include/asm-powerpc/abs_addr.h +++ b/include/asm-powerpc/abs_addr.h @@ -12,10 +12,11 @@ * 2 of the License, or (at your option) any later version. */ +#include + #include #include #include -#include #include struct mschunks_map { diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h index 5d1dc48a0bb8..028184b6a162 100644 --- a/include/asm-powerpc/lmb.h +++ b/include/asm-powerpc/lmb.h @@ -1,81 +1,15 @@ #ifndef _ASM_POWERPC_LMB_H #define _ASM_POWERPC_LMB_H -#ifdef __KERNEL__ -/* - * Definitions for talking to the Open Firmware PROM on - * Power Macintosh computers. - * - * Copyright (C) 2001 Peter Bergner, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ +#include -#include -#include +#define LMB_DBG(fmt...) udbg_printf(fmt) -#define MAX_LMB_REGIONS 128 +#ifdef CONFIG_PPC32 +extern unsigned long __max_low_memory; +#define LMB_REAL_LIMIT __max_low_memory +#else +#define LMB_REAL_LIMIT 0 +#endif -struct lmb_property { - unsigned long base; - unsigned long size; -}; - -struct lmb_region { - unsigned long cnt; - unsigned long size; - struct lmb_property region[MAX_LMB_REGIONS+1]; -}; - -struct lmb { - unsigned long debug; - unsigned long rmo_size; - struct lmb_region memory; - struct lmb_region reserved; -}; - -extern struct lmb lmb; - -extern void __init lmb_init(void); -extern void __init lmb_analyze(void); -extern long __init lmb_add(unsigned long base, unsigned long size); -extern long __init lmb_reserve(unsigned long base, unsigned long size); -extern unsigned long __init lmb_alloc(unsigned long size, unsigned long align); -extern unsigned long __init lmb_alloc_base(unsigned long size, - unsigned long align, unsigned long max_addr); -extern unsigned long __init __lmb_alloc_base(unsigned long size, - unsigned long align, unsigned long max_addr); -extern unsigned long __init lmb_phys_mem_size(void); -extern unsigned long __init lmb_end_of_DRAM(void); -extern void __init lmb_enforce_memory_limit(unsigned long memory_limit); -extern int __init lmb_is_reserved(unsigned long addr); - -extern void lmb_dump_all(void); - -static inline unsigned long -lmb_size_bytes(struct lmb_region *type, unsigned long region_nr) -{ - return type->region[region_nr].size; -} -static inline unsigned long -lmb_size_pages(struct lmb_region *type, unsigned long region_nr) -{ - return lmb_size_bytes(type, region_nr) >> PAGE_SHIFT; -} -static inline unsigned long -lmb_start_pfn(struct lmb_region *type, unsigned long region_nr) -{ - return type->region[region_nr].base >> PAGE_SHIFT; -} -static inline unsigned long -lmb_end_pfn(struct lmb_region *type, unsigned long region_nr) -{ - return lmb_start_pfn(type, region_nr) + - lmb_size_pages(type, region_nr); -} - -#endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_LMB_H */ diff --git a/include/asm-sparc64/lmb.h b/include/asm-sparc64/lmb.h new file mode 100644 index 000000000000..6a352cbcf520 --- /dev/null +++ b/include/asm-sparc64/lmb.h @@ -0,0 +1,10 @@ +#ifndef _SPARC64_LMB_H +#define _SPARC64_LMB_H + +#include + +#define LMB_DBG(fmt...) prom_printf(fmt) + +#define LMB_REAL_LIMIT 0 + +#endif /* !(_SPARC64_LMB_H) */ diff --git a/include/linux/lmb.h b/include/linux/lmb.h new file mode 100644 index 000000000000..8b93f63407e9 --- /dev/null +++ b/include/linux/lmb.h @@ -0,0 +1,83 @@ +#ifndef _LINUX_LMB_H +#define _LINUX_LMB_H +#ifdef __KERNEL__ + +/* + * Logical memory blocks. + * + * Copyright (C) 2001 Peter Bergner, IBM Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include + +#define MAX_LMB_REGIONS 128 + +struct lmb_property { + unsigned long base; + unsigned long size; +}; + +struct lmb_region { + unsigned long cnt; + unsigned long size; + struct lmb_property region[MAX_LMB_REGIONS+1]; +}; + +struct lmb { + unsigned long debug; + unsigned long rmo_size; + struct lmb_region memory; + struct lmb_region reserved; +}; + +extern struct lmb lmb; + +extern void __init lmb_init(void); +extern void __init lmb_analyze(void); +extern long __init lmb_add(unsigned long base, unsigned long size); +extern long __init lmb_reserve(unsigned long base, unsigned long size); +extern unsigned long __init lmb_alloc(unsigned long size, unsigned long align); +extern unsigned long __init lmb_alloc_base(unsigned long size, + unsigned long align, unsigned long max_addr); +extern unsigned long __init __lmb_alloc_base(unsigned long size, + unsigned long align, unsigned long max_addr); +extern unsigned long __init lmb_phys_mem_size(void); +extern unsigned long __init lmb_end_of_DRAM(void); +extern void __init lmb_enforce_memory_limit(unsigned long memory_limit); +extern int __init lmb_is_reserved(unsigned long addr); + +extern void lmb_dump_all(void); + +static inline unsigned long +lmb_size_bytes(struct lmb_region *type, unsigned long region_nr) +{ + return type->region[region_nr].size; +} +static inline unsigned long +lmb_size_pages(struct lmb_region *type, unsigned long region_nr) +{ + return lmb_size_bytes(type, region_nr) >> PAGE_SHIFT; +} +static inline unsigned long +lmb_start_pfn(struct lmb_region *type, unsigned long region_nr) +{ + return type->region[region_nr].base >> PAGE_SHIFT; +} +static inline unsigned long +lmb_end_pfn(struct lmb_region *type, unsigned long region_nr) +{ + return lmb_start_pfn(type, region_nr) + + lmb_size_pages(type, region_nr); +} + +#include + +#endif /* __KERNEL__ */ + +#endif /* _LINUX_LMB_H */ -- cgit v1.2.3 From e5f270954364a4add74e8445b1db925ac534fcfb Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 13 Feb 2008 16:58:39 -0800 Subject: [LMB]: Make lmb support large physical addressing Convert the lmb code to use u64 instead of unsigned long for physical addresses and sizes. This is needed to support large amounts of RAM on 32-bit systems that support 36-bit physical addressing. Signed-off-by: Becky Bruce Signed-off-by: David S. Miller --- include/linux/lmb.h | 38 +++++++++++----------- lib/lmb.c | 93 ++++++++++++++++++++++++++--------------------------- 2 files changed, 65 insertions(+), 66 deletions(-) (limited to 'include') diff --git a/include/linux/lmb.h b/include/linux/lmb.h index 8b93f63407e9..632717c6a2ba 100644 --- a/include/linux/lmb.h +++ b/include/linux/lmb.h @@ -19,19 +19,19 @@ #define MAX_LMB_REGIONS 128 struct lmb_property { - unsigned long base; - unsigned long size; + u64 base; + u64 size; }; struct lmb_region { unsigned long cnt; - unsigned long size; + u64 size; struct lmb_property region[MAX_LMB_REGIONS+1]; }; struct lmb { unsigned long debug; - unsigned long rmo_size; + u64 rmo_size; struct lmb_region memory; struct lmb_region reserved; }; @@ -40,36 +40,36 @@ extern struct lmb lmb; extern void __init lmb_init(void); extern void __init lmb_analyze(void); -extern long __init lmb_add(unsigned long base, unsigned long size); -extern long __init lmb_reserve(unsigned long base, unsigned long size); -extern unsigned long __init lmb_alloc(unsigned long size, unsigned long align); -extern unsigned long __init lmb_alloc_base(unsigned long size, - unsigned long align, unsigned long max_addr); -extern unsigned long __init __lmb_alloc_base(unsigned long size, - unsigned long align, unsigned long max_addr); -extern unsigned long __init lmb_phys_mem_size(void); -extern unsigned long __init lmb_end_of_DRAM(void); -extern void __init lmb_enforce_memory_limit(unsigned long memory_limit); -extern int __init lmb_is_reserved(unsigned long addr); +extern long __init lmb_add(u64 base, u64 size); +extern long __init lmb_reserve(u64 base, u64 size); +extern u64 __init lmb_alloc(u64 size, u64 align); +extern u64 __init lmb_alloc_base(u64 size, + u64, u64 max_addr); +extern u64 __init __lmb_alloc_base(u64 size, + u64 align, u64 max_addr); +extern u64 __init lmb_phys_mem_size(void); +extern u64 __init lmb_end_of_DRAM(void); +extern void __init lmb_enforce_memory_limit(u64 memory_limit); +extern int __init lmb_is_reserved(u64 addr); extern void lmb_dump_all(void); -static inline unsigned long +static inline u64 lmb_size_bytes(struct lmb_region *type, unsigned long region_nr) { return type->region[region_nr].size; } -static inline unsigned long +static inline u64 lmb_size_pages(struct lmb_region *type, unsigned long region_nr) { return lmb_size_bytes(type, region_nr) >> PAGE_SHIFT; } -static inline unsigned long +static inline u64 lmb_start_pfn(struct lmb_region *type, unsigned long region_nr) { return type->region[region_nr].base >> PAGE_SHIFT; } -static inline unsigned long +static inline u64 lmb_end_pfn(struct lmb_region *type, unsigned long region_nr) { return lmb_start_pfn(type, region_nr) + diff --git a/lib/lmb.c b/lib/lmb.c index e34a9e586c42..e3c8dcb04b46 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -34,33 +34,34 @@ void lmb_dump_all(void) DBG("lmb_dump_all:\n"); DBG(" memory.cnt = 0x%lx\n", lmb.memory.cnt); - DBG(" memory.size = 0x%lx\n", lmb.memory.size); + DBG(" memory.size = 0x%llx\n", + (unsigned long long)lmb.memory.size); for (i=0; i < lmb.memory.cnt ;i++) { - DBG(" memory.region[0x%x].base = 0x%lx\n", - i, lmb.memory.region[i].base); - DBG(" .size = 0x%lx\n", - lmb.memory.region[i].size); + DBG(" memory.region[0x%x].base = 0x%llx\n", + i, (unsigned long long)lmb.memory.region[i].base); + DBG(" .size = 0x%llx\n", + (unsigned long long)lmb.memory.region[i].size); } DBG("\n reserved.cnt = 0x%lx\n", lmb.reserved.cnt); DBG(" reserved.size = 0x%lx\n", lmb.reserved.size); for (i=0; i < lmb.reserved.cnt ;i++) { - DBG(" reserved.region[0x%x].base = 0x%lx\n", - i, lmb.reserved.region[i].base); - DBG(" .size = 0x%lx\n", - lmb.reserved.region[i].size); + DBG(" reserved.region[0x%x].base = 0x%llx\n", + i, (unsigned long long)lmb.reserved.region[i].base); + DBG(" .size = 0x%llx\n", + (unsigned long long)lmb.reserved.region[i].size); } #endif /* DEBUG */ } -static unsigned long __init lmb_addrs_overlap(unsigned long base1, - unsigned long size1, unsigned long base2, unsigned long size2) +static unsigned long __init lmb_addrs_overlap(u64 base1, + u64 size1, u64 base2, u64 size2) { return ((base1 < (base2+size2)) && (base2 < (base1+size1))); } -static long __init lmb_addrs_adjacent(unsigned long base1, unsigned long size1, - unsigned long base2, unsigned long size2) +static long __init lmb_addrs_adjacent(u64 base1, u64 size1, + u64 base2, u64 size2) { if (base2 == base1 + size1) return 1; @@ -73,10 +74,10 @@ static long __init lmb_addrs_adjacent(unsigned long base1, unsigned long size1, static long __init lmb_regions_adjacent(struct lmb_region *rgn, unsigned long r1, unsigned long r2) { - unsigned long base1 = rgn->region[r1].base; - unsigned long size1 = rgn->region[r1].size; - unsigned long base2 = rgn->region[r2].base; - unsigned long size2 = rgn->region[r2].size; + u64 base1 = rgn->region[r1].base; + u64 size1 = rgn->region[r1].size; + u64 base2 = rgn->region[r2].base; + u64 size2 = rgn->region[r2].size; return lmb_addrs_adjacent(base1, size1, base2, size2); } @@ -128,8 +129,7 @@ void __init lmb_analyze(void) } /* This routine called with relocation disabled. */ -static long __init lmb_add_region(struct lmb_region *rgn, unsigned long base, - unsigned long size) +static long __init lmb_add_region(struct lmb_region *rgn, u64 base, u64 size) { unsigned long coalesced = 0; long adjacent, i; @@ -142,8 +142,8 @@ static long __init lmb_add_region(struct lmb_region *rgn, unsigned long base, /* First try and coalesce this LMB with another. */ for (i=0; i < rgn->cnt; i++) { - unsigned long rgnbase = rgn->region[i].base; - unsigned long rgnsize = rgn->region[i].size; + u64 rgnbase = rgn->region[i].base; + u64 rgnsize = rgn->region[i].size; if ((rgnbase == base) && (rgnsize == size)) /* Already have this region, so we're done */ @@ -190,7 +190,7 @@ static long __init lmb_add_region(struct lmb_region *rgn, unsigned long base, } /* This routine may be called with relocation disabled. */ -long __init lmb_add(unsigned long base, unsigned long size) +long __init lmb_add(u64 base, u64 size) { struct lmb_region *_rgn = &(lmb.memory); @@ -202,7 +202,7 @@ long __init lmb_add(unsigned long base, unsigned long size) } -long __init lmb_reserve(unsigned long base, unsigned long size) +long __init lmb_reserve(u64 base, u64 size) { struct lmb_region *_rgn = &(lmb.reserved); @@ -211,14 +211,14 @@ long __init lmb_reserve(unsigned long base, unsigned long size) return lmb_add_region(_rgn, base, size); } -long __init lmb_overlaps_region(struct lmb_region *rgn, unsigned long base, - unsigned long size) +long __init lmb_overlaps_region(struct lmb_region *rgn, u64 base, + u64 size) { unsigned long i; for (i=0; i < rgn->cnt; i++) { - unsigned long rgnbase = rgn->region[i].base; - unsigned long rgnsize = rgn->region[i].size; + u64 rgnbase = rgn->region[i].base; + u64 rgnsize = rgn->region[i].size; if ( lmb_addrs_overlap(base,size,rgnbase,rgnsize) ) { break; } @@ -227,40 +227,38 @@ long __init lmb_overlaps_region(struct lmb_region *rgn, unsigned long base, return (i < rgn->cnt) ? i : -1; } -unsigned long __init lmb_alloc(unsigned long size, unsigned long align) +u64 __init lmb_alloc(u64 size, u64 align) { return lmb_alloc_base(size, align, LMB_ALLOC_ANYWHERE); } -unsigned long __init lmb_alloc_base(unsigned long size, unsigned long align, - unsigned long max_addr) +u64 __init lmb_alloc_base(u64 size, u64 align, u64 max_addr) { - unsigned long alloc; + u64 alloc; alloc = __lmb_alloc_base(size, align, max_addr); if (alloc == 0) - panic("ERROR: Failed to allocate 0x%lx bytes below 0x%lx.\n", - size, max_addr); + panic("ERROR: Failed to allocate 0x%llx bytes below 0x%llx.\n", + (unsigned long long) size, (unsigned long long) max_addr); return alloc; } -static unsigned long lmb_align_down(unsigned long addr, unsigned long size) +static u64 lmb_align_down(u64 addr, u64 size) { return addr & ~(size - 1); } -static unsigned long lmb_align_up(unsigned long addr, unsigned long size) +static u64 lmb_align_up(u64 addr, u64 size) { return (addr + (size - 1)) & ~(size - 1); } -unsigned long __init __lmb_alloc_base(unsigned long size, unsigned long align, - unsigned long max_addr) +u64 __init __lmb_alloc_base(u64 size, u64 align, u64 max_addr) { long i, j; - unsigned long base = 0; + u64 base = 0; BUG_ON(0 == size); @@ -269,8 +267,8 @@ unsigned long __init __lmb_alloc_base(unsigned long size, unsigned long align, max_addr = LMB_REAL_LIMIT; for (i = lmb.memory.cnt-1; i >= 0; i--) { - unsigned long lmbbase = lmb.memory.region[i].base; - unsigned long lmbsize = lmb.memory.region[i].size; + u64 lmbbase = lmb.memory.region[i].base; + u64 lmbsize = lmb.memory.region[i].size; if (max_addr == LMB_ALLOC_ANYWHERE) base = lmb_align_down(lmbbase + lmbsize - size, align); @@ -299,12 +297,12 @@ unsigned long __init __lmb_alloc_base(unsigned long size, unsigned long align, } /* You must call lmb_analyze() before this. */ -unsigned long __init lmb_phys_mem_size(void) +u64 __init lmb_phys_mem_size(void) { return lmb.memory.size; } -unsigned long __init lmb_end_of_DRAM(void) +u64 __init lmb_end_of_DRAM(void) { int idx = lmb.memory.cnt - 1; @@ -312,9 +310,10 @@ unsigned long __init lmb_end_of_DRAM(void) } /* You must call lmb_analyze() after this. */ -void __init lmb_enforce_memory_limit(unsigned long memory_limit) +void __init lmb_enforce_memory_limit(u64 memory_limit) { - unsigned long i, limit; + unsigned long i; + u64 limit; struct lmb_property *p; if (! memory_limit) @@ -352,13 +351,13 @@ void __init lmb_enforce_memory_limit(unsigned long memory_limit) } } -int __init lmb_is_reserved(unsigned long addr) +int __init lmb_is_reserved(u64 addr) { int i; for (i = 0; i < lmb.reserved.cnt; i++) { - unsigned long upper = lmb.reserved.region[i].base + - lmb.reserved.region[i].size - 1; + u64 upper = lmb.reserved.region[i].base + + lmb.reserved.region[i].size - 1; if ((addr >= lmb.reserved.region[i].base) && (addr <= upper)) return 1; } -- cgit v1.2.3 From f8c8803bda4db47cbbdadb9b27b024e903e1d645 Mon Sep 17 00:00:00 2001 From: Badari Pulavarty Date: Tue, 29 Jan 2008 09:19:24 +1100 Subject: [POWERPC] Add code for removing HPTEs for parts of the linear mapping For memory remove, we need to clean up htab mappings for the section of the memory we are removing. This implements support for removing htab bolted mappings for pSeries logical partitions. Other sub-archs may need to implement similar functionality for hotplug memory remove to work on them. Signed-off-by: Badari Pulavarty Signed-off-by: Paul Mackerras --- arch/powerpc/mm/hash_utils_64.c | 23 +++++++++++++++++++++++ arch/powerpc/platforms/pseries/lpar.c | 15 +++++++++++++++ include/asm-powerpc/machdep.h | 2 ++ include/asm-powerpc/sparsemem.h | 1 + 4 files changed, 41 insertions(+) (limited to 'include') diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 73b78486abfc..4cc53f92377e 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -192,6 +192,24 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, return ret < 0 ? ret : 0; } +static void htab_remove_mapping(unsigned long vstart, unsigned long vend, + int psize, int ssize) +{ + unsigned long vaddr; + unsigned int step, shift; + + shift = mmu_psize_defs[psize].shift; + step = 1 << shift; + + if (!ppc_md.hpte_removebolted) { + printk("Sub-arch doesn't implement hpte_removebolted\n"); + return; + } + + for (vaddr = vstart; vaddr < vend; vaddr += step) + ppc_md.hpte_removebolted(vaddr, psize, ssize); +} + static int __init htab_dt_scan_seg_sizes(unsigned long node, const char *uname, int depth, void *data) @@ -430,6 +448,11 @@ void create_section_mapping(unsigned long start, unsigned long end) _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX, mmu_linear_psize, mmu_kernel_ssize)); } + +void remove_section_mapping(unsigned long start, unsigned long end) +{ + htab_remove_mapping(start, end, mmu_linear_psize, mmu_kernel_ssize); +} #endif /* CONFIG_MEMORY_HOTPLUG */ static inline void make_bl(unsigned int *insn_addr, void *func) diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 9a455d46379d..233d9be25f49 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c @@ -520,6 +520,20 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va, BUG_ON(lpar_rc != H_SUCCESS); } +static void pSeries_lpar_hpte_removebolted(unsigned long ea, + int psize, int ssize) +{ + unsigned long slot, vsid, va; + + vsid = get_kernel_vsid(ea, ssize); + va = hpt_va(ea, vsid, ssize); + + slot = pSeries_lpar_hpte_find(va, psize, ssize); + BUG_ON(slot == -1); + + pSeries_lpar_hpte_invalidate(slot, va, psize, ssize, 0); +} + /* Flag bits for H_BULK_REMOVE */ #define HBR_REQUEST 0x4000000000000000UL #define HBR_RESPONSE 0x8000000000000000UL @@ -597,6 +611,7 @@ void __init hpte_init_lpar(void) ppc_md.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp; ppc_md.hpte_insert = pSeries_lpar_hpte_insert; ppc_md.hpte_remove = pSeries_lpar_hpte_remove; + ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted; ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; } diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h index 0872ec228c1e..b95386aed50d 100644 --- a/include/asm-powerpc/machdep.h +++ b/include/asm-powerpc/machdep.h @@ -68,6 +68,8 @@ struct machdep_calls { unsigned long vflags, int psize, int ssize); long (*hpte_remove)(unsigned long hpte_group); + void (*hpte_removebolted)(unsigned long ea, + int psize, int ssize); void (*flush_hash_range)(unsigned long number, int local); /* special for kexec, to be called in real mode, linar mapping is diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h index e8b493d52b4f..c5acf4ccf571 100644 --- a/include/asm-powerpc/sparsemem.h +++ b/include/asm-powerpc/sparsemem.h @@ -15,6 +15,7 @@ #ifdef CONFIG_MEMORY_HOTPLUG extern void create_section_mapping(unsigned long start, unsigned long end); +extern void remove_section_mapping(unsigned long start, unsigned long end); #ifdef CONFIG_NUMA extern int hot_add_scn_to_nid(unsigned long scn_addr); #else -- cgit v1.2.3 From 6a2d322e4b81edc2ab35573f1c52f93d1d16eebb Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 22 Feb 2008 14:26:43 +1100 Subject: [POWERPC] Fix thinko in cpu_thread_mask_to_cores() The function cpu_thread_mask_to_cores() which returns a cpumask of one and only one thread enabled for a given core has a bug as it's shifting things in the wrong direction. Note: The implementation is still sub-optimal in the sense that for a given core, the thread set in the result may not be any of the threads set in the input, which can lead to more IPIs then strictly necessary, but it isn't incorrect per-se. I'll improve that later. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/cputhreads.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/cputhreads.h b/include/asm-powerpc/cputhreads.h index 8485c28b5f47..fb11b0c459b8 100644 --- a/include/asm-powerpc/cputhreads.h +++ b/include/asm-powerpc/cputhreads.h @@ -35,7 +35,7 @@ static inline cpumask_t cpu_thread_mask_to_cores(cpumask_t threads) res = CPU_MASK_NONE; for (i = 0; i < NR_CPUS; i += threads_per_core) { - cpus_shift_right(tmp, threads_core_mask, i); + cpus_shift_left(tmp, threads_core_mask, i); if (cpus_intersects(threads, tmp)) cpu_set(i, res); } -- cgit v1.2.3 From afea3278f73c14271ee60ca7593ad74b7a946486 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 5 Mar 2008 12:11:48 -0600 Subject: pasemi_mac: Move RX/TX section enablement to dma_lib Also stop both rx and tx sections before changing the configuration of the dma device during init. Signed-off-by: Olof Johansson Acked-by: Jeff Garzik --- arch/powerpc/platforms/pasemi/dma_lib.c | 30 ++++++++++++++++++++++++++++++ drivers/net/pasemi_mac.c | 6 ------ include/asm-powerpc/pasemi_dma.h | 7 ++++++- 3 files changed, 36 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c index c529d8dff395..48cb7c99962d 100644 --- a/arch/powerpc/platforms/pasemi/dma_lib.c +++ b/arch/powerpc/platforms/pasemi/dma_lib.c @@ -17,6 +17,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include #include #include #include @@ -410,6 +411,7 @@ int pasemi_dma_init(void) struct resource res; struct device_node *dn; int i, intf, err = 0; + unsigned long timeout; u32 tmp; if (!machine_is(pasemi)) @@ -478,6 +480,34 @@ int pasemi_dma_init(void) for (i = 0; i < MAX_RXCH; i++) __set_bit(i, rxch_free); + timeout = jiffies + HZ; + pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, 0); + while (pasemi_read_dma_reg(PAS_DMA_COM_RXSTA) & 1) { + if (time_after(jiffies, timeout)) { + pr_warning("Warning: Could not disable RX section\n"); + break; + } + } + + timeout = jiffies + HZ; + pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, 0); + while (pasemi_read_dma_reg(PAS_DMA_COM_TXSTA) & 1) { + if (time_after(jiffies, timeout)) { + pr_warning("Warning: Could not disable TX section\n"); + break; + } + } + + /* setup resource allocations for the different DMA sections */ + tmp = pasemi_read_dma_reg(PAS_DMA_COM_CFG); + pasemi_write_dma_reg(PAS_DMA_COM_CFG, tmp | 0x18000000); + + /* enable tx section */ + pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN); + + /* enable rx section */ + pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN); + printk(KERN_INFO "PA Semi PWRficient DMA library initialized " "(%d tx, %d rx channels)\n", num_txch, num_rxch); diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c index 2e39e0285d8f..6ea822addde5 100644 --- a/drivers/net/pasemi_mac.c +++ b/drivers/net/pasemi_mac.c @@ -1043,12 +1043,6 @@ static int pasemi_mac_open(struct net_device *dev) unsigned int flags; int ret; - /* enable rx section */ - write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN); - - /* enable tx section */ - write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN); - flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) | PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) | PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12); diff --git a/include/asm-powerpc/pasemi_dma.h b/include/asm-powerpc/pasemi_dma.h index b4526ff3a50d..35577b6dec41 100644 --- a/include/asm-powerpc/pasemi_dma.h +++ b/include/asm-powerpc/pasemi_dma.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 PA Semi, Inc + * Copyright (C) 2006-2008 PA Semi, Inc * * Hardware register layout and descriptor formats for the on-board * DMA engine on PA Semi PWRficient. Used by ethernet, function and security @@ -40,6 +40,11 @@ enum { PAS_DMA_COM_TXSTA = 0x104, /* Transmit Status Register */ PAS_DMA_COM_RXCMD = 0x108, /* Receive Command Register */ PAS_DMA_COM_RXSTA = 0x10c, /* Receive Status Register */ + PAS_DMA_COM_CFG = 0x114, /* Common config reg */ + PAS_DMA_TXF_SFLG0 = 0x140, /* Set flags */ + PAS_DMA_TXF_SFLG1 = 0x144, /* Set flags */ + PAS_DMA_TXF_CFLG0 = 0x148, /* Set flags */ + PAS_DMA_TXF_CFLG1 = 0x14c, /* Set flags */ }; -- cgit v1.2.3 From f37203b5ccaf6d58cb5ca6b1840e40f3b587109c Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 5 Mar 2008 12:25:45 -0600 Subject: [POWERPC] pasemi: Add flag management functions to dma_lib Add functions to manage the channel syncronization flags to dma_lib Signed-off-by: Olof Johansson Acked-by: Jeff Garzik --- arch/powerpc/platforms/pasemi/dma_lib.c | 74 +++++++++++++++++++++++++++++++++ include/asm-powerpc/pasemi_dma.h | 6 +++ 2 files changed, 80 insertions(+) (limited to 'include') diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c index 48cb7c99962d..07e4e25ef625 100644 --- a/arch/powerpc/platforms/pasemi/dma_lib.c +++ b/arch/powerpc/platforms/pasemi/dma_lib.c @@ -27,6 +27,7 @@ #define MAX_TXCH 64 #define MAX_RXCH 64 +#define MAX_FLAGS 64 static struct pasdma_status *dma_status; @@ -44,6 +45,7 @@ static struct pci_dev *dma_pdev; static DECLARE_BITMAP(txch_free, MAX_TXCH); static DECLARE_BITMAP(rxch_free, MAX_RXCH); +static DECLARE_BITMAP(flags_free, MAX_FLAGS); /* pasemi_read_iob_reg - read IOB register * @reg: Register to read (offset into PCI CFG space) @@ -374,6 +376,71 @@ void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, } EXPORT_SYMBOL(pasemi_dma_free_buf); +/* pasemi_dma_alloc_flag - Allocate a flag (event) for channel syncronization + * + * Allocates a flag for use with channel syncronization (event descriptors). + * Returns allocated flag (0-63), < 0 on error. + */ +int pasemi_dma_alloc_flag(void) +{ + int bit; + +retry: + bit = find_next_bit(flags_free, MAX_FLAGS, 0); + if (bit >= MAX_FLAGS) + return -ENOSPC; + if (!test_and_clear_bit(bit, flags_free)) + goto retry; + + return bit; +} +EXPORT_SYMBOL(pasemi_dma_alloc_flag); + + +/* pasemi_dma_free_flag - Deallocates a flag (event) + * @flag: Flag number to deallocate + * + * Frees up a flag so it can be reused for other purposes. + */ +void pasemi_dma_free_flag(int flag) +{ + BUG_ON(test_bit(flag, flags_free)); + BUG_ON(flag >= MAX_FLAGS); + set_bit(flag, flags_free); +} +EXPORT_SYMBOL(pasemi_dma_free_flag); + + +/* pasemi_dma_set_flag - Sets a flag (event) to 1 + * @flag: Flag number to set active + * + * Sets the flag provided to 1. + */ +void pasemi_dma_set_flag(int flag) +{ + BUG_ON(flag >= MAX_FLAGS); + if (flag < 32) + pasemi_write_dma_reg(PAS_DMA_TXF_SFLG0, 1 << flag); + else + pasemi_write_dma_reg(PAS_DMA_TXF_SFLG1, 1 << flag); +} +EXPORT_SYMBOL(pasemi_dma_set_flag); + +/* pasemi_dma_clear_flag - Sets a flag (event) to 0 + * @flag: Flag number to set inactive + * + * Sets the flag provided to 0. + */ +void pasemi_dma_clear_flag(int flag) +{ + BUG_ON(flag >= MAX_FLAGS); + if (flag < 32) + pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 1 << flag); + else + pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 1 << flag); +} +EXPORT_SYMBOL(pasemi_dma_clear_flag); + static void *map_onedev(struct pci_dev *p, int index) { struct device_node *dn; @@ -508,6 +575,13 @@ int pasemi_dma_init(void) /* enable rx section */ pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN); + for (i = 0; i < MAX_FLAGS; i++) + __set_bit(i, flags_free); + + /* clear all status flags */ + pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 0xffffffff); + pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 0xffffffff); + printk(KERN_INFO "PA Semi PWRficient DMA library initialized " "(%d tx, %d rx channels)\n", num_txch, num_rxch); diff --git a/include/asm-powerpc/pasemi_dma.h b/include/asm-powerpc/pasemi_dma.h index 35577b6dec41..ffd413d7dfb0 100644 --- a/include/asm-powerpc/pasemi_dma.h +++ b/include/asm-powerpc/pasemi_dma.h @@ -466,6 +466,12 @@ extern void *pasemi_dma_alloc_buf(struct pasemi_dmachan *chan, int size, extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, dma_addr_t *handle); +/* Routines to allocate flags (events) for channel syncronization */ +extern int pasemi_dma_alloc_flag(void); +extern void pasemi_dma_free_flag(int flag); +extern void pasemi_dma_set_flag(int flag); +extern void pasemi_dma_clear_flag(int flag); + /* Initialize the library, must be called before any other functions */ extern int pasemi_dma_init(void); -- cgit v1.2.3 From dda56df08a28404004bca313d2a1ba1597acd755 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 5 Mar 2008 12:25:59 -0600 Subject: [POWERPC] pasemi: Add function engine management functions to dma_lib Used to allocate functions for crypto/checksum offload. Signed-off-by: Olof Johansson Acked-by: Jeff Garzik --- arch/powerpc/platforms/pasemi/dma_lib.c | 40 +++++++++++++++++++++++++++++++++ include/asm-powerpc/pasemi_dma.h | 4 ++++ 2 files changed, 44 insertions(+) (limited to 'include') diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c index 07e4e25ef625..217af321b0ca 100644 --- a/arch/powerpc/platforms/pasemi/dma_lib.c +++ b/arch/powerpc/platforms/pasemi/dma_lib.c @@ -28,6 +28,7 @@ #define MAX_TXCH 64 #define MAX_RXCH 64 #define MAX_FLAGS 64 +#define MAX_FUN 8 static struct pasdma_status *dma_status; @@ -46,6 +47,7 @@ static struct pci_dev *dma_pdev; static DECLARE_BITMAP(txch_free, MAX_TXCH); static DECLARE_BITMAP(rxch_free, MAX_RXCH); static DECLARE_BITMAP(flags_free, MAX_FLAGS); +static DECLARE_BITMAP(fun_free, MAX_FUN); /* pasemi_read_iob_reg - read IOB register * @reg: Register to read (offset into PCI CFG space) @@ -441,6 +443,41 @@ void pasemi_dma_clear_flag(int flag) } EXPORT_SYMBOL(pasemi_dma_clear_flag); +/* pasemi_dma_alloc_fun - Allocate a function engine + * + * Allocates a function engine to use for crypto/checksum offload + * Returns allocated engine (0-8), < 0 on error. + */ +int pasemi_dma_alloc_fun(void) +{ + int bit; + +retry: + bit = find_next_bit(fun_free, MAX_FLAGS, 0); + if (bit >= MAX_FLAGS) + return -ENOSPC; + if (!test_and_clear_bit(bit, fun_free)) + goto retry; + + return bit; +} +EXPORT_SYMBOL(pasemi_dma_alloc_fun); + + +/* pasemi_dma_free_fun - Deallocates a function engine + * @flag: Engine number to deallocate + * + * Frees up a function engine so it can be used for other purposes. + */ +void pasemi_dma_free_fun(int fun) +{ + BUG_ON(test_bit(fun, fun_free)); + BUG_ON(fun >= MAX_FLAGS); + set_bit(fun, fun_free); +} +EXPORT_SYMBOL(pasemi_dma_free_fun); + + static void *map_onedev(struct pci_dev *p, int index) { struct device_node *dn; @@ -578,6 +615,9 @@ int pasemi_dma_init(void) for (i = 0; i < MAX_FLAGS; i++) __set_bit(i, flags_free); + for (i = 0; i < MAX_FUN; i++) + __set_bit(i, fun_free); + /* clear all status flags */ pasemi_write_dma_reg(PAS_DMA_TXF_CFLG0, 0xffffffff); pasemi_write_dma_reg(PAS_DMA_TXF_CFLG1, 0xffffffff); diff --git a/include/asm-powerpc/pasemi_dma.h b/include/asm-powerpc/pasemi_dma.h index ffd413d7dfb0..facb2bdea45c 100644 --- a/include/asm-powerpc/pasemi_dma.h +++ b/include/asm-powerpc/pasemi_dma.h @@ -472,6 +472,10 @@ extern void pasemi_dma_free_flag(int flag); extern void pasemi_dma_set_flag(int flag); extern void pasemi_dma_clear_flag(int flag); +/* Routines to allocate function engines */ +extern int pasemi_dma_alloc_fun(void); +extern void pasemi_dma_free_fun(int fun); + /* Initialize the library, must be called before any other functions */ extern int pasemi_dma_init(void); -- cgit v1.2.3 From 8d636d8bc5ffcdbf49c72aafcda9ddab7ccb2f41 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 5 Mar 2008 16:34:16 -0600 Subject: pasemi_mac: jumbo frame support First cut at jumbo frame support. To support large MTU, one or several separate channels must be allocated to calculate the TCP/UDP checksum separately, since the mac lacks enough buffers to hold a whole packet while it's being calculated. Furthermore, it seems that a single function channel is not quite enough to feed one of the 10Gig links, so allocate two channels for XAUI interfaces. Signed-off-by: Olof Johansson Acked-by: Jeff Garzik --- drivers/net/pasemi_mac.c | 294 ++++++++++++++++++++++++++++++++++----- drivers/net/pasemi_mac.h | 15 +- include/asm-powerpc/pasemi_dma.h | 60 +++++++- 3 files changed, 333 insertions(+), 36 deletions(-) (limited to 'include') diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c index 6ea822addde5..54904ad29ea7 100644 --- a/drivers/net/pasemi_mac.c +++ b/drivers/net/pasemi_mac.c @@ -59,11 +59,12 @@ /* Must be a power of two */ #define RX_RING_SIZE 2048 #define TX_RING_SIZE 4096 +#define CS_RING_SIZE (TX_RING_SIZE*2) #define LRO_MAX_AGGR 64 #define PE_MIN_MTU 64 -#define PE_MAX_MTU 1500 +#define PE_MAX_MTU 9000 #define PE_DEF_MTU ETH_DATA_LEN #define DEFAULT_MSG_ENABLE \ @@ -81,6 +82,7 @@ #define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)]) #define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)]) #define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)]) +#define CS_DESC(cs, num) ((cs)->chan.ring_virt[(num) & (CS_RING_SIZE-1)]) #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \ & ((ring)->size - 1)) @@ -322,6 +324,103 @@ static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac, return (nfrags + 3) & ~1; } +static struct pasemi_mac_csring *pasemi_mac_setup_csring(struct pasemi_mac *mac) +{ + struct pasemi_mac_csring *ring; + u32 val; + unsigned int cfg; + int chno; + + ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_csring), + offsetof(struct pasemi_mac_csring, chan)); + + if (!ring) { + dev_err(&mac->pdev->dev, "Can't allocate checksum channel\n"); + goto out_chan; + } + + chno = ring->chan.chno; + + ring->size = CS_RING_SIZE; + ring->next_to_fill = 0; + + /* Allocate descriptors */ + if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE)) + goto out_ring_desc; + + write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno), + PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma)); + val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32); + val |= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE >> 3); + + write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val); + + ring->events[0] = pasemi_dma_alloc_flag(); + ring->events[1] = pasemi_dma_alloc_flag(); + if (ring->events[0] < 0 || ring->events[1] < 0) + goto out_flags; + + pasemi_dma_clear_flag(ring->events[0]); + pasemi_dma_clear_flag(ring->events[1]); + + ring->fun = pasemi_dma_alloc_fun(); + if (ring->fun < 0) + goto out_fun; + + cfg = PAS_DMA_TXCHAN_CFG_TY_FUNC | PAS_DMA_TXCHAN_CFG_UP | + PAS_DMA_TXCHAN_CFG_TATTR(ring->fun) | + PAS_DMA_TXCHAN_CFG_LPSQ | PAS_DMA_TXCHAN_CFG_LPDQ; + + if (translation_enabled()) + cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR; + + write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg); + + /* enable channel */ + pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ | + PAS_DMA_TXCHAN_TCMDSTA_DB | + PAS_DMA_TXCHAN_TCMDSTA_DE | + PAS_DMA_TXCHAN_TCMDSTA_DA); + + return ring; + +out_fun: +out_flags: + if (ring->events[0] >= 0) + pasemi_dma_free_flag(ring->events[0]); + if (ring->events[1] >= 0) + pasemi_dma_free_flag(ring->events[1]); + pasemi_dma_free_ring(&ring->chan); +out_ring_desc: + pasemi_dma_free_chan(&ring->chan); +out_chan: + + return NULL; +} + +static void pasemi_mac_setup_csrings(struct pasemi_mac *mac) +{ + int i; + mac->cs[0] = pasemi_mac_setup_csring(mac); + if (mac->type == MAC_TYPE_XAUI) + mac->cs[1] = pasemi_mac_setup_csring(mac); + else + mac->cs[1] = 0; + + for (i = 0; i < MAX_CS; i++) + if (mac->cs[i]) + mac->num_cs++; +} + +static void pasemi_mac_free_csring(struct pasemi_mac_csring *csring) +{ + pasemi_dma_stop_chan(&csring->chan); + pasemi_dma_free_flag(csring->events[0]); + pasemi_dma_free_flag(csring->events[1]); + pasemi_dma_free_ring(&csring->chan); + pasemi_dma_free_chan(&csring->chan); +} + static int pasemi_mac_setup_rx_resources(const struct net_device *dev) { struct pasemi_mac_rxring *ring; @@ -445,7 +544,7 @@ pasemi_mac_setup_tx_resources(const struct net_device *dev) cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE | PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) | PAS_DMA_TXCHAN_CFG_UP | - PAS_DMA_TXCHAN_CFG_WT(2); + PAS_DMA_TXCHAN_CFG_WT(4); if (translation_enabled()) cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR; @@ -810,13 +909,21 @@ restart: u64 mactx = TX_DESC(txring, i); struct sk_buff *skb; - skb = TX_DESC_INFO(txring, i+1).skb; - nr_frags = TX_DESC_INFO(txring, i).dma; - if ((mactx & XCT_MACTX_E) || (*chan->status & PAS_STATUS_ERROR)) pasemi_mac_tx_error(mac, mactx); + /* Skip over control descriptors */ + if (!(mactx & XCT_MACTX_LLEN_M)) { + TX_DESC(txring, i) = 0; + TX_DESC(txring, i+1) = 0; + buf_count = 2; + continue; + } + + skb = TX_DESC_INFO(txring, i+1).skb; + nr_frags = TX_DESC_INFO(txring, i).dma; + if (unlikely(mactx & XCT_MACTX_O)) /* Not yet transmitted */ break; @@ -1058,6 +1165,12 @@ static int pasemi_mac_open(struct net_device *dev) if (!mac->tx) goto out_tx_ring; + if (dev->mtu > 1500) { + pasemi_mac_setup_csrings(mac); + if (!mac->num_cs) + goto out_tx_ring; + } + /* 0x3ff with 33MHz clock is about 31us */ write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG, PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff)); @@ -1241,7 +1354,7 @@ static int pasemi_mac_close(struct net_device *dev) { struct pasemi_mac *mac = netdev_priv(dev); unsigned int sta; - int rxch, txch; + int rxch, txch, i; rxch = rx_ring(mac)->chan.chno; txch = tx_ring(mac)->chan.chno; @@ -1286,6 +1399,9 @@ static int pasemi_mac_close(struct net_device *dev) free_irq(mac->tx->chan.irq, mac->tx); free_irq(mac->rx->chan.irq, mac->rx); + for (i = 0; i < mac->num_cs; i++) + pasemi_mac_free_csring(mac->cs[i]); + /* Free resources */ pasemi_mac_free_rx_resources(mac); pasemi_mac_free_tx_resources(mac); @@ -1293,35 +1409,113 @@ static int pasemi_mac_close(struct net_device *dev) return 0; } +static void pasemi_mac_queue_csdesc(const struct sk_buff *skb, + const dma_addr_t *map, + const unsigned int *map_size, + struct pasemi_mac_txring *txring, + struct pasemi_mac_csring *csring) +{ + u64 fund; + dma_addr_t cs_dest; + const int nh_off = skb_network_offset(skb); + const int nh_len = skb_network_header_len(skb); + const int nfrags = skb_shinfo(skb)->nr_frags; + int cs_size, i, fill, hdr, cpyhdr, evt; + dma_addr_t csdma; + + fund = XCT_FUN_ST | XCT_FUN_RR_8BRES | + XCT_FUN_O | XCT_FUN_FUN(csring->fun) | + XCT_FUN_CRM_SIG | XCT_FUN_LLEN(skb->len - nh_off) | + XCT_FUN_SHL(nh_len >> 2) | XCT_FUN_SE; + + switch (ip_hdr(skb)->protocol) { + case IPPROTO_TCP: + fund |= XCT_FUN_SIG_TCP4; + /* TCP checksum is 16 bytes into the header */ + cs_dest = map[0] + skb_transport_offset(skb) + 16; + break; + case IPPROTO_UDP: + fund |= XCT_FUN_SIG_UDP4; + /* UDP checksum is 6 bytes into the header */ + cs_dest = map[0] + skb_transport_offset(skb) + 6; + break; + default: + BUG(); + } + + /* Do the checksum offloaded */ + fill = csring->next_to_fill; + hdr = fill; + + CS_DESC(csring, fill++) = fund; + /* Room for 8BRES. Checksum result is really 2 bytes into it */ + csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2; + CS_DESC(csring, fill++) = 0; + + CS_DESC(csring, fill) = XCT_PTR_LEN(map_size[0]-nh_off) | XCT_PTR_ADDR(map[0]+nh_off); + for (i = 1; i <= nfrags; i++) + CS_DESC(csring, fill+i) = XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]); + + fill += i; + if (fill & 1) + fill++; + + /* Copy the result into the TCP packet */ + cpyhdr = fill; + CS_DESC(csring, fill++) = XCT_FUN_O | XCT_FUN_FUN(csring->fun) | + XCT_FUN_LLEN(2) | XCT_FUN_SE; + CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest) | XCT_PTR_T; + CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma); + fill++; + + evt = !csring->last_event; + csring->last_event = evt; + + /* Event handshaking with MAC TX */ + CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_SET | CTRL_CMD_REG(csring->events[evt]); + CS_DESC(csring, fill++) = 0; + CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_WCLR | CTRL_CMD_REG(csring->events[!evt]); + CS_DESC(csring, fill++) = 0; + csring->next_to_fill = fill & (CS_RING_SIZE-1); + + cs_size = fill - hdr; + write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1); + + /* TX-side event handshaking */ + fill = txring->next_to_fill; + TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_WSET | CTRL_CMD_REG(csring->events[evt]); + TX_DESC(txring, fill++) = 0; + TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_CLR | CTRL_CMD_REG(csring->events[!evt]); + TX_DESC(txring, fill++) = 0; + txring->next_to_fill = fill; + + write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2); + + return; +} + static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev) { - struct pasemi_mac *mac = netdev_priv(dev); - struct pasemi_mac_txring *txring; - u64 dflags, mactx; + struct pasemi_mac * const mac = netdev_priv(dev); + struct pasemi_mac_txring * const txring = tx_ring(mac); + struct pasemi_mac_csring *csring; + u64 dflags = 0; + u64 mactx; dma_addr_t map[MAX_SKB_FRAGS+1]; unsigned int map_size[MAX_SKB_FRAGS+1]; unsigned long flags; int i, nfrags; int fill; + const int nh_off = skb_network_offset(skb); + const int nh_len = skb_network_header_len(skb); - dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD; - - if (skb->ip_summed == CHECKSUM_PARTIAL) { - const unsigned char *nh = skb_network_header(skb); + prefetch(&txring->ring_info); - switch (ip_hdr(skb)->protocol) { - case IPPROTO_TCP: - dflags |= XCT_MACTX_CSUM_TCP; - dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2); - dflags |= XCT_MACTX_IPO(nh - skb->data); - break; - case IPPROTO_UDP: - dflags |= XCT_MACTX_CSUM_UDP; - dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2); - dflags |= XCT_MACTX_IPO(nh - skb->data); - break; - } - } + dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD; nfrags = skb_shinfo(skb)->nr_frags; @@ -1344,24 +1538,46 @@ static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev) } } - mactx = dflags | XCT_MACTX_LLEN(skb->len); + if (skb->ip_summed == CHECKSUM_PARTIAL && skb->len <= 1540) { + switch (ip_hdr(skb)->protocol) { + case IPPROTO_TCP: + dflags |= XCT_MACTX_CSUM_TCP; + dflags |= XCT_MACTX_IPH(nh_len >> 2); + dflags |= XCT_MACTX_IPO(nh_off); + break; + case IPPROTO_UDP: + dflags |= XCT_MACTX_CSUM_UDP; + dflags |= XCT_MACTX_IPH(nh_len >> 2); + dflags |= XCT_MACTX_IPO(nh_off); + break; + default: + WARN_ON(1); + } + } - txring = tx_ring(mac); + mactx = dflags | XCT_MACTX_LLEN(skb->len); spin_lock_irqsave(&txring->lock, flags); - fill = txring->next_to_fill; - /* Avoid stepping on the same cache line that the DMA controller * is currently about to send, so leave at least 8 words available. * Total free space needed is mactx + fragments + 8 */ - if (RING_AVAIL(txring) < nfrags + 10) { + if (RING_AVAIL(txring) < nfrags + 14) { /* no room -- stop the queue and wait for tx intr */ netif_stop_queue(dev); goto out_err; } + /* Queue up checksum + event descriptors, if needed */ + if (mac->num_cs && skb->ip_summed == CHECKSUM_PARTIAL && skb->len > 1540) { + csring = mac->cs[mac->last_cs]; + mac->last_cs = (mac->last_cs + 1) % mac->num_cs; + + pasemi_mac_queue_csdesc(skb, map, map_size, txring, csring); + } + + fill = txring->next_to_fill; TX_DESC(txring, fill) = mactx; TX_DESC_INFO(txring, fill).dma = nfrags; fill++; @@ -1439,8 +1655,9 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) { struct pasemi_mac *mac = netdev_priv(dev); unsigned int reg; - unsigned int rcmdsta; + unsigned int rcmdsta = 0; int running; + int ret = 0; if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU) return -EINVAL; @@ -1462,6 +1679,16 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) pasemi_mac_pause_rxint(mac); pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE); pasemi_mac_free_rx_buffers(mac); + + } + + /* Setup checksum channels if large MTU and none already allocated */ + if (new_mtu > 1500 && !mac->num_cs) { + pasemi_mac_setup_csrings(mac); + if (!mac->num_cs) { + ret = -ENOMEM; + goto out; + } } /* Change maxf, i.e. what size frames are accepted. @@ -1476,6 +1703,7 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */ mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128; +out: if (running) { write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN); @@ -1488,7 +1716,7 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) pasemi_mac_intf_enable(mac); } - return 0; + return ret; } static int __devinit diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h index 99e7b9329a6f..90c51670a1e7 100644 --- a/drivers/net/pasemi_mac.h +++ b/drivers/net/pasemi_mac.h @@ -27,6 +27,7 @@ #include #define MAX_LRO_DESCRIPTORS 8 +#define MAX_CS 2 struct pasemi_mac_txring { struct pasemi_dmachan chan; /* Must be first */ @@ -51,6 +52,15 @@ struct pasemi_mac_rxring { struct pasemi_mac *mac; /* Needed in intr handler */ }; +struct pasemi_mac_csring { + struct pasemi_dmachan chan; + unsigned int size; + unsigned int next_to_fill; + int events[2]; + int last_event; + int fun; +}; + struct pasemi_mac { struct net_device *netdev; struct pci_dev *pdev; @@ -60,10 +70,12 @@ struct pasemi_mac { struct napi_struct napi; int bufsz; /* RX ring buffer size */ + int last_cs; + int num_cs; + u32 dma_if; u8 type; #define MAC_TYPE_GMAC 1 #define MAC_TYPE_XAUI 2 - u32 dma_if; u8 mac_addr[6]; @@ -74,6 +86,7 @@ struct pasemi_mac { struct pasemi_mac_txring *tx; struct pasemi_mac_rxring *rx; + struct pasemi_mac_csring *cs[MAX_CS]; char tx_irq_name[10]; /* "eth%d tx" */ char rx_irq_name[10]; /* "eth%d rx" */ int link; diff --git a/include/asm-powerpc/pasemi_dma.h b/include/asm-powerpc/pasemi_dma.h index facb2bdea45c..19fd7933e2d9 100644 --- a/include/asm-powerpc/pasemi_dma.h +++ b/include/asm-powerpc/pasemi_dma.h @@ -128,11 +128,16 @@ enum { #define PAS_DMA_TXCHAN_TCMDSTA_DA 0x00000100 #define PAS_DMA_TXCHAN_CFG(c) (0x304+(c)*_PAS_DMA_TXCHAN_STRIDE) #define PAS_DMA_TXCHAN_CFG_TY_IFACE 0x00000000 /* Type = interface */ +#define PAS_DMA_TXCHAN_CFG_TY_COPY 0x00000001 /* Type = copy only */ +#define PAS_DMA_TXCHAN_CFG_TY_FUNC 0x00000002 /* Type = function */ +#define PAS_DMA_TXCHAN_CFG_TY_XOR 0x00000003 /* Type = xor only */ #define PAS_DMA_TXCHAN_CFG_TATTR_M 0x0000003c #define PAS_DMA_TXCHAN_CFG_TATTR_S 2 #define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \ PAS_DMA_TXCHAN_CFG_TATTR_M) -#define PAS_DMA_TXCHAN_CFG_WT_M 0x000001c0 +#define PAS_DMA_TXCHAN_CFG_LPDQ 0x00000800 +#define PAS_DMA_TXCHAN_CFG_LPSQ 0x00000400 +#define PAS_DMA_TXCHAN_CFG_WT_M 0x000003c0 #define PAS_DMA_TXCHAN_CFG_WT_S 6 #define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \ PAS_DMA_TXCHAN_CFG_WT_M) @@ -399,11 +404,62 @@ enum { XCT_COPY_LLEN_M) #define XCT_COPY_SE 0x0000000000000001ull +/* Function descriptor fields */ +#define XCT_FUN_T 0x8000000000000000ull +#define XCT_FUN_ST 0x4000000000000000ull +#define XCT_FUN_RR_M 0x3000000000000000ull +#define XCT_FUN_RR_NORES 0x0000000000000000ull +#define XCT_FUN_RR_8BRES 0x1000000000000000ull +#define XCT_FUN_RR_24BRES 0x2000000000000000ull +#define XCT_FUN_RR_40BRES 0x3000000000000000ull +#define XCT_FUN_I 0x0800000000000000ull +#define XCT_FUN_O 0x0400000000000000ull +#define XCT_FUN_E 0x0200000000000000ull +#define XCT_FUN_FUN_M 0x01c0000000000000ull +#define XCT_FUN_FUN_S 54 +#define XCT_FUN_FUN(x) ((((long)(x)) << XCT_FUN_FUN_S) & XCT_FUN_FUN_M) +#define XCT_FUN_CRM_M 0x0038000000000000ull +#define XCT_FUN_CRM_NOP 0x0000000000000000ull +#define XCT_FUN_CRM_SIG 0x0008000000000000ull +#define XCT_FUN_LLEN_M 0x0007ffff00000000ull +#define XCT_FUN_LLEN_S 32 +#define XCT_FUN_LLEN(x) ((((long)(x)) << XCT_FUN_LLEN_S) & XCT_FUN_LLEN_M) +#define XCT_FUN_SHL_M 0x00000000f8000000ull +#define XCT_FUN_SHL_S 27 +#define XCT_FUN_SHL(x) ((((long)(x)) << XCT_FUN_SHL_S) & XCT_FUN_SHL_M) +#define XCT_FUN_CHL_M 0x0000000007c00000ull +#define XCT_FUN_HSZ_M 0x00000000003c0000ull +#define XCT_FUN_ALG_M 0x0000000000038000ull +#define XCT_FUN_HP 0x0000000000004000ull +#define XCT_FUN_BCM_M 0x0000000000003800ull +#define XCT_FUN_BCP_M 0x0000000000000600ull +#define XCT_FUN_SIG_M 0x00000000000001f0ull +#define XCT_FUN_SIG_TCP4 0x0000000000000140ull +#define XCT_FUN_SIG_TCP6 0x0000000000000150ull +#define XCT_FUN_SIG_UDP4 0x0000000000000160ull +#define XCT_FUN_SIG_UDP6 0x0000000000000170ull +#define XCT_FUN_A 0x0000000000000008ull +#define XCT_FUN_C 0x0000000000000004ull +#define XCT_FUN_AL2 0x0000000000000002ull +#define XCT_FUN_SE 0x0000000000000001ull + +/* Function descriptor 8byte result fields */ +#define XCT_FUNRES_8B_CS_M 0x0000ffff00000000ull +#define XCT_FUNRES_8B_CS_S 32 +#define XCT_FUNRES_8B_CRC_M 0x00000000ffffffffull +#define XCT_FUNRES_8B_CRC_S 0 + /* Control descriptor fields */ #define CTRL_CMD_T 0x8000000000000000ull #define CTRL_CMD_META_EVT 0x2000000000000000ull #define CTRL_CMD_O 0x0400000000000000ull -#define CTRL_CMD_REG_M 0x000000000000000full +#define CTRL_CMD_ETYPE_M 0x0038000000000000ull +#define CTRL_CMD_ETYPE_EXT 0x0000000000000000ull +#define CTRL_CMD_ETYPE_WSET 0x0020000000000000ull +#define CTRL_CMD_ETYPE_WCLR 0x0028000000000000ull +#define CTRL_CMD_ETYPE_SET 0x0030000000000000ull +#define CTRL_CMD_ETYPE_CLR 0x0038000000000000ull +#define CTRL_CMD_REG_M 0x000000000000007full #define CTRL_CMD_REG_S 0 #define CTRL_CMD_REG(x) ((((long)(x)) << CTRL_CMD_REG_S) & \ CTRL_CMD_REG_M) -- cgit v1.2.3 From 6ac26c8a7eb149dbd669cc6cd9b77ffc9cd0d2fb Mon Sep 17 00:00:00 2001 From: Manish Ahuja Date: Sat, 22 Mar 2008 10:37:08 +1100 Subject: [POWERPC] pseries: phyp dump: Reserve and release memory Initial patch for reserving memory in early boot, and freeing it later. If the previous boot had ended with a crash, the reserved memory would contain a copy of the crashed kernel data. Signed-off-by: Manish Ahuja Signed-off-by: Linas Vepstas Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/prom.c | 52 +++++++++++++++ arch/powerpc/platforms/pseries/Makefile | 1 + arch/powerpc/platforms/pseries/phyp_dump.c | 103 +++++++++++++++++++++++++++++ include/asm-powerpc/phyp_dump.h | 41 ++++++++++++ 4 files changed, 197 insertions(+) create mode 100644 arch/powerpc/platforms/pseries/phyp_dump.c create mode 100644 include/asm-powerpc/phyp_dump.h (limited to 'include') diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index ff600ef0b4d6..e6c022ef12ee 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -51,6 +51,7 @@ #include #include #include +#include #include #ifdef DEBUG @@ -1040,6 +1041,51 @@ static void __init early_reserve_mem(void) #endif } +#ifdef CONFIG_PHYP_DUMP +/** + * phyp_dump_reserve_mem() - reserve all not-yet-dumped mmemory + * + * This routine may reserve memory regions in the kernel only + * if the system is supported and a dump was taken in last + * boot instance or if the hardware is supported and the + * scratch area needs to be setup. In other instances it returns + * without reserving anything. The memory in case of dump being + * active is freed when the dump is collected (by userland tools). + */ +static void __init phyp_dump_reserve_mem(void) +{ + unsigned long base, size; + if (!phyp_dump_info->phyp_dump_configured) { + printk(KERN_ERR "Phyp-dump not supported on this hardware\n"); + return; + } + + if (phyp_dump_info->phyp_dump_is_active) { + /* Reserve *everything* above RMR.Area freed by userland tools*/ + base = PHYP_DUMP_RMR_END; + size = lmb_end_of_DRAM() - base; + + /* XXX crashed_ram_end is wrong, since it may be beyond + * the memory_limit, it will need to be adjusted. */ + lmb_reserve(base, size); + + phyp_dump_info->init_reserve_start = base; + phyp_dump_info->init_reserve_size = size; + } else { + size = phyp_dump_info->cpu_state_size + + phyp_dump_info->hpte_region_size + + PHYP_DUMP_RMR_END; + base = lmb_end_of_DRAM() - size; + lmb_reserve(base, size); + phyp_dump_info->init_reserve_start = base; + phyp_dump_info->init_reserve_size = size; + } +} +#else +static inline void __init phyp_dump_reserve_mem(void) {} +#endif /* CONFIG_PHYP_DUMP && CONFIG_PPC_RTAS */ + + void __init early_init_devtree(void *params) { DBG(" -> early_init_devtree(%p)\n", params); @@ -1052,6 +1098,11 @@ void __init early_init_devtree(void *params) of_scan_flat_dt(early_init_dt_scan_rtas, NULL); #endif +#ifdef CONFIG_PHYP_DUMP + /* scan tree to see if dump occured during last boot */ + of_scan_flat_dt(early_init_dt_scan_phyp_dump, NULL); +#endif + /* Retrieve various informations from the /chosen node of the * device-tree, including the platform type, initrd location and * size, TCE reserve, and more ... @@ -1072,6 +1123,7 @@ void __init early_init_devtree(void *params) reserve_kdump_trampoline(); reserve_crashkernel(); early_reserve_mem(); + phyp_dump_reserve_mem(); lmb_enforce_memory_limit(memory_limit); lmb_analyze(); diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile index 992ba6753cf2..bdae04bb7a01 100644 --- a/arch/powerpc/platforms/pseries/Makefile +++ b/arch/powerpc/platforms/pseries/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o obj-$(CONFIG_HVCS) += hvcserver.o obj-$(CONFIG_HCALL_STATS) += hvCall_inst.o +obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c new file mode 100644 index 000000000000..230286cafffe --- /dev/null +++ b/arch/powerpc/platforms/pseries/phyp_dump.c @@ -0,0 +1,103 @@ +/* + * Hypervisor-assisted dump + * + * Linas Vepstas, Manish Ahuja 2008 + * Copyright 2008 IBM Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +/* Variables, used to communicate data between early boot and late boot */ +static struct phyp_dump phyp_dump_vars; +struct phyp_dump *phyp_dump_info = &phyp_dump_vars; + +/** + * release_memory_range -- release memory previously lmb_reserved + * @start_pfn: starting physical frame number + * @nr_pages: number of pages to free. + * + * This routine will release memory that had been previously + * lmb_reserved in early boot. The released memory becomes + * available for genreal use. + */ +static void +release_memory_range(unsigned long start_pfn, unsigned long nr_pages) +{ + struct page *rpage; + unsigned long end_pfn; + long i; + + end_pfn = start_pfn + nr_pages; + + for (i = start_pfn; i <= end_pfn; i++) { + rpage = pfn_to_page(i); + if (PageReserved(rpage)) { + ClearPageReserved(rpage); + init_page_count(rpage); + __free_page(rpage); + totalram_pages++; + } + } +} + +static int __init phyp_dump_setup(void) +{ + unsigned long start_pfn, nr_pages; + + /* If no memory was reserved in early boot, there is nothing to do */ + if (phyp_dump_info->init_reserve_size == 0) + return 0; + + /* Release memory that was reserved in early boot */ + start_pfn = PFN_DOWN(phyp_dump_info->init_reserve_start); + nr_pages = PFN_DOWN(phyp_dump_info->init_reserve_size); + release_memory_range(start_pfn, nr_pages); + + return 0; +} +machine_subsys_initcall(pseries, phyp_dump_setup); + +int __init early_init_dt_scan_phyp_dump(unsigned long node, + const char *uname, int depth, void *data) +{ + const unsigned int *sizes; + + phyp_dump_info->phyp_dump_configured = 0; + phyp_dump_info->phyp_dump_is_active = 0; + + if (depth != 1 || strcmp(uname, "rtas") != 0) + return 0; + + if (of_get_flat_dt_prop(node, "ibm,configure-kernel-dump", NULL)) + phyp_dump_info->phyp_dump_configured++; + + if (of_get_flat_dt_prop(node, "ibm,dump-kernel", NULL)) + phyp_dump_info->phyp_dump_is_active++; + + sizes = of_get_flat_dt_prop(node, "ibm,configure-kernel-dump-sizes", + NULL); + if (!sizes) + return 0; + + if (sizes[0] == 1) + phyp_dump_info->cpu_state_size = *((unsigned long *)&sizes[1]); + + if (sizes[3] == 2) + phyp_dump_info->hpte_region_size = + *((unsigned long *)&sizes[4]); + return 1; +} diff --git a/include/asm-powerpc/phyp_dump.h b/include/asm-powerpc/phyp_dump.h new file mode 100644 index 000000000000..e2d988dcdc99 --- /dev/null +++ b/include/asm-powerpc/phyp_dump.h @@ -0,0 +1,41 @@ +/* + * Hypervisor-assisted dump + * + * Linas Vepstas, Manish Ahuja 2008 + * Copyright 2008 IBM Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _PPC64_PHYP_DUMP_H +#define _PPC64_PHYP_DUMP_H + +#ifdef CONFIG_PHYP_DUMP + +/* The RMR region will be saved for later dumping + * whenever the kernel crashes. Set this to 256MB. */ +#define PHYP_DUMP_RMR_START 0x0 +#define PHYP_DUMP_RMR_END (1UL<<28) + +struct phyp_dump { + /* Memory that is reserved during very early boot. */ + unsigned long init_reserve_start; + unsigned long init_reserve_size; + /* Check status during boot if dump supported, active & present*/ + unsigned long phyp_dump_configured; + unsigned long phyp_dump_is_active; + /* store cpu & hpte size */ + unsigned long cpu_state_size; + unsigned long hpte_region_size; +}; + +extern struct phyp_dump *phyp_dump_info; + +int early_init_dt_scan_phyp_dump(unsigned long node, + const char *uname, int depth, void *data); + +#endif /* CONFIG_PHYP_DUMP */ +#endif /* _PPC64_PHYP_DUMP_H */ -- cgit v1.2.3 From a9c508dae10a821dc95653178eec018abc90482e Mon Sep 17 00:00:00 2001 From: Manish Ahuja Date: Sat, 22 Mar 2008 10:45:22 +1100 Subject: [POWERPC] pseries: phyp dump: Invalidate and print dump areas This adds routines to a. invalidate dump b. calculate region that is reserved and needs to be freed. This is exported through sysfs interface. Unregister has been removed for now as it wasn't being used. Signed-off-by: Manish Ahuja Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/pseries/phyp_dump.c | 83 +++++++++++++++++++++++++++--- include/asm-powerpc/phyp_dump.h | 3 ++ 2 files changed, 80 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c index 5cdba6a6f70c..df4870ec90d8 100644 --- a/arch/powerpc/platforms/pseries/phyp_dump.c +++ b/arch/powerpc/platforms/pseries/phyp_dump.c @@ -70,6 +70,10 @@ static struct phyp_dump_header phdr; #define DUMP_SOURCE_CPU 0x0001 #define DUMP_SOURCE_HPTE 0x0002 #define DUMP_SOURCE_RMO 0x0011 +#define DUMP_ERROR_FLAG 0x2000 +#define DUMP_TRIGGERED 0x4000 +#define DUMP_PERFORMED 0x8000 + /** * init_dump_header() - initialize the header declaring a dump @@ -181,9 +185,15 @@ static void print_dump_header(const struct phyp_dump_header *ph) static void register_dump_area(struct phyp_dump_header *ph, unsigned long addr) { int rc; - ph->cpu_data.destination_address += addr; - ph->hpte_data.destination_address += addr; - ph->kernel_data.destination_address += addr; + + /* Add addr value if not initialized before */ + if (ph->cpu_data.destination_address == 0) { + ph->cpu_data.destination_address += addr; + ph->hpte_data.destination_address += addr; + ph->kernel_data.destination_address += addr; + } + + /* ToDo Invalidate kdump and free memory range. */ do { rc = rtas_call(ibm_configure_kernel_dump, 3, 1, NULL, @@ -197,6 +207,30 @@ static void register_dump_area(struct phyp_dump_header *ph, unsigned long addr) } } +static +void invalidate_last_dump(struct phyp_dump_header *ph, unsigned long addr) +{ + int rc; + + /* Add addr value if not initialized before */ + if (ph->cpu_data.destination_address == 0) { + ph->cpu_data.destination_address += addr; + ph->hpte_data.destination_address += addr; + ph->kernel_data.destination_address += addr; + } + + do { + rc = rtas_call(ibm_configure_kernel_dump, 3, 1, NULL, + 2, ph, sizeof(struct phyp_dump_header)); + } while (rtas_busy_delay(rc)); + + if (rc) { + printk(KERN_ERR "phyp-dump: unexpected error (%d) " + "on invalidate\n", rc); + print_dump_header(ph); + } +} + /* ------------------------------------------------- */ /** * release_memory_range -- release memory previously lmb_reserved @@ -207,8 +241,8 @@ static void register_dump_area(struct phyp_dump_header *ph, unsigned long addr) * lmb_reserved in early boot. The released memory becomes * available for genreal use. */ -static void -release_memory_range(unsigned long start_pfn, unsigned long nr_pages) +static void release_memory_range(unsigned long start_pfn, + unsigned long nr_pages) { struct page *rpage; unsigned long end_pfn; @@ -269,8 +303,29 @@ static ssize_t store_release_region(struct kobject *kobj, return count; } +static ssize_t show_release_region(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + u64 second_addr_range; + + /* total reserved size - start of scratch area */ + second_addr_range = phyp_dump_info->init_reserve_size - + phyp_dump_info->reserved_scratch_size; + return sprintf(buf, "CPU:0x%lx-0x%lx: HPTE:0x%lx-0x%lx:" + " DUMP:0x%lx-0x%lx, 0x%lx-0x%lx:\n", + phdr.cpu_data.destination_address, + phdr.cpu_data.length_copied, + phdr.hpte_data.destination_address, + phdr.hpte_data.length_copied, + phdr.kernel_data.destination_address, + phdr.kernel_data.length_copied, + phyp_dump_info->init_reserve_start, + second_addr_range); +} + static struct kobj_attribute rr = __ATTR(release_region, 0600, - NULL, store_release_region); + show_release_region, + store_release_region); static int __init phyp_dump_setup(void) { @@ -313,6 +368,22 @@ static int __init phyp_dump_setup(void) return 0; } + /* re-register the dump area, if old dump was invalid */ + if ((dump_header) && (dump_header->status & DUMP_ERROR_FLAG)) { + invalidate_last_dump(&phdr, dump_area_start); + register_dump_area(&phdr, dump_area_start); + return 0; + } + + if (dump_header) { + phyp_dump_info->reserved_scratch_addr = + dump_header->cpu_data.destination_address; + phyp_dump_info->reserved_scratch_size = + dump_header->cpu_data.source_length + + dump_header->hpte_data.source_length + + dump_header->kernel_data.source_length; + } + /* Should we create a dump_subsys, analogous to s390/ipl.c ? */ rc = sysfs_create_file(kernel_kobj, &rr.attr); if (rc) diff --git a/include/asm-powerpc/phyp_dump.h b/include/asm-powerpc/phyp_dump.h index e2d988dcdc99..b454de45b2ca 100644 --- a/include/asm-powerpc/phyp_dump.h +++ b/include/asm-powerpc/phyp_dump.h @@ -30,6 +30,9 @@ struct phyp_dump { /* store cpu & hpte size */ unsigned long cpu_state_size; unsigned long hpte_region_size; + /* previous scratch area values */ + unsigned long reserved_scratch_addr; + unsigned long reserved_scratch_size; }; extern struct phyp_dump *phyp_dump_info; -- cgit v1.2.3 From 654f596da4a83a8d2734fba26c2a1257533e6d75 Mon Sep 17 00:00:00 2001 From: Manish Ahuja Date: Sat, 22 Mar 2008 11:38:59 +1100 Subject: [POWERPC] pseries: phyp dump: Disable phyp-dump through boot-var This adds a kernel command line option "phyp_dump", which takes a 0/1 value for disabling/ enabling phyp_dump at boot time. Kdump can use this on cmdline (phyp_dump=0) to disable phyp-dump during boot when enabling itself. This will ensure only one dumping mechanism is active at any given time. Signed-off-by: Manish Ahuja Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/prom.c | 5 +++++ arch/powerpc/platforms/pseries/phyp_dump.c | 18 ++++++++++++++++++ include/asm-powerpc/phyp_dump.h | 1 + 3 files changed, 24 insertions(+) (limited to 'include') diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index e6c022ef12ee..9330920265f3 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -1060,6 +1060,11 @@ static void __init phyp_dump_reserve_mem(void) return; } + if (!phyp_dump_info->phyp_dump_at_boot) { + printk(KERN_INFO "Phyp-dump disabled at boot time\n"); + return; + } + if (phyp_dump_info->phyp_dump_is_active) { /* Reserve *everything* above RMR.Area freed by userland tools*/ base = PHYP_DUMP_RMR_END; diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c index 034fe1b54dd9..f80f8606c6b8 100644 --- a/arch/powerpc/platforms/pseries/phyp_dump.c +++ b/arch/powerpc/platforms/pseries/phyp_dump.c @@ -460,3 +460,21 @@ int __init early_init_dt_scan_phyp_dump(unsigned long node, *((unsigned long *)&sizes[4]); return 1; } + +/* Look for phyp_dump= cmdline option */ +static int __init early_phyp_dump_enabled(char *p) +{ + phyp_dump_info->phyp_dump_at_boot = 1; + + if (!p) + return 0; + + if (strncmp(p, "1", 1) == 0) + phyp_dump_info->phyp_dump_at_boot = 1; + else if (strncmp(p, "0", 1) == 0) + phyp_dump_info->phyp_dump_at_boot = 0; + + return 0; +} +early_param("phyp_dump", early_phyp_dump_enabled); + diff --git a/include/asm-powerpc/phyp_dump.h b/include/asm-powerpc/phyp_dump.h index b454de45b2ca..209a98913d9d 100644 --- a/include/asm-powerpc/phyp_dump.h +++ b/include/asm-powerpc/phyp_dump.h @@ -25,6 +25,7 @@ struct phyp_dump { unsigned long init_reserve_start; unsigned long init_reserve_size; /* Check status during boot if dump supported, active & present*/ + unsigned long phyp_dump_at_boot; unsigned long phyp_dump_configured; unsigned long phyp_dump_is_active; /* store cpu & hpte size */ -- cgit v1.2.3 From 9356d90effa39c83c8fdba2a14cecec79959d4d0 Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Sun, 23 Mar 2008 06:05:43 +1100 Subject: [POWERPC] Move a.out.h to header-y since it doesn't check __KERNEL__ Since a.out.h doesn't check the value of __KERNEL__, there's no point in unifdef'ing it. Signed-off-by: Robert P. J. Day Signed-off-by: Paul Mackerras --- include/asm-powerpc/Kbuild | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/Kbuild b/include/asm-powerpc/Kbuild index 5f640e542475..7381916dfcbb 100644 --- a/include/asm-powerpc/Kbuild +++ b/include/asm-powerpc/Kbuild @@ -1,5 +1,6 @@ include include/asm-generic/Kbuild.asm +header-y += a.out.h header-y += auxvec.h header-y += ioctls.h header-y += mman.h @@ -23,7 +24,6 @@ header-y += sigcontext.h header-y += statfs.h header-y += ps3fb.h -unifdef-y += a.out.h unifdef-y += asm-compat.h unifdef-y += bootx.h unifdef-y += byteorder.h -- cgit v1.2.3 From 266d028acb615e1766c3fb9530c9e86de8476a33 Mon Sep 17 00:00:00 2001 From: Valentine Barshak Date: Thu, 6 Mar 2008 05:38:04 +1100 Subject: [POWERPC] 4xx: Add dcri_clrset() for locked read/modify/write functionality This adds dcri_clrset() macro which does read/modify/write on indirect dcr registers while holding indirect dcr lock. Signed-off-by: Valentine Barshak Acked-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer --- include/asm-powerpc/dcr-native.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h index be6c879e8760..f8398ce80372 100644 --- a/include/asm-powerpc/dcr-native.h +++ b/include/asm-powerpc/dcr-native.h @@ -82,6 +82,19 @@ static inline void __mtdcri(int base_addr, int base_data, int reg, spin_unlock_irqrestore(&dcr_ind_lock, flags); } +static inline void __dcri_clrset(int base_addr, int base_data, int reg, + unsigned clr, unsigned set) +{ + unsigned long flags; + unsigned int val; + + spin_lock_irqsave(&dcr_ind_lock, flags); + __mtdcr(base_addr, reg); + val = (__mfdcr(base_data) & ~clr) | set; + __mtdcr(base_data, val); + spin_unlock_irqrestore(&dcr_ind_lock, flags); +} + #define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \ DCRN_ ## base ## _CONFIG_DATA, \ reg) @@ -90,6 +103,10 @@ static inline void __mtdcri(int base_addr, int base_data, int reg, DCRN_ ## base ## _CONFIG_DATA, \ reg, data) +#define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \ + DCRN_ ## base ## _CONFIG_DATA, \ + reg, clr, set) + #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_DCR_NATIVE_H */ -- cgit v1.2.3 From 2a7069190e7a7f19bd37e8c08e2bf02c8d6330f7 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 26 Mar 2008 22:39:50 +1100 Subject: [POWERPC] 4xx: Add PPC4xx L2-cache support (440GX) This patch adds support for the 256k L2 cache found on some IBM/AMCC 4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c) which currently "only" adds the L2 cache init code. Other common 4xx stuff can be added later here. The L2 cache handling code is a copy of Eugene's code in arch/ppc with small modifications. Tested on AMCC Taishan 440GX. Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/Kconfig | 3 + arch/powerpc/platforms/44x/Kconfig | 1 + arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/ppc4xx_soc.c | 189 +++++++++++++++++++++++++++++++++++++ include/asm-powerpc/dcr-regs.h | 78 +++++++++++++++ 5 files changed, 272 insertions(+) create mode 100644 arch/powerpc/sysdev/ppc4xx_soc.c (limited to 'include') diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3651355b6ad7..f43d82dbc323 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -501,6 +501,9 @@ config FSL_PCI bool select PPC_INDIRECT_PCI +config 4xx_SOC + bool + # Yes MCA RS/6000s exist but Linux-PPC does not currently support any config MCA bool diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 6abe91357eee..5fc28aa459e3 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -129,6 +129,7 @@ config 440GP config 440GX bool + select 4xx_SOC select IBM_NEW_EMAC_EMAC4 select IBM_NEW_EMAC_RGMII select IBM_NEW_EMAC_ZMII #test only diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 15f3e8527d77..851a0be71947 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o obj-$(CONFIG_PPC_I8259) += i8259.o obj-$(CONFIG_IPIC) += ipic.o obj-$(CONFIG_4xx) += uic.o +obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o obj-$(CONFIG_OF_RTC) += of_rtc.o ifeq ($(CONFIG_PCI),y) diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c new file mode 100644 index 000000000000..4b8617e44314 --- /dev/null +++ b/arch/powerpc/sysdev/ppc4xx_soc.c @@ -0,0 +1,189 @@ +/* + * IBM/AMCC PPC4xx SoC setup code + * + * Copyright 2008 DENX Software Engineering, Stefan Roese + * + * L2 cache routines cloned from arch/ppc/syslib/ibm440gx_common.c which is: + * Eugene Surovegin or + * Copyright (c) 2003 - 2006 Zultys Technologies + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static u32 dcrbase_l2c; + +/* + * L2-cache + */ + +/* Issue L2C diagnostic command */ +static inline u32 l2c_diag(u32 addr) +{ + mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, addr); + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_DIAG); + while (!(mfdcr(dcrbase_l2c + DCRN_L2C0_SR) & L2C_SR_CC)) + ; + + return mfdcr(dcrbase_l2c + DCRN_L2C0_DATA); +} + +static irqreturn_t l2c_error_handler(int irq, void *dev) +{ + u32 sr = mfdcr(dcrbase_l2c + DCRN_L2C0_SR); + + if (sr & L2C_SR_CPE) { + /* Read cache trapped address */ + u32 addr = l2c_diag(0x42000000); + printk(KERN_EMERG "L2C: Cache Parity Error, addr[16:26] = 0x%08x\n", + addr); + } + if (sr & L2C_SR_TPE) { + /* Read tag trapped address */ + u32 addr = l2c_diag(0x82000000) >> 16; + printk(KERN_EMERG "L2C: Tag Parity Error, addr[16:26] = 0x%08x\n", + addr); + } + + /* Clear parity errors */ + if (sr & (L2C_SR_CPE | L2C_SR_TPE)){ + mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, 0); + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); + } else { + printk(KERN_EMERG "L2C: LRU error\n"); + } + + return IRQ_HANDLED; +} + +static int __init ppc4xx_l2c_probe(void) +{ + struct device_node *np; + u32 r; + unsigned long flags; + int irq; + const u32 *dcrreg; + u32 dcrbase_isram; + int len; + const u32 *prop; + u32 l2_size; + + np = of_find_compatible_node(NULL, NULL, "ibm,l2-cache"); + if (!np) + return 0; + + /* Get l2 cache size */ + prop = of_get_property(np, "cache-size", NULL); + if (prop == NULL) { + printk(KERN_ERR "%s: Can't get cache-size!\n", np->full_name); + of_node_put(np); + return -ENODEV; + } + l2_size = prop[0]; + + /* Map DCRs */ + dcrreg = of_get_property(np, "dcr-reg", &len); + if (!dcrreg || (len != 4 * sizeof(u32))) { + printk(KERN_ERR "%s: Can't get DCR register base !", + np->full_name); + of_node_put(np); + return -ENODEV; + } + dcrbase_isram = dcrreg[0]; + dcrbase_l2c = dcrreg[2]; + + /* Get and map irq number from device tree */ + irq = irq_of_parse_and_map(np, 0); + if (irq == NO_IRQ) { + printk(KERN_ERR "irq_of_parse_and_map failed\n"); + of_node_put(np); + return -ENODEV; + } + + /* Install error handler */ + if (request_irq(irq, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0) { + printk(KERN_ERR "Cannot install L2C error handler" + ", cache is not enabled\n"); + of_node_put(np); + return -ENODEV; + } + + local_irq_save(flags); + asm volatile ("sync" ::: "memory"); + + /* Disable SRAM */ + mtdcr(dcrbase_isram + DCRN_SRAM0_DPC, + mfdcr(dcrbase_isram + DCRN_SRAM0_DPC) & ~SRAM_DPC_ENABLE); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB0CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB0CR) & ~SRAM_SBCR_BU_MASK); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB1CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB1CR) & ~SRAM_SBCR_BU_MASK); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB2CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB2CR) & ~SRAM_SBCR_BU_MASK); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB3CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB3CR) & ~SRAM_SBCR_BU_MASK); + + /* Enable L2_MODE without ICU/DCU */ + r = mfdcr(dcrbase_l2c + DCRN_L2C0_CFG) & + ~(L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_SS_MASK); + r |= L2C_CFG_L2M | L2C_CFG_SS_256; + mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); + + mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, 0); + + /* Hardware Clear Command */ + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_HCC); + while (!(mfdcr(dcrbase_l2c + DCRN_L2C0_SR) & L2C_SR_CC)) + ; + + /* Clear Cache Parity and Tag Errors */ + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); + + /* Enable 64G snoop region starting at 0 */ + r = mfdcr(dcrbase_l2c + DCRN_L2C0_SNP0) & + ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK); + r |= L2C_SNP_SSR_32G | L2C_SNP_ESR; + mtdcr(dcrbase_l2c + DCRN_L2C0_SNP0, r); + + r = mfdcr(dcrbase_l2c + DCRN_L2C0_SNP1) & + ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK); + r |= 0x80000000 | L2C_SNP_SSR_32G | L2C_SNP_ESR; + mtdcr(dcrbase_l2c + DCRN_L2C0_SNP1, r); + + asm volatile ("sync" ::: "memory"); + + /* Enable ICU/DCU ports */ + r = mfdcr(dcrbase_l2c + DCRN_L2C0_CFG); + r &= ~(L2C_CFG_DCW_MASK | L2C_CFG_PMUX_MASK | L2C_CFG_PMIM + | L2C_CFG_TPEI | L2C_CFG_CPEI | L2C_CFG_NAM | L2C_CFG_NBRM); + r |= L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_TPC | L2C_CFG_CPC | L2C_CFG_FRAN + | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; + + /* Check for 460EX/GT special handling */ + if (of_device_is_compatible(np, "ibm,l2-cache-460ex")) + r |= L2C_CFG_RDBW; + + mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); + + asm volatile ("sync; isync" ::: "memory"); + local_irq_restore(flags); + + printk(KERN_INFO "%dk L2-cache enabled\n", l2_size >> 10); + + of_node_put(np); + return 0; +} +arch_initcall(ppc4xx_l2c_probe); diff --git a/include/asm-powerpc/dcr-regs.h b/include/asm-powerpc/dcr-regs.h index 9f1fb98fcdc6..29b0ecef980a 100644 --- a/include/asm-powerpc/dcr-regs.h +++ b/include/asm-powerpc/dcr-regs.h @@ -68,4 +68,82 @@ #define SDR0_UART3 0x0123 #define SDR0_CUST0 0x4000 +/* + * All those DCR register addresses are offsets from the base address + * for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is + * excluded here and configured in the device tree. + */ +#define DCRN_SRAM0_SB0CR 0x00 +#define DCRN_SRAM0_SB1CR 0x01 +#define DCRN_SRAM0_SB2CR 0x02 +#define DCRN_SRAM0_SB3CR 0x03 +#define SRAM_SBCR_BU_MASK 0x00000180 +#define SRAM_SBCR_BS_64KB 0x00000800 +#define SRAM_SBCR_BU_RO 0x00000080 +#define SRAM_SBCR_BU_RW 0x00000180 +#define DCRN_SRAM0_BEAR 0x04 +#define DCRN_SRAM0_BESR0 0x05 +#define DCRN_SRAM0_BESR1 0x06 +#define DCRN_SRAM0_PMEG 0x07 +#define DCRN_SRAM0_CID 0x08 +#define DCRN_SRAM0_REVID 0x09 +#define DCRN_SRAM0_DPC 0x0a +#define SRAM_DPC_ENABLE 0x80000000 + +/* + * All those DCR register addresses are offsets from the base address + * for the SRAM0 controller (e.g. 0x30 on 440GX). The base address is + * excluded here and configured in the device tree. + */ +#define DCRN_L2C0_CFG 0x00 +#define L2C_CFG_L2M 0x80000000 +#define L2C_CFG_ICU 0x40000000 +#define L2C_CFG_DCU 0x20000000 +#define L2C_CFG_DCW_MASK 0x1e000000 +#define L2C_CFG_TPC 0x01000000 +#define L2C_CFG_CPC 0x00800000 +#define L2C_CFG_FRAN 0x00200000 +#define L2C_CFG_SS_MASK 0x00180000 +#define L2C_CFG_SS_256 0x00000000 +#define L2C_CFG_CPIM 0x00040000 +#define L2C_CFG_TPIM 0x00020000 +#define L2C_CFG_LIM 0x00010000 +#define L2C_CFG_PMUX_MASK 0x00007000 +#define L2C_CFG_PMUX_SNP 0x00000000 +#define L2C_CFG_PMUX_IF 0x00001000 +#define L2C_CFG_PMUX_DF 0x00002000 +#define L2C_CFG_PMUX_DS 0x00003000 +#define L2C_CFG_PMIM 0x00000800 +#define L2C_CFG_TPEI 0x00000400 +#define L2C_CFG_CPEI 0x00000200 +#define L2C_CFG_NAM 0x00000100 +#define L2C_CFG_SMCM 0x00000080 +#define L2C_CFG_NBRM 0x00000040 +#define L2C_CFG_RDBW 0x00000008 /* only 460EX/GT */ +#define DCRN_L2C0_CMD 0x01 +#define L2C_CMD_CLR 0x80000000 +#define L2C_CMD_DIAG 0x40000000 +#define L2C_CMD_INV 0x20000000 +#define L2C_CMD_CCP 0x10000000 +#define L2C_CMD_CTE 0x08000000 +#define L2C_CMD_STRC 0x04000000 +#define L2C_CMD_STPC 0x02000000 +#define L2C_CMD_RPMC 0x01000000 +#define L2C_CMD_HCC 0x00800000 +#define DCRN_L2C0_ADDR 0x02 +#define DCRN_L2C0_DATA 0x03 +#define DCRN_L2C0_SR 0x04 +#define L2C_SR_CC 0x80000000 +#define L2C_SR_CPE 0x40000000 +#define L2C_SR_TPE 0x20000000 +#define L2C_SR_LRU 0x10000000 +#define L2C_SR_PCS 0x08000000 +#define DCRN_L2C0_REVID 0x05 +#define DCRN_L2C0_SNP0 0x06 +#define DCRN_L2C0_SNP1 0x07 +#define L2C_SNP_BA_MASK 0xffff0000 +#define L2C_SNP_SSR_MASK 0x0000f000 +#define L2C_SNP_SSR_32G 0x0000f000 +#define L2C_SNP_ESR 0x00000800 + #endif /* __DCR_REGS_H__ */ -- cgit v1.2.3 From ca052f7924141f34998ab440bb4d908dc021a46b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 27 Mar 2008 11:38:31 +1100 Subject: [POWERPC] PS3: Save power in busy loops on halt PS3 save power on halt: - Replace infinite busy loops by smarter loops calling lv1_pause() to save power. - Add ps3_halt() and ps3_sys_manager_halt(). - Add __noreturn annotations. Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/ps3/setup.c | 12 +++++++++++- drivers/ps3/ps3-sys-manager.c | 30 ++++++++++++++++++++---------- drivers/ps3/sys-manager-core.c | 16 ++++++++++------ include/asm-powerpc/ps3.h | 5 +++-- 4 files changed, 44 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c index 5c2cbb08eb52..c144669a0d3f 100644 --- a/arch/powerpc/platforms/ps3/setup.c +++ b/arch/powerpc/platforms/ps3/setup.c @@ -95,6 +95,14 @@ static void ps3_power_off(void) ps3_sys_manager_power_off(); /* never returns */ } +static void ps3_halt(void) +{ + DBG("%s:%d\n", __func__, __LINE__); + + smp_send_stop(); + ps3_sys_manager_halt(); /* never returns */ +} + static void ps3_panic(char *str) { DBG("%s:%d %s\n", __func__, __LINE__, str); @@ -105,7 +113,8 @@ static void ps3_panic(char *str) printk(" Please press POWER button.\n"); printk("\n"); - while(1); + while(1) + lv1_pause(1); } #if defined(CONFIG_FB_PS3) || defined(CONFIG_FB_PS3_MODULE) || \ @@ -266,6 +275,7 @@ define_machine(ps3) { .progress = ps3_progress, .restart = ps3_restart, .power_off = ps3_power_off, + .halt = ps3_halt, #if defined(CONFIG_KEXEC) .kexec_cpu_down = ps3_kexec_cpu_down, .machine_kexec = default_machine_kexec, diff --git a/drivers/ps3/ps3-sys-manager.c b/drivers/ps3/ps3-sys-manager.c index d4f6f960dd18..1260b01a5361 100644 --- a/drivers/ps3/ps3-sys-manager.c +++ b/drivers/ps3/ps3-sys-manager.c @@ -24,6 +24,7 @@ #include #include +#include #include #include "vuart.h" @@ -581,6 +582,23 @@ fail_id: return -EIO; } +static void ps3_sys_manager_fin(struct ps3_system_bus_device *dev) +{ + ps3_sys_manager_send_request_shutdown(dev); + + pr_emerg("System Halted, OK to turn off power\n"); + + while (ps3_sys_manager_handle_msg(dev)) { + /* pause until next DEC interrupt */ + lv1_pause(0); + } + + while (1) { + /* pause, ignoring DEC interrupt */ + lv1_pause(1); + } +} + /** * ps3_sys_manager_final_power_off - The final platform machine_power_off routine. * @@ -602,12 +620,8 @@ static void ps3_sys_manager_final_power_off(struct ps3_system_bus_device *dev) ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_SHUTDOWN, PS3_SM_WAKE_DEFAULT); - ps3_sys_manager_send_request_shutdown(dev); - - pr_emerg("System Halted, OK to turn off power\n"); - while (1) - ps3_sys_manager_handle_msg(dev); + ps3_sys_manager_fin(dev); } /** @@ -639,12 +653,8 @@ static void ps3_sys_manager_final_restart(struct ps3_system_bus_device *dev) ps3_sys_manager_send_attr(dev, 0); ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_REBOOT, PS3_SM_WAKE_DEFAULT); - ps3_sys_manager_send_request_shutdown(dev); - - pr_emerg("System Halted, OK to turn off power\n"); - while (1) - ps3_sys_manager_handle_msg(dev); + ps3_sys_manager_fin(dev); } /** diff --git a/drivers/ps3/sys-manager-core.c b/drivers/ps3/sys-manager-core.c index 31648f7d9ae1..474225852b63 100644 --- a/drivers/ps3/sys-manager-core.c +++ b/drivers/ps3/sys-manager-core.c @@ -19,6 +19,7 @@ */ #include +#include #include /** @@ -50,10 +51,7 @@ void ps3_sys_manager_power_off(void) if (ps3_sys_manager_ops.power_off) ps3_sys_manager_ops.power_off(ps3_sys_manager_ops.dev); - printk(KERN_EMERG "System Halted, OK to turn off power\n"); - local_irq_disable(); - while (1) - (void)0; + ps3_sys_manager_halt(); } void ps3_sys_manager_restart(void) @@ -61,8 +59,14 @@ void ps3_sys_manager_restart(void) if (ps3_sys_manager_ops.restart) ps3_sys_manager_ops.restart(ps3_sys_manager_ops.dev); - printk(KERN_EMERG "System Halted, OK to turn off power\n"); + ps3_sys_manager_halt(); +} + +void ps3_sys_manager_halt(void) +{ + pr_emerg("System Halted, OK to turn off power\n"); local_irq_disable(); while (1) - (void)0; + lv1_pause(1); } + diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index 2b693673eff4..d01c701bd27b 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -434,8 +434,9 @@ struct ps3_sys_manager_ops { }; void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops); -void ps3_sys_manager_power_off(void); -void ps3_sys_manager_restart(void); +void __noreturn ps3_sys_manager_power_off(void); +void __noreturn ps3_sys_manager_restart(void); +void __noreturn ps3_sys_manager_halt(void); struct ps3_prealloc { const char *name; -- cgit v1.2.3 From 1c43d265f462bc714da67aa8113b3846bb9943e3 Mon Sep 17 00:00:00 2001 From: Geoff Levand Date: Thu, 27 Mar 2008 11:39:04 +1100 Subject: [POWERPC] PS3: Sys-manager Wake-on-LAN support Add Wake-on-LAN support to the PS3 system-manager. Other OS WOL support was introduced in PS3 system firmware 2.20. Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- drivers/ps3/ps3-sys-manager.c | 46 +++++++++++++++++++++++++++++++++++++++++-- include/asm-powerpc/ps3.h | 2 ++ 2 files changed, 46 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/ps3/ps3-sys-manager.c b/drivers/ps3/ps3-sys-manager.c index 1260b01a5361..7605453b74fd 100644 --- a/drivers/ps3/ps3-sys-manager.c +++ b/drivers/ps3/ps3-sys-manager.c @@ -188,6 +188,7 @@ enum ps3_sys_manager_next_op { * controller, and bluetooth controller. * @PS3_SM_WAKE_RTC: * @PS3_SM_WAKE_RTC_ERROR: + * @PS3_SM_WAKE_W_O_L: Ether or wireless LAN. * @PS3_SM_WAKE_P_O_R: Power on reset. * * Additional wakeup sources when specifying PS3_SM_NEXT_OP_SYS_SHUTDOWN. @@ -201,9 +202,18 @@ enum ps3_sys_manager_wake_source { PS3_SM_WAKE_DEFAULT = 0, PS3_SM_WAKE_RTC = 0x00000040, PS3_SM_WAKE_RTC_ERROR = 0x00000080, + PS3_SM_WAKE_W_O_L = 0x00000400, PS3_SM_WAKE_P_O_R = 0x80000000, }; +/** + * user_wake_sources - User specified wakeup sources. + * + * Logical OR of enum ps3_sys_manager_wake_source types. + */ + +static u32 user_wake_sources = PS3_SM_WAKE_DEFAULT; + /** * enum ps3_sys_manager_cmd - Command from system manager to guest. * @@ -619,7 +629,7 @@ static void ps3_sys_manager_final_power_off(struct ps3_system_bus_device *dev) ps3_vuart_cancel_async(dev); ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_SHUTDOWN, - PS3_SM_WAKE_DEFAULT); + user_wake_sources); ps3_sys_manager_fin(dev); } @@ -652,11 +662,43 @@ static void ps3_sys_manager_final_restart(struct ps3_system_bus_device *dev) ps3_sys_manager_send_attr(dev, 0); ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_REBOOT, - PS3_SM_WAKE_DEFAULT); + user_wake_sources); ps3_sys_manager_fin(dev); } +/** + * ps3_sys_manager_get_wol - Get wake-on-lan setting. + */ + +int ps3_sys_manager_get_wol(void) +{ + pr_debug("%s:%d\n", __func__, __LINE__); + + return (user_wake_sources & PS3_SM_WAKE_W_O_L) != 0; +} +EXPORT_SYMBOL_GPL(ps3_sys_manager_get_wol); + +/** + * ps3_sys_manager_set_wol - Set wake-on-lan setting. + */ + +void ps3_sys_manager_set_wol(int state) +{ + static DEFINE_MUTEX(mutex); + + mutex_lock(&mutex); + + pr_debug("%s:%d: %d\n", __func__, __LINE__, state); + + if (state) + user_wake_sources |= PS3_SM_WAKE_W_O_L; + else + user_wake_sources &= ~PS3_SM_WAKE_W_O_L; + mutex_unlock(&mutex); +} +EXPORT_SYMBOL_GPL(ps3_sys_manager_set_wol); + /** * ps3_sys_manager_work - Asynchronous read handler. * diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index d01c701bd27b..9e8ed6824e15 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -437,6 +437,8 @@ void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops); void __noreturn ps3_sys_manager_power_off(void); void __noreturn ps3_sys_manager_restart(void); void __noreturn ps3_sys_manager_halt(void); +int ps3_sys_manager_get_wol(void); +void ps3_sys_manager_set_wol(int state); struct ps3_prealloc { const char *name; -- cgit v1.2.3 From 52db9b44262754bad1b0456d27a862a46cc7f893 Mon Sep 17 00:00:00 2001 From: Badari Pulavarty Date: Fri, 28 Mar 2008 11:37:21 +1100 Subject: [POWERPC] Add error return from htab_remove_mapping() If the platform doesn't support hpte_removebolted(), gracefully return failure rather than success. Signed-off-by: Badari Pulavarty Signed-off-by: Paul Mackerras --- arch/powerpc/mm/hash_utils_64.c | 14 +++++++++----- include/asm-powerpc/sparsemem.h | 2 +- 2 files changed, 10 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index c2e5f61788b0..2f3dfcc7cdd3 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -192,7 +192,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, return ret < 0 ? ret : 0; } -static void htab_remove_mapping(unsigned long vstart, unsigned long vend, +static int htab_remove_mapping(unsigned long vstart, unsigned long vend, int psize, int ssize) { unsigned long vaddr; @@ -202,12 +202,15 @@ static void htab_remove_mapping(unsigned long vstart, unsigned long vend, step = 1 << shift; if (!ppc_md.hpte_removebolted) { - printk("Sub-arch doesn't implement hpte_removebolted\n"); - return; + printk(KERN_WARNING "Platform doesn't implement " + "hpte_removebolted\n"); + return -EINVAL; } for (vaddr = vstart; vaddr < vend; vaddr += step) ppc_md.hpte_removebolted(vaddr, psize, ssize); + + return 0; } static int __init htab_dt_scan_seg_sizes(unsigned long node, @@ -454,9 +457,10 @@ void create_section_mapping(unsigned long start, unsigned long end) mmu_linear_psize, mmu_kernel_ssize)); } -void remove_section_mapping(unsigned long start, unsigned long end) +int remove_section_mapping(unsigned long start, unsigned long end) { - htab_remove_mapping(start, end, mmu_linear_psize, mmu_kernel_ssize); + return htab_remove_mapping(start, end, mmu_linear_psize, + mmu_kernel_ssize); } #endif /* CONFIG_MEMORY_HOTPLUG */ diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h index c5acf4ccf571..9aea8e9f0bd1 100644 --- a/include/asm-powerpc/sparsemem.h +++ b/include/asm-powerpc/sparsemem.h @@ -15,7 +15,7 @@ #ifdef CONFIG_MEMORY_HOTPLUG extern void create_section_mapping(unsigned long start, unsigned long end); -extern void remove_section_mapping(unsigned long start, unsigned long end); +extern int remove_section_mapping(unsigned long start, unsigned long end); #ifdef CONFIG_NUMA extern int hot_add_scn_to_nid(unsigned long scn_addr); #else -- cgit v1.2.3 From 93173ce272e54f81460986ff5040d16ab79488a9 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 28 Mar 2008 01:43:31 +1100 Subject: [POWERPC] 4xx: Create common ppc4xx_reset_system() in ppc4xx_soc.c This patch creates a common system reset routine for all 40x and 44x systems. Previously only a 44x routine existed. But since this system reset via the debug control register is common for 40x and 44x let's share this code for all those platforms in ppc4xx_soc.c. This patch also enables CONFIG_4xx_SOC for all 40x and 44x platforms. Tested on Kilauea (405EX) and Canyonlands (440EX). Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/platforms/40x/ep405.c | 2 ++ arch/powerpc/platforms/40x/kilauea.c | 4 +++- arch/powerpc/platforms/40x/makalu.c | 2 ++ arch/powerpc/platforms/40x/virtex.c | 2 ++ arch/powerpc/platforms/40x/walnut.c | 4 +++- arch/powerpc/platforms/44x/44x.h | 1 - arch/powerpc/platforms/44x/Kconfig | 1 - arch/powerpc/platforms/44x/bamboo.c | 15 +++++++-------- arch/powerpc/platforms/44x/canyonlands.c | 5 ++--- arch/powerpc/platforms/44x/ebony.c | 5 ++--- arch/powerpc/platforms/44x/katmai.c | 5 ++--- arch/powerpc/platforms/44x/misc_44x.S | 11 ----------- arch/powerpc/platforms/44x/rainier.c | 4 ++-- arch/powerpc/platforms/44x/sequoia.c | 4 ++-- arch/powerpc/platforms/44x/taishan.c | 5 ++--- arch/powerpc/platforms/44x/warp.c | 6 ++---- arch/powerpc/platforms/Kconfig.cputype | 2 ++ arch/powerpc/sysdev/ppc4xx_soc.c | 11 +++++++++++ include/asm-powerpc/ppc4xx.h | 18 ++++++++++++++++++ 19 files changed, 64 insertions(+), 43 deletions(-) create mode 100644 include/asm-powerpc/ppc4xx.h (limited to 'include') diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c index 13d1345026da..ae2e7f67c18e 100644 --- a/arch/powerpc/platforms/40x/ep405.c +++ b/arch/powerpc/platforms/40x/ep405.c @@ -29,6 +29,7 @@ #include #include #include +#include static struct device_node *bcsr_node; static void __iomem *bcsr_regs; @@ -119,5 +120,6 @@ define_machine(ep405) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c index f9206a7fede0..1dd24ffc0dc1 100644 --- a/arch/powerpc/platforms/40x/kilauea.c +++ b/arch/powerpc/platforms/40x/kilauea.c @@ -1,7 +1,7 @@ /* * Kilauea board specific routines * - * Copyright 2007 DENX Software Engineering, Stefan Roese + * Copyright 2007-2008 DENX Software Engineering, Stefan Roese * * Based on the Walnut code by * Josh Boyer @@ -20,6 +20,7 @@ #include #include #include +#include static __initdata struct of_device_id kilauea_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -54,5 +55,6 @@ define_machine(kilauea) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/makalu.c b/arch/powerpc/platforms/40x/makalu.c index 4e4df72fc9cd..a6a1d6017b71 100644 --- a/arch/powerpc/platforms/40x/makalu.c +++ b/arch/powerpc/platforms/40x/makalu.c @@ -20,6 +20,7 @@ #include #include #include +#include static __initdata struct of_device_id makalu_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -54,5 +55,6 @@ define_machine(makalu) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c index 0422590040db..fc7fb001276c 100644 --- a/arch/powerpc/platforms/40x/virtex.c +++ b/arch/powerpc/platforms/40x/virtex.c @@ -14,6 +14,7 @@ #include #include #include +#include static struct of_device_id xilinx_of_bus_ids[] __initdata = { { .compatible = "xlnx,plb-v46-1.00.a", }, @@ -48,5 +49,6 @@ define_machine(virtex) { .probe = virtex_probe, .init_IRQ = xilinx_intc_init_tree, .get_irq = xilinx_intc_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c index b8b257efeb77..335df91fbee5 100644 --- a/arch/powerpc/platforms/40x/walnut.c +++ b/arch/powerpc/platforms/40x/walnut.c @@ -26,6 +26,7 @@ #include #include #include +#include static __initdata struct of_device_id walnut_of_bus[] = { { .compatible = "ibm,plb3", }, @@ -61,5 +62,6 @@ define_machine(walnut) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .calibrate_decr = generic_calibrate_decr, + .restart = ppc4xx_reset_system, + .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h index 42eabf87fea3..dbc4d2b4301a 100644 --- a/arch/powerpc/platforms/44x/44x.h +++ b/arch/powerpc/platforms/44x/44x.h @@ -3,6 +3,5 @@ extern u8 as1_readb(volatile u8 __iomem *addr); extern void as1_writeb(u8 data, volatile u8 __iomem *addr); -extern void ppc44x_reset_system(char *cmd); #endif /* __POWERPC_PLATFORMS_44X_44X_H */ diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 5fc28aa459e3..6abe91357eee 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -129,7 +129,6 @@ config 440GP config 440GX bool - select 4xx_SOC select IBM_NEW_EMAC_EMAC4 select IBM_NEW_EMAC_RGMII select IBM_NEW_EMAC_ZMII #test only diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c index fb9a22a7e8d0..cef169e95156 100644 --- a/arch/powerpc/platforms/44x/bamboo.c +++ b/arch/powerpc/platforms/44x/bamboo.c @@ -22,8 +22,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id bamboo_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -53,11 +52,11 @@ static int __init bamboo_probe(void) } define_machine(bamboo) { - .name = "Bamboo", - .probe = bamboo_probe, - .progress = udbg_progress, - .init_IRQ = uic_init_tree, - .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .name = "Bamboo", + .probe = bamboo_probe, + .progress = udbg_progress, + .init_IRQ = uic_init_tree, + .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c index dac5b3203696..3949289f51df 100644 --- a/arch/powerpc/platforms/44x/canyonlands.c +++ b/arch/powerpc/platforms/44x/canyonlands.c @@ -23,8 +23,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id canyonlands_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -59,6 +58,6 @@ define_machine(canyonlands) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c index 1a8d467bff85..a0e8fe4662f6 100644 --- a/arch/powerpc/platforms/44x/ebony.c +++ b/arch/powerpc/platforms/44x/ebony.c @@ -26,8 +26,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id ebony_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -66,6 +65,6 @@ define_machine(ebony) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/katmai.c b/arch/powerpc/platforms/44x/katmai.c index 11134121f272..44f4b3a00ced 100644 --- a/arch/powerpc/platforms/44x/katmai.c +++ b/arch/powerpc/platforms/44x/katmai.c @@ -22,8 +22,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id katmai_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -58,6 +57,6 @@ define_machine(katmai) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/misc_44x.S b/arch/powerpc/platforms/44x/misc_44x.S index 3bce71d5d756..dc12b8009e48 100644 --- a/arch/powerpc/platforms/44x/misc_44x.S +++ b/arch/powerpc/platforms/44x/misc_44x.S @@ -44,14 +44,3 @@ _GLOBAL(as1_writeb) sync isync blr - -/* - * void ppc44x_reset_system(char *cmd) - * - * At present, this routine just applies a system reset. - */ -_GLOBAL(ppc44x_reset_system) - mfspr r13,SPRN_DBCR0 - oris r13,r13,DBCR0_RST_SYSTEM@h - mtspr SPRN_DBCR0,r13 - b . /* Just in case the reset doesn't work */ diff --git a/arch/powerpc/platforms/44x/rainier.c b/arch/powerpc/platforms/44x/rainier.c index a7fae1cf69c1..4f1ff84c4b63 100644 --- a/arch/powerpc/platforms/44x/rainier.c +++ b/arch/powerpc/platforms/44x/rainier.c @@ -22,7 +22,7 @@ #include #include #include -#include "44x.h" +#include static __initdata struct of_device_id rainier_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -57,6 +57,6 @@ define_machine(rainier) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c index d279db42c896..49eb73daacdf 100644 --- a/arch/powerpc/platforms/44x/sequoia.c +++ b/arch/powerpc/platforms/44x/sequoia.c @@ -23,7 +23,7 @@ #include #include -#include "44x.h" +#include static __initdata struct of_device_id sequoia_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -58,6 +58,6 @@ define_machine(sequoia) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/taishan.c b/arch/powerpc/platforms/44x/taishan.c index 28ab7e2e02c3..49c78b2098b4 100644 --- a/arch/powerpc/platforms/44x/taishan.c +++ b/arch/powerpc/platforms/44x/taishan.c @@ -29,8 +29,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id taishan_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -68,6 +67,6 @@ define_machine(taishan) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index da5b7b7599db..39cf6150a72b 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c @@ -18,9 +18,7 @@ #include #include #include - -#include "44x.h" - +#include static __initdata struct of_device_id warp_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -49,7 +47,7 @@ define_machine(warp) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index 0c3face0ddbb..5fc7fac10e93 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -41,11 +41,13 @@ config 40x bool "AMCC 40x" select PPC_DCR_NATIVE select PPC_UDBG_16550 + select 4xx_SOC config 44x bool "AMCC 44x" select PPC_DCR_NATIVE select PPC_UDBG_16550 + select 4xx_SOC config E200 bool "Freescale e200" diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c index 4b8617e44314..5b32adc9a9b2 100644 --- a/arch/powerpc/sysdev/ppc4xx_soc.c +++ b/arch/powerpc/sysdev/ppc4xx_soc.c @@ -23,6 +23,7 @@ #include #include +#include static u32 dcrbase_l2c; @@ -187,3 +188,13 @@ static int __init ppc4xx_l2c_probe(void) return 0; } arch_initcall(ppc4xx_l2c_probe); + +/* + * At present, this routine just applies a system reset. + */ +void ppc4xx_reset_system(char *cmd) +{ + mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_RST_SYSTEM); + while (1) + ; /* Just in case the reset doesn't work */ +} diff --git a/include/asm-powerpc/ppc4xx.h b/include/asm-powerpc/ppc4xx.h new file mode 100644 index 000000000000..033039a80c42 --- /dev/null +++ b/include/asm-powerpc/ppc4xx.h @@ -0,0 +1,18 @@ +/* + * PPC4xx Prototypes and definitions + * + * Copyright 2008 DENX Software Engineering, Stefan Roese + * + * This is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_POWERPC_PPC4xx_H__ +#define __ASM_POWERPC_PPC4xx_H__ + +extern void ppc4xx_reset_system(char *cmd); + +#endif /* __ASM_POWERPC_PPC4xx_H__ */ -- cgit v1.2.3 From 0119536cd314ef95553604208c25bc35581f7f0a Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Sat, 1 Mar 2008 03:04:57 +1100 Subject: [POWERPC] Add hand-coded assembly strcmp We have an assembly version of strncmp for the bootwrapper, but not for the kernel, so we end up using the C version in the kernel. This takes the strncmp code from the bootup and copies it to the kernel proper, adding two instructions so it copes correctly with len==0. Signed-off-by: Steven Rostedt Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/ppc_ksyms.c | 1 + arch/powerpc/lib/string.S | 14 ++++++++++++++ include/asm-powerpc/string.h | 2 ++ 3 files changed, 17 insertions(+) (limited to 'include') diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index a722ede726db..5a4c76eada48 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c @@ -78,6 +78,7 @@ EXPORT_SYMBOL(strncpy); EXPORT_SYMBOL(strcat); EXPORT_SYMBOL(strlen); EXPORT_SYMBOL(strcmp); +EXPORT_SYMBOL(strncmp); EXPORT_SYMBOL(csum_partial); EXPORT_SYMBOL(csum_partial_copy_generic); diff --git a/arch/powerpc/lib/string.S b/arch/powerpc/lib/string.S index c4c622d8e6ac..49eb1f1a2bb4 100644 --- a/arch/powerpc/lib/string.S +++ b/arch/powerpc/lib/string.S @@ -75,6 +75,20 @@ _GLOBAL(strcmp) beq 1b blr +_GLOBAL(strncmp) + PPC_LCMPI r5,0 + beqlr + mtctr r5 + addi r5,r3,-1 + addi r4,r4,-1 +1: lbzu r3,1(r5) + cmpwi 1,r3,0 + lbzu r0,1(r4) + subf. r3,r0,r3 + beqlr 1 + bdnzt eq,1b + blr + _GLOBAL(strlen) addi r4,r3,-1 1: lbzu r0,1(r4) diff --git a/include/asm-powerpc/string.h b/include/asm-powerpc/string.h index aa40f92c298d..e40010abcaf1 100644 --- a/include/asm-powerpc/string.h +++ b/include/asm-powerpc/string.h @@ -7,6 +7,7 @@ #define __HAVE_ARCH_STRNCPY #define __HAVE_ARCH_STRLEN #define __HAVE_ARCH_STRCMP +#define __HAVE_ARCH_STRNCMP #define __HAVE_ARCH_STRCAT #define __HAVE_ARCH_MEMSET #define __HAVE_ARCH_MEMCPY @@ -18,6 +19,7 @@ extern char * strcpy(char *,const char *); extern char * strncpy(char *,const char *, __kernel_size_t); extern __kernel_size_t strlen(const char *); extern int strcmp(const char *,const char *); +extern int strncmp(const char *, const char *, __kernel_size_t); extern char * strcat(char *, const char *); extern void * memset(void *,int,__kernel_size_t); extern void * memcpy(void *,const void *,__kernel_size_t); -- cgit v1.2.3 From 221ac329e93fe2a676346af2e98e311251648f69 Mon Sep 17 00:00:00 2001 From: Ionut Nicu Date: Thu, 6 Mar 2008 03:12:54 +1100 Subject: [POWERPC] Fix kernel panic in arch_arm_kprobe The code in arch_arm_kprobe was trying to set a breakpoint which resulted in a page fault because the kernel text pages were write protected. Disable the write protect when CONFIG_KPROBES is defined. Signed-off-by: Ionut Nicu Signed-off-by: Paul Mackerras --- include/asm-powerpc/pgtable-ppc32.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index 2c79f550272b..bd5b4011c53b 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -420,7 +420,8 @@ extern int icache_44x_need_flush; #define _PAGE_IO (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED) #define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC) -#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) +#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ + defined(CONFIG_KPROBES) /* We want the debuggers to be able to set breakpoints anywhere, so * don't write protect the kernel text */ #define _PAGE_RAM_TEXT _PAGE_RAM -- cgit v1.2.3 From 834d97d452208279edf11c57eca150360d2dd1d6 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Thu, 27 Mar 2008 00:33:14 +1100 Subject: [POWERPC] Add of_device_is_available function IEEE 1275 defined a standard "status" property to indicate the operational status of a device. The property has four possible values: okay, disabled, fail, fail-xxx. The absence of this property means the operational status of the device is unknown or okay. This adds a function called of_device_is_available that checks the state of the status property of a device. If the property is absent or set to either "okay" or "ok", it returns 1. Otherwise it returns 0. Signed-off-by: Josh Boyer Signed-off-by: Paul Mackerras --- drivers/of/base.c | 26 ++++++++++++++++++++++++++ include/linux/of.h | 1 + 2 files changed, 27 insertions(+) (limited to 'include') diff --git a/drivers/of/base.c b/drivers/of/base.c index 80c9deca5f35..9bd7c4a31253 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -116,6 +116,32 @@ int of_device_is_compatible(const struct device_node *device, } EXPORT_SYMBOL(of_device_is_compatible); +/** + * of_device_is_available - check if a device is available for use + * + * @device: Node to check for availability + * + * Returns 1 if the status property is absent or set to "okay" or "ok", + * 0 otherwise + */ +int of_device_is_available(const struct device_node *device) +{ + const char *status; + int statlen; + + status = of_get_property(device, "status", &statlen); + if (status == NULL) + return 1; + + if (statlen > 0) { + if (!strcmp(status, "okay") || !strcmp(status, "ok")) + return 1; + } + + return 0; +} +EXPORT_SYMBOL(of_device_is_available); + /** * of_get_parent - Get a node's parent if any * @node: Node to get parent diff --git a/include/linux/of.h b/include/linux/of.h index 6981016dcc25..59a61bdc98b6 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -62,6 +62,7 @@ extern struct property *of_find_property(const struct device_node *np, int *lenp); extern int of_device_is_compatible(const struct device_node *device, const char *); +extern int of_device_is_available(const struct device_node *device); extern const void *of_get_property(const struct device_node *node, const char *name, int *lenp); -- cgit v1.2.3 From 3eb9cf076180ed2003db77bd2c33ac4ed0211089 Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Thu, 10 Apr 2008 16:39:18 +1000 Subject: [POWERPC] iSeries: Use alternate paca structure for booting The iSeries HV only needs the first two fields of the paca statically initialised, so create an alternate paca that contains only those and switch to our real paca immediately after boot. This is in order to make the 1024 cpu patches easier since they will no longer have to statically initialise the pacas for iSeries. Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/asm-offsets.c | 6 +++++ arch/powerpc/platforms/iseries/exception.S | 12 +++++++-- arch/powerpc/platforms/iseries/lpardata.c | 39 ++++++++++++++++++++++++++++-- include/asm-powerpc/iseries/alpaca.h | 31 ++++++++++++++++++++++++ 4 files changed, 84 insertions(+), 4 deletions(-) create mode 100644 include/asm-powerpc/iseries/alpaca.h (limited to 'include') diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index e932b43bd82f..292c6d8db0e1 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c @@ -44,6 +44,9 @@ #include #include #endif +#ifdef CONFIG_PPC_ISERIES +#include +#endif #define DEFINE(sym, val) \ asm volatile("\n->" #sym " %0 " #val : : "i" (val)) @@ -321,6 +324,9 @@ int main(void) DEFINE(PAGE_OFFSET_VSID, KERNEL_VSID(PAGE_OFFSET)); DEFINE(VMALLOC_START_ESID, GET_ESID(VMALLOC_START)); DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START)); + + /* alpaca */ + DEFINE(ALPACA_SIZE, sizeof(struct alpaca)); #endif DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE); diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S index 5381038f0881..c775cd4b3d6e 100644 --- a/arch/powerpc/platforms/iseries/exception.S +++ b/arch/powerpc/platforms/iseries/exception.S @@ -38,11 +38,19 @@ .globl system_reset_iSeries system_reset_iSeries: - mfspr r13,SPRN_SPRG3 /* Get paca address */ + mfspr r13,SPRN_SPRG3 /* Get alpaca address */ + LOAD_REG_IMMEDIATE(r23, alpaca) + li r0,ALPACA_SIZE + sub r23,r13,r23 + divdu r23,r23,r0 /* r23 has cpu number */ + LOAD_REG_IMMEDIATE(r13, paca) + mulli r0,r23,PACA_SIZE + add r13,r13,r0 + mtspr SPRN_SPRG3,r13 /* Save it away for the future */ mfmsr r24 ori r24,r24,MSR_RI mtmsrd r24 /* RI on */ - lhz r24,PACAPACAINDEX(r13) /* Get processor # */ + mr r24,r23 cmpwi 0,r24,0 /* Are we processor 0? */ bne 1f b .__start_initialization_iSeries /* Start up the first processor */ diff --git a/arch/powerpc/platforms/iseries/lpardata.c b/arch/powerpc/platforms/iseries/lpardata.c index 8162049bb04d..dc8470850a81 100644 --- a/arch/powerpc/platforms/iseries/lpardata.c +++ b/arch/powerpc/platforms/iseries/lpardata.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "naca.h" #include "vpd_areas.h" @@ -159,6 +160,40 @@ struct SpCommArea xSpCommArea = { .xFormat = 1, }; +#define ALPACA_INIT(number) \ +{ \ + .lppaca_ptr = &lppaca[number], \ + .reg_save_ptr = &iseries_reg_save[number], \ +} + +struct alpaca alpaca[] = { + ALPACA_INIT( 0), +#if NR_CPUS > 1 + ALPACA_INIT( 1), ALPACA_INIT( 2), ALPACA_INIT( 3), +#if NR_CPUS > 4 + ALPACA_INIT( 4), ALPACA_INIT( 5), ALPACA_INIT( 6), ALPACA_INIT( 7), +#if NR_CPUS > 8 + ALPACA_INIT( 8), ALPACA_INIT( 9), ALPACA_INIT(10), ALPACA_INIT(11), + ALPACA_INIT(12), ALPACA_INIT(13), ALPACA_INIT(14), ALPACA_INIT(15), + ALPACA_INIT(16), ALPACA_INIT(17), ALPACA_INIT(18), ALPACA_INIT(19), + ALPACA_INIT(20), ALPACA_INIT(21), ALPACA_INIT(22), ALPACA_INIT(23), + ALPACA_INIT(24), ALPACA_INIT(25), ALPACA_INIT(26), ALPACA_INIT(27), + ALPACA_INIT(28), ALPACA_INIT(29), ALPACA_INIT(30), ALPACA_INIT(31), +#if NR_CPUS > 32 + ALPACA_INIT(32), ALPACA_INIT(33), ALPACA_INIT(34), ALPACA_INIT(35), + ALPACA_INIT(36), ALPACA_INIT(37), ALPACA_INIT(38), ALPACA_INIT(39), + ALPACA_INIT(40), ALPACA_INIT(41), ALPACA_INIT(42), ALPACA_INIT(43), + ALPACA_INIT(44), ALPACA_INIT(45), ALPACA_INIT(46), ALPACA_INIT(47), + ALPACA_INIT(48), ALPACA_INIT(49), ALPACA_INIT(50), ALPACA_INIT(51), + ALPACA_INIT(52), ALPACA_INIT(53), ALPACA_INIT(54), ALPACA_INIT(55), + ALPACA_INIT(56), ALPACA_INIT(57), ALPACA_INIT(58), ALPACA_INIT(59), + ALPACA_INIT(60), ALPACA_INIT(61), ALPACA_INIT(62), ALPACA_INIT(63), +#endif +#endif +#endif +#endif +}; + /* The LparMap data is now located at offset 0x6000 in head.S * It was put there so that the HvReleaseData could address it * with a 32-bit offset as required by the iSeries hypervisor @@ -185,7 +220,7 @@ struct ItVpdAreas itVpdAreas = { .xSlicVpdLens = { /* VPD lengths */ 0,0,0, /* 0 - 2 */ sizeof(xItExtVpdPanel), /* 3 Extended VPD */ - sizeof(struct paca_struct), /* 4 length of Paca */ + sizeof(struct alpaca), /* 4 length of (fake) Paca */ 0, /* 5 */ sizeof(struct ItIplParmsReal),/* 6 length of IPL parms */ 26992, /* 7 length of MS VPD */ @@ -203,7 +238,7 @@ struct ItVpdAreas itVpdAreas = { .xSlicVpdAdrs = { /* VPD addresses */ 0,0,0, /* 0 - 2 */ &xItExtVpdPanel, /* 3 Extended VPD */ - &paca[0], /* 4 first Paca */ + &alpaca[0], /* 4 first (fake) Paca */ 0, /* 5 */ &xItIplParmsReal, /* 6 IPL parms */ &xMsVpd, /* 7 MS Vpd */ diff --git a/include/asm-powerpc/iseries/alpaca.h b/include/asm-powerpc/iseries/alpaca.h new file mode 100644 index 000000000000..26fc081cb849 --- /dev/null +++ b/include/asm-powerpc/iseries/alpaca.h @@ -0,0 +1,31 @@ +/* + * Copyright © 2008 Stephen Rothwell IBM Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _ASM_POWERPC_ISERIES_ALPACA_H +#define _ASM_POWERPC_ISERIES_ALPACA_H + +/* + * This is the part of the paca that the iSeries hypervisor + * needs to be statically initialised. Immediately after boot + * we switch to the normal Linux paca. + */ +struct alpaca { + struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ + void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ +}; + +#endif /* _ASM_POWERPC_ISERIES_ALPACA_H */ -- cgit v1.2.3 From 30ff2e87ed55e83b4eb436f5f14a7e49ff81ad99 Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Thu, 10 Apr 2008 16:43:47 +1000 Subject: [POWERPC] iSeries: Make iseries_reg_save private to iSeries Now that we have the alpaca, the reg_save_ptr is no longer needed in the paca. Eradicate all global uses of it and make it static in the iSeries lpardata.c Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/paca.c | 33 +++-------- arch/powerpc/platforms/iseries/lpardata.c | 72 ++++++++++++++++++++--- arch/powerpc/xmon/xmon.c | 11 ---- include/asm-powerpc/iseries/it_lp_reg_save.h | 85 ---------------------------- include/asm-powerpc/paca.h | 12 +--- 5 files changed, 73 insertions(+), 140 deletions(-) delete mode 100644 include/asm-powerpc/iseries/it_lp_reg_save.h (limited to 'include') diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index 55f1a25085cd..867b22d17385 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include @@ -25,13 +24,13 @@ extern unsigned long __toc_start; /* - * iSeries structure which the hypervisor knows about - this structure + * The structure which the hypervisor knows about - this structure * should not cross a page boundary. The vpa_init/register_vpa call * is now known to fail if the lppaca structure crosses a page - * boundary. The lppaca is also used on POWER5 pSeries boxes. The - * lppaca is 640 bytes long, and cannot readily change since the - * hypervisor knows its layout, so a 1kB alignment will suffice to - * ensure that it doesn't cross a page boundary. + * boundary. The lppaca is also used on legacy iSeries and POWER5 + * pSeries boxes. The lppaca is 640 bytes long, and cannot readily + * change since the hypervisor knows its layout, so a 1kB alignment + * will suffice to ensure that it doesn't cross a page boundary. */ struct lppaca lppaca[] = { [0 ... (NR_CPUS-1)] = { @@ -66,32 +65,16 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = { * processors. The processor VPD array needs one entry per physical * processor (not thread). */ -#define PACA_INIT_COMMON(number) \ +#define PACA_INIT(number) \ +{ \ .lppaca_ptr = &lppaca[number], \ .lock_token = 0x8000, \ .paca_index = (number), /* Paca Index */ \ .kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \ .hw_cpu_id = 0xffff, \ - .slb_shadow_ptr = &slb_shadow[number], - -#ifdef CONFIG_PPC_ISERIES -#define PACA_INIT_ISERIES(number) \ - .reg_save_ptr = &iseries_reg_save[number], - -#define PACA_INIT(number) \ -{ \ - PACA_INIT_COMMON(number) \ - PACA_INIT_ISERIES(number) \ + .slb_shadow_ptr = &slb_shadow[number], \ } -#else -#define PACA_INIT(number) \ -{ \ - PACA_INIT_COMMON(number) \ -} - -#endif - struct paca_struct paca[] = { PACA_INIT(0), #if NR_CPUS > 1 diff --git a/arch/powerpc/platforms/iseries/lpardata.c b/arch/powerpc/platforms/iseries/lpardata.c index dc8470850a81..2331d97e49f3 100644 --- a/arch/powerpc/platforms/iseries/lpardata.c +++ b/arch/powerpc/platforms/iseries/lpardata.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -62,6 +61,63 @@ struct naca_struct naca = { .xRamDiskSize = 0, }; +struct ItLpRegSave { + u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003 + u16 xSize; // Size of this class 004-005 + u8 xInUse; // Area is live 006-007 + u8 xRsvd1[9]; // Reserved 007-00F + + u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F + u32 xCTRL; // Control Register 170-173 + u32 xDEC; // Decrementer 174-177 + u32 xFPSCR; // FP Status and Control Reg 178-17B + u32 xPVR; // Processor Version Number 17C-17F + + u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 + u32 xPMC1; // Perf Monitor Counter 1 188-18B + u32 xPMC2; // Perf Monitor Counter 2 18C-18F + u32 xPMC3; // Perf Monitor Counter 3 190-193 + u32 xPMC4; // Perf Monitor Counter 4 194-197 + u32 xPIR; // Processor ID Reg 198-19B + + u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F + u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3 + u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7 + u32 xPMC6; // Perf Monitor Counter 6 1A8-1AB + u32 xPMC7; // Perf Monitor Counter 7 1AC-1AF + u32 xPMC8; // Perf Monitor Counter 8 1B0-1B3 + u32 xTSC; // Thread Switch Control 1B4-1B7 + u32 xTST; // Thread Switch Timeout 1B8-1BB + u32 xRsvd; // Reserved 1BC-1BF + + u64 xACCR; // Address Compare Control Reg 1C0-1C7 + u64 xIMR; // Instruction Match Register 1C8-1CF + u64 xSDR1; // Storage Description Reg 1 1D0-1D7 + u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF + u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 + u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF + u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 + u64 xTB; // Time Base Register 1F8-1FF + + u64 xFPR[32]; // Floating Point Registers 200-2FF + + u64 xMSR; // Machine State Register 300-307 + u64 xNIA; // Next Instruction Address 308-30F + + u64 xDABR; // Data Address Breakpoint Reg 310-317 + u64 xIABR; // Inst Address Breakpoint Reg 318-31F + + u64 xHID0; // HW Implementation Dependent0 320-327 + + u64 xHID4; // HW Implementation Dependent4 328-32F + u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337 + u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F + u64 xSDAR; // Sample Data Address Register 340-347 + u64 xSIAR; // Sample Inst Address Register 348-34F + + u8 xRsvd3[176]; // Reserved 350-3FF +}; + extern void system_reset_iSeries(void); extern void machine_check_iSeries(void); extern void data_access_iSeries(void); @@ -160,6 +216,13 @@ struct SpCommArea xSpCommArea = { .xFormat = 1, }; +static struct ItLpRegSave iseries_reg_save[] = { + [0 ... (NR_CPUS-1)] = { + .xDesc = 0xd397d9e2, /* "LpRS" */ + .xSize = sizeof(struct ItLpRegSave), + }, +}; + #define ALPACA_INIT(number) \ { \ .lppaca_ptr = &lppaca[number], \ @@ -254,10 +317,3 @@ struct ItVpdAreas itVpdAreas = { 0,0 } }; - -struct ItLpRegSave iseries_reg_save[] = { - [0 ... (NR_CPUS-1)] = { - .xDesc = 0xd397d9e2, /* "LpRS" */ - .xSize = sizeof(struct ItLpRegSave), - }, -}; diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index a34172ddc468..00fd7647f807 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -45,7 +45,6 @@ #ifdef CONFIG_PPC64 #include #include -#include #endif #include "nonstdio.h" @@ -1598,7 +1597,6 @@ void super_regs(void) if (firmware_has_feature(FW_FEATURE_ISERIES)) { struct paca_struct *ptrPaca; struct lppaca *ptrLpPaca; - struct ItLpRegSave *ptrLpRegSave; /* Dump out relevant Paca data areas. */ printf("Paca: \n"); @@ -1611,15 +1609,6 @@ void super_regs(void) printf(" Saved Gpr3=%.16lx Saved Gpr4=%.16lx \n", ptrLpPaca->saved_gpr3, ptrLpPaca->saved_gpr4); printf(" Saved Gpr5=%.16lx \n", ptrLpPaca->saved_gpr5); - - printf(" Local Processor Register Save Area (LpRegSave): \n"); - ptrLpRegSave = ptrPaca->reg_save_ptr; - printf(" Saved Sprg0=%.16lx Saved Sprg1=%.16lx \n", - ptrLpRegSave->xSPRG0, ptrLpRegSave->xSPRG0); - printf(" Saved Sprg2=%.16lx Saved Sprg3=%.16lx \n", - ptrLpRegSave->xSPRG2, ptrLpRegSave->xSPRG3); - printf(" Saved Msr =%.16lx Saved Nia =%.16lx \n", - ptrLpRegSave->xMSR, ptrLpRegSave->xNIA); } #endif diff --git a/include/asm-powerpc/iseries/it_lp_reg_save.h b/include/asm-powerpc/iseries/it_lp_reg_save.h deleted file mode 100644 index 5403b756f654..000000000000 --- a/include/asm-powerpc/iseries/it_lp_reg_save.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H -#define _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H - -/* - * This control block contains the data that is shared between PLIC - * and the OS - */ - -struct ItLpRegSave { - u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003 - u16 xSize; // Size of this class 004-005 - u8 xInUse; // Area is live 006-007 - u8 xRsvd1[9]; // Reserved 007-00F - - u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F - u32 xCTRL; // Control Register 170-173 - u32 xDEC; // Decrementer 174-177 - u32 xFPSCR; // FP Status and Control Reg 178-17B - u32 xPVR; // Processor Version Number 17C-17F - - u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 - u32 xPMC1; // Perf Monitor Counter 1 188-18B - u32 xPMC2; // Perf Monitor Counter 2 18C-18F - u32 xPMC3; // Perf Monitor Counter 3 190-193 - u32 xPMC4; // Perf Monitor Counter 4 194-197 - u32 xPIR; // Processor ID Reg 198-19B - - u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F - u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3 - u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7 - u32 xPMC6; // Perf Monitor Counter 6 1A8-1AB - u32 xPMC7; // Perf Monitor Counter 7 1AC-1AF - u32 xPMC8; // Perf Monitor Counter 8 1B0-1B3 - u32 xTSC; // Thread Switch Control 1B4-1B7 - u32 xTST; // Thread Switch Timeout 1B8-1BB - u32 xRsvd; // Reserved 1BC-1BF - - u64 xACCR; // Address Compare Control Reg 1C0-1C7 - u64 xIMR; // Instruction Match Register 1C8-1CF - u64 xSDR1; // Storage Description Reg 1 1D0-1D7 - u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF - u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 - u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF - u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 - u64 xTB; // Time Base Register 1F8-1FF - - u64 xFPR[32]; // Floating Point Registers 200-2FF - - u64 xMSR; // Machine State Register 300-307 - u64 xNIA; // Next Instruction Address 308-30F - - u64 xDABR; // Data Address Breakpoint Reg 310-317 - u64 xIABR; // Inst Address Breakpoint Reg 318-31F - - u64 xHID0; // HW Implementation Dependent0 320-327 - - u64 xHID4; // HW Implementation Dependent4 328-32F - u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337 - u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F - u64 xSDAR; // Sample Data Address Register 340-347 - u64 xSIAR; // Sample Inst Address Register 348-34F - - u8 xRsvd3[176]; // Reserved 350-3FF -}; - -extern struct ItLpRegSave iseries_reg_save[]; - -#endif /* _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H */ diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h index 748b35ab37b5..eb61b9c1edfd 100644 --- a/include/asm-powerpc/paca.h +++ b/include/asm-powerpc/paca.h @@ -42,10 +42,7 @@ struct task_struct; * Defines the layout of the paca. * * This structure is not directly accessed by firmware or the service - * processor except for the first two pointers that point to the - * lppaca area and the ItLpRegSave area for this CPU. The lppaca - * object is currently contained within the PACA but it doesn't need - * to be. + * processor. */ struct paca_struct { /* @@ -55,14 +52,7 @@ struct paca_struct { * avoid cacheline bouncing. */ - /* - * MAGIC: These first two pointers can't be moved - they're - * accessed by the firmware - */ struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ -#ifdef CONFIG_PPC_ISERIES - void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ -#endif /* CONFIG_PPC_ISERIES */ /* * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c -- cgit v1.2.3 From f9a5e6a27d2aa1b37758abb031f37615ac367cca Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Thu, 10 Apr 2008 16:44:30 +1000 Subject: [POWERPC] iSeries: Localise and constify some iSeries data Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/iseries/ipl_parms.h | 2 -- arch/powerpc/platforms/iseries/lpardata.c | 14 +++++++------- arch/powerpc/platforms/iseries/naca.h | 2 +- arch/powerpc/platforms/iseries/release_data.h | 2 +- arch/powerpc/platforms/iseries/spcomm_area.h | 2 -- arch/powerpc/platforms/iseries/vpd_areas.h | 4 ++-- include/asm-powerpc/iseries/alpaca.h | 2 +- 7 files changed, 12 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/arch/powerpc/platforms/iseries/ipl_parms.h b/arch/powerpc/platforms/iseries/ipl_parms.h index 77c135ddbf1b..83e4ca42fc57 100644 --- a/arch/powerpc/platforms/iseries/ipl_parms.h +++ b/arch/powerpc/platforms/iseries/ipl_parms.h @@ -65,6 +65,4 @@ struct ItIplParmsReal { u64 xRsvd13; // Reserved x38-x3F }; -extern struct ItIplParmsReal xItIplParmsReal; - #endif /* _ISERIES_IPL_PARMS_H */ diff --git a/arch/powerpc/platforms/iseries/lpardata.c b/arch/powerpc/platforms/iseries/lpardata.c index 2331d97e49f3..98bd2d37038a 100644 --- a/arch/powerpc/platforms/iseries/lpardata.c +++ b/arch/powerpc/platforms/iseries/lpardata.c @@ -31,7 +31,7 @@ /* The HvReleaseData is the root of the information shared between * the hypervisor and Linux. */ -struct HvReleaseData hvReleaseData = { +const struct HvReleaseData hvReleaseData = { .xDesc = 0xc8a5d9c4, /* "HvRD" ebcdic */ .xSize = sizeof(struct HvReleaseData), .xVpdAreasPtrOffset = offsetof(struct naca_struct, xItVpdAreas), @@ -186,7 +186,7 @@ struct ItLpNaca itLpNaca = { }; /* May be filled in by the hypervisor so cannot end up in the BSS */ -struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data"))); +static struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data"))); /* May be filled in by the hypervisor so cannot end up in the BSS */ struct ItExtVpdPanel xItExtVpdPanel __attribute__((__section__(".data"))); @@ -209,14 +209,14 @@ u64 xMsVpd[3400] __attribute__((__section__(".data"))); /* Space for Recovery Log Buffer */ /* May be filled in by the hypervisor so cannot end up in the BSS */ -u64 xRecoveryLogBuffer[32] __attribute__((__section__(".data"))); +static u64 xRecoveryLogBuffer[32] __attribute__((__section__(".data"))); -struct SpCommArea xSpCommArea = { +static const struct SpCommArea xSpCommArea = { .xDesc = 0xE2D7C3C2, .xFormat = 1, }; -static struct ItLpRegSave iseries_reg_save[] = { +static const struct ItLpRegSave iseries_reg_save[] = { [0 ... (NR_CPUS-1)] = { .xDesc = 0xd397d9e2, /* "LpRS" */ .xSize = sizeof(struct ItLpRegSave), @@ -229,7 +229,7 @@ static struct ItLpRegSave iseries_reg_save[] = { .reg_save_ptr = &iseries_reg_save[number], \ } -struct alpaca alpaca[] = { +const struct alpaca alpaca[] = { ALPACA_INIT( 0), #if NR_CPUS > 1 ALPACA_INIT( 1), ALPACA_INIT( 2), ALPACA_INIT( 3), @@ -265,7 +265,7 @@ struct alpaca alpaca[] = { * the Naca via the HvReleaseData area. The HvReleaseData has the * offset into the Naca of the pointer to the ItVpdAreas. */ -struct ItVpdAreas itVpdAreas = { +const struct ItVpdAreas itVpdAreas = { .xSlicDesc = 0xc9a3e5c1, /* "ItVA" */ .xSlicSize = sizeof(struct ItVpdAreas), .xSlicVpdEntries = ItVpdMaxEntries, /* # VPD array entries */ diff --git a/arch/powerpc/platforms/iseries/naca.h b/arch/powerpc/platforms/iseries/naca.h index ab2372eb8d2e..f01708e12862 100644 --- a/arch/powerpc/platforms/iseries/naca.h +++ b/arch/powerpc/platforms/iseries/naca.h @@ -14,7 +14,7 @@ struct naca_struct { /* Kernel only data - undefined for user space */ - void *xItVpdAreas; /* VPD Data 0x00 */ + const void *xItVpdAreas; /* VPD Data 0x00 */ void *xRamDisk; /* iSeries ramdisk 0x08 */ u64 xRamDiskSize; /* In pages 0x10 */ }; diff --git a/arch/powerpc/platforms/iseries/release_data.h b/arch/powerpc/platforms/iseries/release_data.h index 66189fd2e32d..6ad7d843e8fc 100644 --- a/arch/powerpc/platforms/iseries/release_data.h +++ b/arch/powerpc/platforms/iseries/release_data.h @@ -58,6 +58,6 @@ struct HvReleaseData { char xRsvd3[20]; /* Reserved x2C-x3F */ }; -extern struct HvReleaseData hvReleaseData; +extern const struct HvReleaseData hvReleaseData; #endif /* _ISERIES_RELEASE_DATA_H */ diff --git a/arch/powerpc/platforms/iseries/spcomm_area.h b/arch/powerpc/platforms/iseries/spcomm_area.h index 6e3b685115c9..598b7c14573a 100644 --- a/arch/powerpc/platforms/iseries/spcomm_area.h +++ b/arch/powerpc/platforms/iseries/spcomm_area.h @@ -31,6 +31,4 @@ struct SpCommArea { u8 xRsvd2[80]; // Reserved 030-07F }; -extern struct SpCommArea xSpCommArea; - #endif /* _ISERIES_SPCOMM_AREA_H */ diff --git a/arch/powerpc/platforms/iseries/vpd_areas.h b/arch/powerpc/platforms/iseries/vpd_areas.h index 601e6dd860ed..feb001f3a5fe 100644 --- a/arch/powerpc/platforms/iseries/vpd_areas.h +++ b/arch/powerpc/platforms/iseries/vpd_areas.h @@ -80,9 +80,9 @@ struct ItVpdAreas { u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7 u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F - void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF + const void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF }; -extern struct ItVpdAreas itVpdAreas; +extern const struct ItVpdAreas itVpdAreas; #endif /* _ISERIES_VPD_AREAS_H */ diff --git a/include/asm-powerpc/iseries/alpaca.h b/include/asm-powerpc/iseries/alpaca.h index 26fc081cb849..c0cce6727a69 100644 --- a/include/asm-powerpc/iseries/alpaca.h +++ b/include/asm-powerpc/iseries/alpaca.h @@ -25,7 +25,7 @@ */ struct alpaca { struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ - void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ + const void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ }; #endif /* _ASM_POWERPC_ISERIES_ALPACA_H */ -- cgit v1.2.3 From 98245c169af77e5c78efe381e128716aebb7d025 Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Mon, 14 Apr 2008 12:00:47 +1000 Subject: [POWERPC] remove include of asm/of_device.h from pmi.h pmi.h does not diectly reference anything in of_device.h and of the two files that include asm/pmi.h, one includes of_device.h and the other includes of_platform.h (which includes of_device.h). Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- include/asm-powerpc/pmi.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pmi.h b/include/asm-powerpc/pmi.h index 2259d4ce3846..e1dc090748df 100644 --- a/include/asm-powerpc/pmi.h +++ b/include/asm-powerpc/pmi.h @@ -29,8 +29,6 @@ #ifdef __KERNEL__ -#include - #define PMI_TYPE_FREQ_CHANGE 0x01 #define PMI_READ_TYPE 0 #define PMI_READ_DATA0 1 -- cgit v1.2.3 From 4b1d99b37f608b8cc03550033b16212ca9362efd Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Mon, 14 Apr 2008 12:08:47 +1000 Subject: [POWERPC] replace asm/of_device.h with linux/of_device.h in macio.h Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- include/asm-powerpc/macio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/macio.h b/include/asm-powerpc/macio.h index 3a6cb1a513b7..079c06eae446 100644 --- a/include/asm-powerpc/macio.h +++ b/include/asm-powerpc/macio.h @@ -2,7 +2,7 @@ #define __MACIO_ASIC_H__ #ifdef __KERNEL__ -#include +#include extern struct bus_type macio_bus_type; -- cgit v1.2.3 From c50f68c8aea421267ba7995b1c485c281b28add6 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 24 Mar 2008 20:50:48 +1100 Subject: [LMB] Add lmb_alloc_nid() A variant of lmb_alloc() that tries to allocate memory on a specified NUMA node 'nid' but falls back to normal lmb_alloc() if that fails. The caller provides a 'nid_range' function pointer which assists the allocator. It is given args 'start', 'end', and pointer to integer 'this_nid'. It places at 'this_nid' the NUMA node id that corresponds to 'start', and returns the end address within 'start' to 'end' at which memory assosciated with 'nid' ends. This callback allows a platform to use lmb_alloc_nid() in just about any context, even ones in which early_pfn_to_nid() might not be working yet. This function will be used by the NUMA setup code on sparc64, and also it can be used by powerpc, replacing it's hand crafted "careful_allocation()" function in arch/powerpc/mm/numa.c If x86 ever converts it's NUMA support over to using the LMB helpers, it can use this too as it has something entirely similar. Signed-off-by: David S. Miller Signed-off-by: Paul Mackerras --- include/linux/lmb.h | 2 ++ lib/lmb.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++------- 2 files changed, 78 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/linux/lmb.h b/include/linux/lmb.h index 632717c6a2ba..271153d27fba 100644 --- a/include/linux/lmb.h +++ b/include/linux/lmb.h @@ -42,6 +42,8 @@ extern void __init lmb_init(void); extern void __init lmb_analyze(void); extern long __init lmb_add(u64 base, u64 size); extern long __init lmb_reserve(u64 base, u64 size); +extern u64 __init lmb_alloc_nid(u64 size, u64 align, int nid, + u64 (*nid_range)(u64, u64, int *)); extern u64 __init lmb_alloc(u64 size, u64 align); extern u64 __init lmb_alloc_base(u64 size, u64, u64 max_addr); diff --git a/lib/lmb.c b/lib/lmb.c index 3c43b95fef4a..549fbb3d70cf 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -232,6 +232,82 @@ long __init lmb_overlaps_region(struct lmb_region *rgn, u64 base, return (i < rgn->cnt) ? i : -1; } +static u64 lmb_align_down(u64 addr, u64 size) +{ + return addr & ~(size - 1); +} + +static u64 lmb_align_up(u64 addr, u64 size) +{ + return (addr + (size - 1)) & ~(size - 1); +} + +static u64 __init lmb_alloc_nid_unreserved(u64 start, u64 end, + u64 size, u64 align) +{ + u64 base; + long j; + + base = lmb_align_down((end - size), align); + while (start <= base && + ((j = lmb_overlaps_region(&lmb.reserved, base, size)) >= 0)) + base = lmb_align_down(lmb.reserved.region[j].base - size, + align); + + if (base != 0 && start <= base) { + if (lmb_add_region(&lmb.reserved, base, + lmb_align_up(size, align)) < 0) + base = ~(u64)0; + return base; + } + + return ~(u64)0; +} + +static u64 __init lmb_alloc_nid_region(struct lmb_property *mp, + u64 (*nid_range)(u64, u64, int *), + u64 size, u64 align, int nid) +{ + u64 start, end; + + start = mp->base; + end = start + mp->size; + + start = lmb_align_up(start, align); + while (start < end) { + u64 this_end; + int this_nid; + + this_end = nid_range(start, end, &this_nid); + if (this_nid == nid) { + u64 ret = lmb_alloc_nid_unreserved(start, this_end, + size, align); + if (ret != ~(u64)0) + return ret; + } + start = this_end; + } + + return ~(u64)0; +} + +u64 __init lmb_alloc_nid(u64 size, u64 align, int nid, + u64 (*nid_range)(u64 start, u64 end, int *nid)) +{ + struct lmb_region *mem = &lmb.memory; + int i; + + for (i = 0; i < mem->cnt; i++) { + u64 ret = lmb_alloc_nid_region(&mem->region[i], + nid_range, + size, align, nid); + if (ret != ~(u64)0) + return ret; + } + + return lmb_alloc(size, align); +} + u64 __init lmb_alloc(u64 size, u64 align) { return lmb_alloc_base(size, align, LMB_ALLOC_ANYWHERE); @@ -250,16 +326,6 @@ u64 __init lmb_alloc_base(u64 size, u64 align, u64 max_addr) return alloc; } -static u64 lmb_align_down(u64 addr, u64 size) -{ - return addr & ~(size - 1); -} - -static u64 lmb_align_up(u64 addr, u64 size) -{ - return (addr + (size - 1)) & ~(size - 1); -} - u64 __init __lmb_alloc_base(u64 size, u64 align, u64 max_addr) { long i, j; -- cgit v1.2.3 From 863fbf4966a7ac301a4077e4a04d73e8abfdd7b2 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 11 Apr 2008 23:06:45 +1000 Subject: [POWERPC] OF helpers for the GPIO API This implements various helpers to support OF bindings for the GPIO LIB API. Previously this was PowerPC specific, but it seems this code isn't arch-dependent anyhow, so let's place it into of/. SPARC will not see this addition yet, real hardware seem to not use GPIOs at all. But this might change: http://www.leox.org/docs/faq_MLleon.html "16-bit I/O port" sounds promising. :-) Signed-off-by: Anton Vorontsov Acked-by: Grant Likely Signed-off-by: Paul Mackerras --- drivers/of/Kconfig | 6 ++ drivers/of/Makefile | 1 + drivers/of/gpio.c | 242 ++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/of_gpio.h | 69 ++++++++++++++ 4 files changed, 318 insertions(+) create mode 100644 drivers/of/gpio.c create mode 100644 include/linux/of_gpio.h (limited to 'include') diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index c03072b12f42..3354ad766a49 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -1,3 +1,9 @@ config OF_DEVICE def_bool y depends on OF && (SPARC || PPC_OF) + +config OF_GPIO + def_bool y + depends on OF && PPC_OF && HAVE_GPIO_LIB + help + OpenFirmware GPIO accessors diff --git a/drivers/of/Makefile b/drivers/of/Makefile index ab9be5d5255b..5a61f70b4027 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -1,2 +1,3 @@ obj-y = base.o obj-$(CONFIG_OF_DEVICE) += device.o platform.o +obj-$(CONFIG_OF_GPIO) += gpio.o diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c new file mode 100644 index 000000000000..000681e98f2c --- /dev/null +++ b/drivers/of/gpio.c @@ -0,0 +1,242 @@ +/* + * OF helpers for the GPIO API + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +/** + * of_get_gpio - Get a GPIO number from the device tree to use with GPIO API + * @np: device node to get GPIO from + * @index: index of the GPIO + * + * Returns GPIO number to use with Linux generic GPIO API, or one of the errno + * value on the error condition. + */ +int of_get_gpio(struct device_node *np, int index) +{ + int ret = -EINVAL; + struct device_node *gc; + struct of_gpio_chip *of_gc = NULL; + int size; + const u32 *gpios; + u32 nr_cells; + int i; + const void *gpio_spec; + const u32 *gpio_cells; + int gpio_index = 0; + + gpios = of_get_property(np, "gpios", &size); + if (!gpios) { + ret = -ENOENT; + goto err0; + } + nr_cells = size / sizeof(u32); + + for (i = 0; i < nr_cells; gpio_index++) { + const phandle *gpio_phandle; + + gpio_phandle = gpios + i; + gpio_spec = gpio_phandle + 1; + + /* one cell hole in the gpios = <>; */ + if (!*gpio_phandle) { + if (gpio_index == index) + return -ENOENT; + i++; + continue; + } + + gc = of_find_node_by_phandle(*gpio_phandle); + if (!gc) { + pr_debug("%s: could not find phandle for gpios\n", + np->full_name); + goto err0; + } + + of_gc = gc->data; + if (!of_gc) { + pr_debug("%s: gpio controller %s isn't registered\n", + np->full_name, gc->full_name); + goto err1; + } + + gpio_cells = of_get_property(gc, "#gpio-cells", &size); + if (!gpio_cells || size != sizeof(*gpio_cells) || + *gpio_cells != of_gc->gpio_cells) { + pr_debug("%s: wrong #gpio-cells for %s\n", + np->full_name, gc->full_name); + goto err1; + } + + /* Next phandle is at phandle cells + #gpio-cells */ + i += sizeof(*gpio_phandle) / sizeof(u32) + *gpio_cells; + if (i >= nr_cells + 1) { + pr_debug("%s: insufficient gpio-spec length\n", + np->full_name); + goto err1; + } + + if (gpio_index == index) + break; + + of_gc = NULL; + of_node_put(gc); + } + + if (!of_gc) { + ret = -ENOENT; + goto err0; + } + + ret = of_gc->xlate(of_gc, np, gpio_spec); + if (ret < 0) + goto err1; + + ret += of_gc->gc.base; +err1: + of_node_put(gc); +err0: + pr_debug("%s exited with status %d\n", __func__, ret); + return ret; +} +EXPORT_SYMBOL(of_get_gpio); + +/** + * of_gpio_simple_xlate - translate gpio_spec to the GPIO number + * @of_gc: pointer to the of_gpio_chip structure + * @np: device node of the GPIO chip + * @gpio_spec: gpio specifier as found in the device tree + * + * This is simple translation function, suitable for the most 1:1 mapped + * gpio chips. This function performs only one sanity check: whether gpio + * is less than ngpios (that is specified in the gpio_chip). + */ +int of_gpio_simple_xlate(struct of_gpio_chip *of_gc, struct device_node *np, + const void *gpio_spec) +{ + const u32 *gpio = gpio_spec; + + if (*gpio > of_gc->gc.ngpio) + return -EINVAL; + + return *gpio; +} +EXPORT_SYMBOL(of_gpio_simple_xlate); + +/* Should be sufficient for now, later we'll use dynamic bases. */ +#if defined(CONFIG_PPC32) || defined(CONFIG_SPARC32) +#define GPIOS_PER_CHIP 32 +#else +#define GPIOS_PER_CHIP 64 +#endif + +static int of_get_gpiochip_base(struct device_node *np) +{ + struct device_node *gc = NULL; + int gpiochip_base = 0; + + while ((gc = of_find_all_nodes(gc))) { + if (!of_get_property(gc, "gpio-controller", NULL)) + continue; + + if (gc != np) { + gpiochip_base += GPIOS_PER_CHIP; + continue; + } + + of_node_put(gc); + + if (gpiochip_base >= ARCH_NR_GPIOS) + return -ENOSPC; + + return gpiochip_base; + } + + return -ENOENT; +} + +/** + * of_mm_gpiochip_add - Add memory mapped GPIO chip (bank) + * @np: device node of the GPIO chip + * @mm_gc: pointer to the of_mm_gpio_chip allocated structure + * + * To use this function you should allocate and fill mm_gc with: + * + * 1) In the gpio_chip structure: + * - all the callbacks + * + * 2) In the of_gpio_chip structure: + * - gpio_cells + * - xlate callback (optional) + * + * 3) In the of_mm_gpio_chip structure: + * - save_regs callback (optional) + * + * If succeeded, this function will map bank's memory and will + * do all necessary work for you. Then you'll able to use .regs + * to manage GPIOs from the callbacks. + */ +int of_mm_gpiochip_add(struct device_node *np, + struct of_mm_gpio_chip *mm_gc) +{ + int ret = -ENOMEM; + struct of_gpio_chip *of_gc = &mm_gc->of_gc; + struct gpio_chip *gc = &of_gc->gc; + + gc->label = kstrdup(np->full_name, GFP_KERNEL); + if (!gc->label) + goto err0; + + mm_gc->regs = of_iomap(np, 0); + if (!mm_gc->regs) + goto err1; + + gc->base = of_get_gpiochip_base(np); + if (gc->base < 0) { + ret = gc->base; + goto err1; + } + + if (!of_gc->xlate) + of_gc->xlate = of_gpio_simple_xlate; + + if (mm_gc->save_regs) + mm_gc->save_regs(mm_gc); + + np->data = of_gc; + + ret = gpiochip_add(gc); + if (ret) + goto err2; + + /* We don't want to lose the node and its ->data */ + of_node_get(np); + + pr_debug("%s: registered as generic GPIO chip, base is %d\n", + np->full_name, gc->base); + return 0; +err2: + np->data = NULL; + iounmap(mm_gc->regs); +err1: + kfree(gc->label); +err0: + pr_err("%s: GPIO chip registration failed with status %d\n", + np->full_name, ret); + return ret; +} +EXPORT_SYMBOL(of_mm_gpiochip_add); diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h new file mode 100644 index 000000000000..2ee97e9877a7 --- /dev/null +++ b/include/linux/of_gpio.h @@ -0,0 +1,69 @@ +/* + * OF helpers for the GPIO API + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __LINUX_OF_GPIO_H +#define __LINUX_OF_GPIO_H + +#include +#include + +#ifdef CONFIG_OF_GPIO + +/* + * Generic OF GPIO chip + */ +struct of_gpio_chip { + struct gpio_chip gc; + int gpio_cells; + int (*xlate)(struct of_gpio_chip *of_gc, struct device_node *np, + const void *gpio_spec); +}; + +static inline struct of_gpio_chip *to_of_gpio_chip(struct gpio_chip *gc) +{ + return container_of(gc, struct of_gpio_chip, gc); +} + +/* + * OF GPIO chip for memory mapped banks + */ +struct of_mm_gpio_chip { + struct of_gpio_chip of_gc; + void (*save_regs)(struct of_mm_gpio_chip *mm_gc); + void __iomem *regs; +}; + +static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc) +{ + struct of_gpio_chip *of_gc = to_of_gpio_chip(gc); + + return container_of(of_gc, struct of_mm_gpio_chip, of_gc); +} + +extern int of_get_gpio(struct device_node *np, int index); +extern int of_mm_gpiochip_add(struct device_node *np, + struct of_mm_gpio_chip *mm_gc); +extern int of_gpio_simple_xlate(struct of_gpio_chip *of_gc, + struct device_node *np, + const void *gpio_spec); +#else + +/* Drivers may not strictly depend on the GPIO support, so let them link. */ +static inline int of_get_gpio(struct device_node *np, int index) +{ + return -ENOSYS; +} + +#endif /* CONFIG_OF_GPIO */ + +#endif /* __LINUX_OF_GPIO_H */ -- cgit v1.2.3 From b7ce341585a51a6d65c7a77b6918132a3b360b81 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 11 Apr 2008 23:06:36 +1000 Subject: [POWERPC] Implement support for the GPIO LIB API This implements support for the GPIO LIB API. Two calls are still unimplemented though: irq_to_gpio and gpio_to_irq. Signed-off-by: Anton Vorontsov Acked-by: Grant Likely Signed-off-by: Paul Mackerras --- Documentation/powerpc/booting-without-of.txt | 52 ++++++++++++++++++++++++++ arch/powerpc/Kconfig | 5 +++ include/asm-powerpc/gpio.h | 56 ++++++++++++++++++++++++++++ 3 files changed, 113 insertions(+) create mode 100644 include/asm-powerpc/gpio.h (limited to 'include') diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 2aafda9254f0..528b4822f451 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -88,6 +88,10 @@ Table of Contents 3) OpenPIC Interrupt Controllers 4) ISA Interrupt Controllers + VIII - Specifying GPIO information for devices + 1) gpios property + 2) gpio-controller nodes + Appendix A - Sample SOC node for MPC8540 @@ -3431,6 +3435,54 @@ encodings listed below: 2 = high to low edge sensitive type enabled 3 = low to high edge sensitive type enabled +VIII - Specifying GPIO information for devices +============================================== + +1) gpios property +----------------- + +Nodes that makes use of GPIOs should define them using `gpios' property, +format of which is: <&gpio-controller1-phandle gpio1-specifier + &gpio-controller2-phandle gpio2-specifier + 0 /* holes are permitted, means no GPIO 3 */ + &gpio-controller4-phandle gpio4-specifier + ...>; + +Note that gpio-specifier length is controller dependent. + +gpio-specifier may encode: bank, pin position inside the bank, +whether pin is open-drain and whether pin is logically inverted. + +Example of the node using GPIOs: + + node { + gpios = <&qe_pio_e 18 0>; + }; + +In this example gpio-specifier is "18 0" and encodes GPIO pin number, +and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller. + +2) gpio-controller nodes +------------------------ + +Every GPIO controller node must have #gpio-cells property defined, +this information will be used to translate gpio-specifiers. + +Example of two SOC GPIO banks defined as gpio-controller nodes: + + qe_pio_a: gpio-controller@1400 { + #gpio-cells = <2>; + compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank"; + reg = <0x1400 0x18>; + gpio-controller; + }; + + qe_pio_e: gpio-controller@1460 { + #gpio-cells = <2>; + compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; + reg = <0x1460 0x18>; + gpio-controller; + }; Appendix A - Sample SOC node for MPC8540 ======================================== diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 1d4d19f6d6e1..c51b6bba5fce 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -81,6 +81,11 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_GPIO + bool + help + Generic GPIO API support + config ARCH_NO_VIRT_TO_BUS def_bool PPC64 diff --git a/include/asm-powerpc/gpio.h b/include/asm-powerpc/gpio.h new file mode 100644 index 000000000000..77ad3a890f30 --- /dev/null +++ b/include/asm-powerpc/gpio.h @@ -0,0 +1,56 @@ +/* + * Generic GPIO API implementation for PowerPC. + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __ASM_POWERPC_GPIO_H +#define __ASM_POWERPC_GPIO_H + +#include +#include + +#ifdef CONFIG_HAVE_GPIO_LIB + +/* + * We don't (yet) implement inlined/rapid versions for on-chip gpios. + * Just call gpiolib. + */ +static inline int gpio_get_value(unsigned int gpio) +{ + return __gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned int gpio, int value) +{ + __gpio_set_value(gpio, value); +} + +static inline int gpio_cansleep(unsigned int gpio) +{ + return __gpio_cansleep(gpio); +} + +/* + * Not implemented, yet. + */ +static inline int gpio_to_irq(unsigned int gpio) +{ + return -ENOSYS; +} + +static inline int irq_to_gpio(unsigned int irq) +{ + return -EINVAL; +} + +#endif /* CONFIG_HAVE_GPIO_LIB */ + +#endif /* __ASM_POWERPC_GPIO_H */ -- cgit v1.2.3 From 612212a3f2f053ea68ce9cd16d3deeca7754e8c9 Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Sat, 12 Apr 2008 05:22:35 +1000 Subject: [POWERPC] i2c: OF helpers for the i2c API This implements various helpers to support OF bindings for the i2c API. Signed-off-by: Jochen Friedrich Acked-by: David S. Miller Acked-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- drivers/of/Kconfig | 6 +++ drivers/of/Makefile | 1 + drivers/of/i2c.c | 115 +++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/of_i2c.h | 24 +++++++++++ 4 files changed, 146 insertions(+) create mode 100644 drivers/of/i2c.c create mode 100644 include/linux/of_i2c.h (limited to 'include') diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index 3354ad766a49..7c305317f372 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -7,3 +7,9 @@ config OF_GPIO depends on OF && PPC_OF && HAVE_GPIO_LIB help OpenFirmware GPIO accessors + +config OF_I2C + def_bool y + depends on OF && I2C + help + OpenFirmware I2C accessors diff --git a/drivers/of/Makefile b/drivers/of/Makefile index 5a61f70b4027..a07b95362c53 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -1,3 +1,4 @@ obj-y = base.o obj-$(CONFIG_OF_DEVICE) += device.o platform.o obj-$(CONFIG_OF_GPIO) += gpio.o +obj-$(CONFIG_OF_I2C) += i2c.o diff --git a/drivers/of/i2c.c b/drivers/of/i2c.c new file mode 100644 index 000000000000..631689171159 --- /dev/null +++ b/drivers/of/i2c.c @@ -0,0 +1,115 @@ +/* + * OF helpers for the I2C API + * + * Copyright (c) 2008 Jochen Friedrich + * + * Based on a previous patch from Jon Smirl + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include + +struct i2c_driver_device { + char *of_device; + char *i2c_type; +}; + +static struct i2c_driver_device i2c_devices[] = { + { "dallas,ds1374", "rtc-ds1374" }, +}; + +static int of_find_i2c_driver(struct device_node *node, + struct i2c_board_info *info) +{ + int i, cplen; + const char *compatible; + const char *p; + + /* 1. search for exception list entry */ + for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) { + if (!of_device_is_compatible(node, i2c_devices[i].of_device)) + continue; + if (strlcpy(info->type, i2c_devices[i].i2c_type, + I2C_NAME_SIZE) >= I2C_NAME_SIZE) + return -ENOMEM; + + return 0; + } + + compatible = of_get_property(node, "compatible", &cplen); + if (!compatible) + return -ENODEV; + + /* 2. search for linux, entry */ + p = compatible; + while (cplen > 0) { + if (!strncmp(p, "linux,", 6)) { + p += 6; + if (strlcpy(info->type, p, + I2C_NAME_SIZE) >= I2C_NAME_SIZE) + return -ENOMEM; + return 0; + } + + i = strlen(p) + 1; + p += i; + cplen -= i; + } + + /* 3. take fist compatible entry and strip manufacturer */ + p = strchr(compatible, ','); + if (!p) + return -ENODEV; + p++; + if (strlcpy(info->type, p, I2C_NAME_SIZE) >= I2C_NAME_SIZE) + return -ENOMEM; + return 0; +} + +void of_register_i2c_devices(struct i2c_adapter *adap, + struct device_node *adap_node) +{ + void *result; + struct device_node *node; + + for_each_child_of_node(adap_node, node) { + struct i2c_board_info info = {}; + const u32 *addr; + int len; + + addr = of_get_property(node, "reg", &len); + if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) { + printk(KERN_ERR + "of-i2c: invalid i2c device entry\n"); + continue; + } + + info.irq = irq_of_parse_and_map(node, 0); + if (info.irq == NO_IRQ) + info.irq = -1; + + if (of_find_i2c_driver(node, &info) < 0) { + irq_dispose_mapping(info.irq); + continue; + } + + info.addr = *addr; + + request_module(info.type); + + result = i2c_new_device(adap, &info); + if (result == NULL) { + printk(KERN_ERR + "of-i2c: Failed to load driver for %s\n", + info.type); + irq_dispose_mapping(info.irq); + continue; + } + } +} +EXPORT_SYMBOL(of_register_i2c_devices); diff --git a/include/linux/of_i2c.h b/include/linux/of_i2c.h new file mode 100644 index 000000000000..2e5a96732042 --- /dev/null +++ b/include/linux/of_i2c.h @@ -0,0 +1,24 @@ +/* + * Generic I2C API implementation for PowerPC. + * + * Copyright (c) 2008 Jochen Friedrich + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __LINUX_OF_I2C_H +#define __LINUX_OF_I2C_H + +#include + +#ifdef CONFIG_OF_I2C + +void of_register_i2c_devices(struct i2c_adapter *adap, + struct device_node *adap_node); + +#endif /* CONFIG_OF_I2C */ + +#endif /* __LINUX_OF_I2C_H */ -- cgit v1.2.3 From 99c62dd773797b68f3b1ca6bb3274725d1852fa2 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 16 Apr 2008 05:52:21 +1000 Subject: [POWERPC] Remove and replace uses of PPC_MEMSTART with memstart_addr A number of users of PPC_MEMSTART (40x, ppc_mmu_32) can just always use 0 as we don't support booting these kernels at non-zero physical addresses since their exception vectors must be at 0 (or 0xfffx_xxxx). For the sub-arches that support relocatable interrupt vectors (book-e), it's reasonable to have memory start at a non-zero physical address. For those cases use the variable memstart_addr instead of the #define PPC_MEMSTART since the only uses of PPC_MEMSTART are for initialization and in the future we can set memstart_addr at runtime to have a relocatable kernel. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- arch/powerpc/mm/40x_mmu.c | 2 +- arch/powerpc/mm/fsl_booke_mmu.c | 11 +++++------ arch/powerpc/mm/init_32.c | 7 +++---- arch/powerpc/mm/mmu_decl.h | 1 + arch/powerpc/mm/pgtable_32.c | 5 +++-- arch/powerpc/mm/ppc_mmu_32.c | 11 ++--------- include/asm-powerpc/page_32.h | 2 -- 7 files changed, 15 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c index 3899ea97fbdf..cecbbc76f624 100644 --- a/arch/powerpc/mm/40x_mmu.c +++ b/arch/powerpc/mm/40x_mmu.c @@ -97,7 +97,7 @@ unsigned long __init mmu_mapin_ram(void) phys_addr_t p; v = KERNELBASE; - p = PPC_MEMSTART; + p = 0; s = total_lowmem; if (__map_without_ltlbs) diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index c93a966b7e4b..3dd0c8189bae 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c @@ -53,13 +53,12 @@ #include #include +#include "mmu_decl.h" + extern void loadcam_entry(unsigned int index); unsigned int tlbcam_index; unsigned int num_tlbcam_entries; static unsigned long __cam0, __cam1, __cam2; -extern unsigned long total_lowmem; -extern unsigned long __max_low_memory; -extern unsigned long __initial_memory_limit; #define MAX_LOW_MEM CONFIG_LOWMEM_SIZE #define NUM_TLBCAMS (16) @@ -165,15 +164,15 @@ void invalidate_tlbcam_entry(int index) void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, unsigned long cam2) { - settlbcam(0, PAGE_OFFSET, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0); + settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0); tlbcam_index++; if (cam1) { tlbcam_index++; - settlbcam(1, PAGE_OFFSET+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0); + settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0); } if (cam2) { tlbcam_index++; - settlbcam(2, PAGE_OFFSET+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0); + settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0); } } diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index 0c66a9fe63f5..1d7e5b8ade6a 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -59,8 +59,8 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); unsigned long total_memory; unsigned long total_lowmem; -unsigned long ppc_memstart; -unsigned long ppc_memoffset = PAGE_OFFSET; +phys_addr_t memstart_addr; +phys_addr_t lowmem_end_addr; int boot_mapsize; #ifdef CONFIG_PPC_PMAC @@ -145,8 +145,7 @@ void __init MMU_init(void) printk(KERN_WARNING "Only using first contiguous memory region"); } - total_memory = lmb_end_of_DRAM(); - total_lowmem = total_memory; + total_lowmem = total_memory = lmb_end_of_DRAM() - memstart_addr; #ifdef CONFIG_FSL_BOOKE /* Freescale Book-E parts expect lowmem to be mapped by fixed TLB diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h index ebfd13dc9d19..5bc11f5933a9 100644 --- a/arch/powerpc/mm/mmu_decl.h +++ b/arch/powerpc/mm/mmu_decl.h @@ -51,6 +51,7 @@ extern unsigned long __max_low_memory; extern unsigned long __initial_memory_limit; extern unsigned long total_memory; extern unsigned long total_lowmem; +extern phys_addr_t memstart_addr; /* ...and now those things that may be slightly different between processor * architectures. -- Dan diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c index ac3390f81900..64c44bcc68de 100644 --- a/arch/powerpc/mm/pgtable_32.c +++ b/arch/powerpc/mm/pgtable_32.c @@ -281,12 +281,13 @@ int map_page(unsigned long va, phys_addr_t pa, int flags) */ void __init mapin_ram(void) { - unsigned long v, p, s, f; + unsigned long v, s, f; + phys_addr_t p; int ktext; s = mmu_mapin_ram(); v = KERNELBASE + s; - p = PPC_MEMSTART + s; + p = memstart_addr + s; for (; s < total_lowmem; s += PAGE_SIZE) { ktext = ((char *) v >= _stext && (char *) v < etext); f = ktext ?_PAGE_RAM_TEXT : _PAGE_RAM; diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c index 72de3c79210a..65f915cbd29c 100644 --- a/arch/powerpc/mm/ppc_mmu_32.c +++ b/arch/powerpc/mm/ppc_mmu_32.c @@ -82,7 +82,6 @@ unsigned long __init mmu_mapin_ram(void) #else unsigned long tot, bl, done; unsigned long max_size = (256<<20); - unsigned long align; if (__map_without_bats) { printk(KERN_DEBUG "RAM mapped without BATs\n"); @@ -93,19 +92,13 @@ unsigned long __init mmu_mapin_ram(void) /* Make sure we don't map a block larger than the smallest alignment of the physical address. */ - /* alignment of PPC_MEMSTART */ - align = ~(PPC_MEMSTART-1) & PPC_MEMSTART; - /* set BAT block size to MIN(max_size, align) */ - if (align && align < max_size) - max_size = align; - tot = total_lowmem; for (bl = 128<<10; bl < max_size; bl <<= 1) { if (bl * 2 > tot) break; } - setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM); + setbat(2, KERNELBASE, 0, bl, _PAGE_RAM); done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1; if ((done < tot) && !bat_addrs[3].limit) { /* use BAT3 to cover a bit more */ @@ -113,7 +106,7 @@ unsigned long __init mmu_mapin_ram(void) for (bl = 128<<10; bl < max_size; bl <<= 1) if (bl * 2 > tot) break; - setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM); + setbat(3, KERNELBASE+done, done, bl, _PAGE_RAM); done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1; } diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h index 65ea19eec956..51f8134b5939 100644 --- a/include/asm-powerpc/page_32.h +++ b/include/asm-powerpc/page_32.h @@ -3,8 +3,6 @@ #define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32 -#define PPC_MEMSTART 0 - #ifdef CONFIG_NOT_COHERENT_CACHE #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES #endif -- cgit v1.2.3 From edc164d18f6b86b6de134d432de286e6c440c66d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 16 Apr 2008 05:52:24 +1000 Subject: [POWERPC] Use lowmem_end_addr to limit lmb allocations on ppc32 Now that we have a proper variable that is the address of the top of low memory we can use it to limit the lmb allocations. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- include/asm-powerpc/lmb.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h index 028184b6a162..6f5fdf0a19ae 100644 --- a/include/asm-powerpc/lmb.h +++ b/include/asm-powerpc/lmb.h @@ -6,8 +6,8 @@ #define LMB_DBG(fmt...) udbg_printf(fmt) #ifdef CONFIG_PPC32 -extern unsigned long __max_low_memory; -#define LMB_REAL_LIMIT __max_low_memory +extern phys_addr_t lowmem_end_addr; +#define LMB_REAL_LIMIT lowmem_end_addr #else #define LMB_REAL_LIMIT 0 #endif -- cgit v1.2.3 From d04ceb3fc294ea2c4f538a04343f3a473953a3b0 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 16 Apr 2008 05:52:27 +1000 Subject: [POWERPC] Move phys_addr_t definition into asm/types.h Moved phys_addr_t out of mmu-*.h and into asm/types.h so we can use it in places that before would have caused recursive includes. For example to use phys_addr_t in we would have included which would have possibly included which includes . Wheeee recursive include. CONFIG_PHYS_64BIT is a bit counterintuitive in light of ppc64 systems and thus the config option is only used for ppc32 systems with >32-bit physical addresses (44x, 85xx, 745x, etc.). Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- include/asm-powerpc/mmu-40x.h | 2 -- include/asm-powerpc/mmu-44x.h | 2 -- include/asm-powerpc/mmu-8xx.h | 2 -- include/asm-powerpc/mmu-fsl-booke.h | 6 ------ include/asm-powerpc/mmu-hash32.h | 2 -- include/asm-powerpc/mmu-hash64.h | 3 --- include/asm-powerpc/types.h | 7 +++++++ 7 files changed, 7 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/mmu-40x.h b/include/asm-powerpc/mmu-40x.h index 7d37f77043ac..3d108676584c 100644 --- a/include/asm-powerpc/mmu-40x.h +++ b/include/asm-powerpc/mmu-40x.h @@ -53,8 +53,6 @@ #ifndef __ASSEMBLY__ -typedef unsigned long phys_addr_t; - typedef struct { unsigned long id; unsigned long vdso_base; diff --git a/include/asm-powerpc/mmu-44x.h b/include/asm-powerpc/mmu-44x.h index 62772ae839ca..c8b02d97f753 100644 --- a/include/asm-powerpc/mmu-44x.h +++ b/include/asm-powerpc/mmu-44x.h @@ -53,8 +53,6 @@ #ifndef __ASSEMBLY__ -typedef unsigned long long phys_addr_t; - typedef struct { unsigned long id; unsigned long vdso_base; diff --git a/include/asm-powerpc/mmu-8xx.h b/include/asm-powerpc/mmu-8xx.h index 952bd8899f2f..9db877eb88db 100644 --- a/include/asm-powerpc/mmu-8xx.h +++ b/include/asm-powerpc/mmu-8xx.h @@ -136,8 +136,6 @@ #define SPRN_M_TW 799 #ifndef __ASSEMBLY__ -typedef unsigned long phys_addr_t; - typedef struct { unsigned long id; unsigned long vdso_base; diff --git a/include/asm-powerpc/mmu-fsl-booke.h b/include/asm-powerpc/mmu-fsl-booke.h index 37580004cd7a..925d93cf64d8 100644 --- a/include/asm-powerpc/mmu-fsl-booke.h +++ b/include/asm-powerpc/mmu-fsl-booke.h @@ -73,12 +73,6 @@ #ifndef __ASSEMBLY__ -#ifndef CONFIG_PHYS_64BIT -typedef unsigned long phys_addr_t; -#else -typedef unsigned long long phys_addr_t; -#endif - typedef struct { unsigned long id; unsigned long vdso_base; diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h index 4bd735be3833..6e21ca618ec3 100644 --- a/include/asm-powerpc/mmu-hash32.h +++ b/include/asm-powerpc/mmu-hash32.h @@ -84,8 +84,6 @@ typedef struct { unsigned long vdso_base; } mm_context_t; -typedef unsigned long phys_addr_t; - #endif /* !__ASSEMBLY__ */ #endif /* _ASM_POWERPC_MMU_HASH32_H_ */ diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h index 2864fa3989ea..0dff76776044 100644 --- a/include/asm-powerpc/mmu-hash64.h +++ b/include/asm-powerpc/mmu-hash64.h @@ -469,9 +469,6 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea, VSID_MODULUS_256M) #define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea)) -/* Physical address used by some IO functions */ -typedef unsigned long phys_addr_t; - #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_MMU_HASH64_H_ */ diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h index 903fd1932436..c243a6ac60e5 100644 --- a/include/asm-powerpc/types.h +++ b/include/asm-powerpc/types.h @@ -84,6 +84,13 @@ typedef unsigned long long u64; typedef __vector128 vector128; +/* Physical address used by some IO functions */ +#if defined(CONFIG_PPC64) || defined(CONFIG_PHYS_64BIT) +typedef u64 phys_addr_t; +#else +typedef u32 phys_addr_t; +#endif + #ifdef __powerpc64__ typedef u64 dma_addr_t; #else -- cgit v1.2.3 From 366234f657879aeb7a1e2ca582f2f24f3fae9269 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 16 Apr 2008 05:52:28 +1000 Subject: [POWERPC] Update linker script to properly set physical addresses We can set LOAD_OFFSET and use the AT attribute on sections and the linker will properly set the physical address of the LOAD program header for us. This allows us to know how the PHYSICAL_START the user configured a kernel with by just looking at the resulting vmlinux ELF. This is pretty much stolen from how x86 does things in their linker scripts. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/vmlinux.lds.S | 47 +++++++++++++++++++-------------------- include/asm-powerpc/page.h | 1 + 2 files changed, 24 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index b5a76bcd95a6..0c3000bf8d75 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S @@ -31,7 +31,7 @@ SECTIONS */ /* Text and gots */ - .text : { + .text : AT(ADDR(.text) - LOAD_OFFSET) { ALIGN_FUNCTION(); *(.text.head) _text = .; @@ -56,7 +56,7 @@ SECTIONS RODATA /* Exception & bug tables */ - __ex_table : { + __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { __start___ex_table = .; *(__ex_table) __stop___ex_table = .; @@ -72,7 +72,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); __init_begin = .; - .init.text : { + .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { _sinittext = .; INIT_TEXT _einittext = .; @@ -81,11 +81,11 @@ SECTIONS /* .exit.text is discarded at runtime, not link time, * to deal with references from __bug_table */ - .exit.text : { + .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { EXIT_TEXT } - .init.data : { + .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { INIT_DATA __vtop_table_begin = .; *(.vtop_fixup); @@ -101,19 +101,19 @@ SECTIONS } . = ALIGN(16); - .init.setup : { + .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { __setup_start = .; *(.init.setup) __setup_end = .; } - .initcall.init : { + .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { __initcall_start = .; INITCALLS __initcall_end = .; } - .con_initcall.init : { + .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { __con_initcall_start = .; *(.con_initcall.init) __con_initcall_end = .; @@ -122,14 +122,14 @@ SECTIONS SECURITY_INIT . = ALIGN(8); - __ftr_fixup : { + __ftr_fixup : AT(ADDR(__ftr_fixup) - LOAD_OFFSET) { __start___ftr_fixup = .; *(__ftr_fixup) __stop___ftr_fixup = .; } #ifdef CONFIG_PPC64 . = ALIGN(8); - __fw_ftr_fixup : { + __fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) { __start___fw_ftr_fixup = .; *(__fw_ftr_fixup) __stop___fw_ftr_fixup = .; @@ -137,14 +137,14 @@ SECTIONS #endif #ifdef CONFIG_BLK_DEV_INITRD . = ALIGN(PAGE_SIZE); - .init.ramfs : { + .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { __initramfs_start = .; *(.init.ramfs) __initramfs_end = .; } #endif . = ALIGN(PAGE_SIZE); - .data.percpu : { + .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { __per_cpu_start = .; *(.data.percpu) *(.data.percpu.shared_aligned) @@ -152,7 +152,7 @@ SECTIONS } . = ALIGN(8); - .machine.desc : { + .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) { __machine_desc_start = . ; *(.machine.desc) __machine_desc_end = . ; @@ -170,25 +170,24 @@ SECTIONS _sdata = .; #ifdef CONFIG_PPC32 - .data : - { + .data : AT(ADDR(.data) - LOAD_OFFSET) { DATA_DATA *(.sdata) *(.got.plt) *(.got) } #else - .data : { + .data : AT(ADDR(.data) - LOAD_OFFSET) { DATA_DATA *(.data.rel*) *(.toc1) *(.branch_lt) } - .opd : { + .opd : AT(ADDR(.opd) - LOAD_OFFSET) { *(.opd) } - .got : { + .got : AT(ADDR(.got) - LOAD_OFFSET) { __toc_start = .; *(.got) *(.toc) @@ -205,26 +204,26 @@ SECTIONS #else . = ALIGN(16384); #endif - .data.init_task : { + .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { *(.data.init_task) } . = ALIGN(PAGE_SIZE); - .data.page_aligned : { + .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { *(.data.page_aligned) } - .data.cacheline_aligned : { + .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { *(.data.cacheline_aligned) } . = ALIGN(L1_CACHE_BYTES); - .data.read_mostly : { + .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { *(.data.read_mostly) } . = ALIGN(PAGE_SIZE); - __data_nosave : { + .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { __nosave_begin = .; *(.data.nosave) . = ALIGN(PAGE_SIZE); @@ -235,7 +234,7 @@ SECTIONS * And finally the bss */ - .bss : { + .bss : AT(ADDR(.bss) - LOAD_OFFSET) { __bss_start = .; *(.sbss) *(.scommon) *(.dynbss) diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h index df47bbb6ea13..6c850609b847 100644 --- a/include/asm-powerpc/page.h +++ b/include/asm-powerpc/page.h @@ -53,6 +53,7 @@ #define PAGE_OFFSET ASM_CONST(CONFIG_KERNEL_START) #define KERNELBASE (PAGE_OFFSET + PHYSICAL_START) +#define LOAD_OFFSET PAGE_OFFSET #ifdef CONFIG_FLATMEM #define pfn_valid(pfn) ((pfn) < max_mapnr) -- cgit v1.2.3 From af892e0f9fad390669494e389aed29b968ab7fdb Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 16 Apr 2008 05:52:30 +1000 Subject: [POWERPC] Cleanup pgtable-ppc32.h * Removed defines KERNEL_PGD_PTRS & USER_PGD_PTRS since they aren't used anywhere * Changed pmd_page macro to use pfn_to_page so we get proper behavior if ARCH_PFN_OFFSET is set as well if we use a different memory model on ppc32. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- include/asm-powerpc/pgtable-ppc32.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index bd5b4011c53b..daea7692d070 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -98,9 +98,6 @@ extern int icache_44x_need_flush; #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) #define FIRST_USER_ADDRESS 0 -#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT) -#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS) - #define pte_ERROR(e) \ printk("%s:%d: bad pte %llx.\n", __FILE__, __LINE__, \ (unsigned long long)pte_val(e)) @@ -693,7 +690,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, #define pmd_page_vaddr(pmd) \ ((unsigned long) (pmd_val(pmd) & PAGE_MASK)) #define pmd_page(pmd) \ - (mem_map + (__pa(pmd_val(pmd)) >> PAGE_SHIFT)) + pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT)) #endif /* to find an entry in a kernel page-table-directory */ -- cgit v1.2.3 From 37ddd5d053c57fee798d72fa9c18660f59a9299b Mon Sep 17 00:00:00 2001 From: Manish Ahuja Date: Sat, 12 Apr 2008 09:31:52 +1000 Subject: [POWERPC] pseries/phyp dump: Reserve a variable amount of space at boot This changes the way we calculate how much space to reserve for the pHyp dump. Currently we reserve 256MB only. With this change, the code first checks to see if an amount has been specified on the boot command line with the "phyp_dump_reserve_size" option, and if so, uses that much. Otherwise it computes 5% of total ram and rounds it down to a multiple of 256MB, and uses the larger of that or 256MB. This is for large systems with a lot of memory (10GB or more). The aim is to have more space available for the kernel on reboot on machines with more resources. Although the dump will be collected pretty fast and the memory released really early on allowing the machine to have the full memory available, this alleviates any issues that can be caused by having way too little memory on very very large systems during those few minutes. Signed-off-by: Manish Ahuja Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/prom.c | 35 ++++++++++++++++++++++++++++-- arch/powerpc/platforms/pseries/phyp_dump.c | 9 ++++++++ include/asm-powerpc/phyp_dump.h | 4 +++- 3 files changed, 45 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 31d5b22c59a2..8a9359ae4718 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -1042,6 +1042,33 @@ static void __init early_reserve_mem(void) } #ifdef CONFIG_PHYP_DUMP +/** + * phyp_dump_calculate_reserve_size() - reserve variable boot area 5% or arg + * + * Function to find the largest size we need to reserve + * during early boot process. + * + * It either looks for boot param and returns that OR + * returns larger of 256 or 5% rounded down to multiples of 256MB. + * + */ +static inline unsigned long phyp_dump_calculate_reserve_size(void) +{ + unsigned long tmp; + + if (phyp_dump_info->reserve_bootvar) + return phyp_dump_info->reserve_bootvar; + + /* divide by 20 to get 5% of value */ + tmp = lmb_end_of_DRAM(); + do_div(tmp, 20); + + /* round it down in multiples of 256 */ + tmp = tmp & ~0x0FFFFFFFUL; + + return (tmp > PHYP_DUMP_RMR_END ? tmp : PHYP_DUMP_RMR_END); +} + /** * phyp_dump_reserve_mem() - reserve all not-yet-dumped mmemory * @@ -1055,6 +1082,8 @@ static void __init early_reserve_mem(void) static void __init phyp_dump_reserve_mem(void) { unsigned long base, size; + unsigned long variable_reserve_size; + if (!phyp_dump_info->phyp_dump_configured) { printk(KERN_ERR "Phyp-dump not supported on this hardware\n"); return; @@ -1065,9 +1094,11 @@ static void __init phyp_dump_reserve_mem(void) return; } + variable_reserve_size = phyp_dump_calculate_reserve_size(); + if (phyp_dump_info->phyp_dump_is_active) { /* Reserve *everything* above RMR.Area freed by userland tools*/ - base = PHYP_DUMP_RMR_END; + base = variable_reserve_size; size = lmb_end_of_DRAM() - base; /* XXX crashed_ram_end is wrong, since it may be beyond @@ -1079,7 +1110,7 @@ static void __init phyp_dump_reserve_mem(void) } else { size = phyp_dump_info->cpu_state_size + phyp_dump_info->hpte_region_size + - PHYP_DUMP_RMR_END; + variable_reserve_size; base = lmb_end_of_DRAM() - size; lmb_reserve(base, size); phyp_dump_info->init_reserve_start = base; diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c index 7ddd10526cea..edbc012c2ebc 100644 --- a/arch/powerpc/platforms/pseries/phyp_dump.c +++ b/arch/powerpc/platforms/pseries/phyp_dump.c @@ -496,3 +496,12 @@ static int __init early_phyp_dump_enabled(char *p) } early_param("phyp_dump", early_phyp_dump_enabled); +/* Look for phyp_dump_reserve_size= cmdline option */ +static int __init early_phyp_dump_reserve_size(char *p) +{ + if (p) + phyp_dump_info->reserve_bootvar = memparse(p, &p); + + return 0; +} +early_param("phyp_dump_reserve_size", early_phyp_dump_reserve_size); diff --git a/include/asm-powerpc/phyp_dump.h b/include/asm-powerpc/phyp_dump.h index 209a98913d9d..fa74c6c3e106 100644 --- a/include/asm-powerpc/phyp_dump.h +++ b/include/asm-powerpc/phyp_dump.h @@ -24,8 +24,10 @@ struct phyp_dump { /* Memory that is reserved during very early boot. */ unsigned long init_reserve_start; unsigned long init_reserve_size; - /* Check status during boot if dump supported, active & present*/ + /* cmd line options during boot */ + unsigned long reserve_bootvar; unsigned long phyp_dump_at_boot; + /* Check status during boot if dump supported, active & present*/ unsigned long phyp_dump_configured; unsigned long phyp_dump_is_active; /* store cpu & hpte size */ -- cgit v1.2.3 From 771168494719b90621ac61f9ae68c4af494e418f Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 16 Apr 2008 23:19:36 +1000 Subject: [POWERPC] Remove unused machine call outs When we moved to arch/powerpc we actively tried to avoid using the ppc_md.setup_io_mappings(). Currently no board ports use it so let's remove it to avoid any new boards using it. Also, remove early_serial_map() since we don't even have a call out for it in arch/powerpc. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- arch/powerpc/mm/init_32.c | 2 -- include/asm-powerpc/machdep.h | 3 --- 2 files changed, 5 deletions(-) (limited to 'include') diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index 9a0ea2cbf911..47325f23c51f 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -185,8 +185,6 @@ void __init MMU_init(void) /* Map in I/O resources */ if (ppc_md.progress) ppc_md.progress("MMU:setio", 0x302); - if (ppc_md.setup_io_mappings) - ppc_md.setup_io_mappings(); /* Initialize the context management stuff */ mmu_context_init(); diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h index b95386aed50d..54ed64df95b8 100644 --- a/include/asm-powerpc/machdep.h +++ b/include/asm-powerpc/machdep.h @@ -198,9 +198,6 @@ struct machdep_calls { May be NULL. */ void (*init)(void); - void (*setup_io_mappings)(void); - - void (*early_serial_map)(void); void (*kgdb_map_scc)(void); /* -- cgit v1.2.3 From e24e788abe0def81341fd23efae43e813678f7b1 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 10 Apr 2008 17:00:53 +0200 Subject: [POWERPC] CPM: Move opcodes common to CPM1 and CPM2 to include/asm-powerpc/cpm.h Signed-off-by: Laurent Pinchart Signed-off-by: Kumar Gala --- include/asm-powerpc/cpm.h | 14 ++++++++++++++ include/asm-powerpc/cpm1.h | 13 ------------- include/asm-powerpc/cpm2.h | 11 +---------- 3 files changed, 15 insertions(+), 23 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h index 77e39dad9728..ede38ffe466a 100644 --- a/include/asm-powerpc/cpm.h +++ b/include/asm-powerpc/cpm.h @@ -4,6 +4,20 @@ #include #include +/* Opcodes common to CPM1 and CPM2 +*/ +#define CPM_CR_INIT_TRX ((ushort)0x0000) +#define CPM_CR_INIT_RX ((ushort)0x0001) +#define CPM_CR_INIT_TX ((ushort)0x0002) +#define CPM_CR_HUNT_MODE ((ushort)0x0003) +#define CPM_CR_STOP_TX ((ushort)0x0004) +#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) +#define CPM_CR_RESTART_TX ((ushort)0x0006) +#define CPM_CR_CLOSE_RX_BD ((ushort)0x0007) +#define CPM_CR_SET_GADDR ((ushort)0x0008) +#define CPM_CR_SET_TIMER ((ushort)0x0008) +#define CPM_CR_STOP_IDMA ((ushort)0x000b) + /* Buffer descriptors used by many of the CPM protocols. */ typedef struct cpm_buf_desc { ushort cbd_sc; /* Status and Control */ diff --git a/include/asm-powerpc/cpm1.h b/include/asm-powerpc/cpm1.h index b2ebd6ac6dae..3df439678006 100644 --- a/include/asm-powerpc/cpm1.h +++ b/include/asm-powerpc/cpm1.h @@ -28,19 +28,6 @@ #define CPM_CR_CHAN ((ushort)0x00f0) #define CPM_CR_FLG ((ushort)0x0001) -/* Some commands (there are more...later) -*/ -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_INIT_RX ((ushort)0x0001) -#define CPM_CR_INIT_TX ((ushort)0x0002) -#define CPM_CR_HUNT_MODE ((ushort)0x0003) -#define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) -#define CPM_CR_RESTART_TX ((ushort)0x0006) -#define CPM_CR_CLOSE_RX_BD ((ushort)0x0007) -#define CPM_CR_SET_GADDR ((ushort)0x0008) -#define CPM_CR_SET_TIMER CPM_CR_SET_GADDR - /* Channel numbers. */ #define CPM_CR_CH_SCC1 ((ushort)0x0000) diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h index b93a53eb55c1..4c85ed9cd43f 100644 --- a/include/asm-powerpc/cpm2.h +++ b/include/asm-powerpc/cpm2.h @@ -71,18 +71,9 @@ #define CPM_CR_FCC_PAGE(x) (x + 0x04) -/* Some opcodes (there are more...later) +/* CPM2-specific opcodes (see cpm.h for common opcodes) */ -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_INIT_RX ((ushort)0x0001) -#define CPM_CR_INIT_TX ((ushort)0x0002) -#define CPM_CR_HUNT_MODE ((ushort)0x0003) -#define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) -#define CPM_CR_RESTART_TX ((ushort)0x0006) -#define CPM_CR_SET_GADDR ((ushort)0x0008) #define CPM_CR_START_IDMA ((ushort)0x0009) -#define CPM_CR_STOP_IDMA ((ushort)0x000b) #define mk_cr_cmd(PG, SBC, MCN, OP) \ ((PG << 26) | (SBC << 21) | (MCN << 6) | OP) -- cgit v1.2.3 From d4a32fe40a57d1a47d6ec3ebbf3d3153b12baa2c Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 11 Mar 2008 20:23:28 +0300 Subject: [POWERPC] fsl_elbc_nand: factor out localbus defines This is needed to support other localbus peripherals, such as NAND on FSL UPM. Signed-off-by: David Woodhouse Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- drivers/mtd/nand/fsl_elbc_nand.c | 219 +++----------------------------------- include/asm-powerpc/fsl_lbc.h | 223 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 235 insertions(+), 207 deletions(-) create mode 100644 include/asm-powerpc/fsl_lbc.h (limited to 'include') diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index b025dfe0b274..378b7aa63812 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -36,207 +36,12 @@ #include #include - +#include #define MAX_BANKS 8 #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ #define FCM_TIMEOUT_MSECS 500 /* Maximum number of mSecs to wait for FCM */ -struct elbc_bank { - __be32 br; /**< Base Register */ -#define BR_BA 0xFFFF8000 -#define BR_BA_SHIFT 15 -#define BR_PS 0x00001800 -#define BR_PS_SHIFT 11 -#define BR_PS_8 0x00000800 /* Port Size 8 bit */ -#define BR_PS_16 0x00001000 /* Port Size 16 bit */ -#define BR_PS_32 0x00001800 /* Port Size 32 bit */ -#define BR_DECC 0x00000600 -#define BR_DECC_SHIFT 9 -#define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */ -#define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */ -#define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */ -#define BR_WP 0x00000100 -#define BR_WP_SHIFT 8 -#define BR_MSEL 0x000000E0 -#define BR_MSEL_SHIFT 5 -#define BR_MS_GPCM 0x00000000 /* GPCM */ -#define BR_MS_FCM 0x00000020 /* FCM */ -#define BR_MS_SDRAM 0x00000060 /* SDRAM */ -#define BR_MS_UPMA 0x00000080 /* UPMA */ -#define BR_MS_UPMB 0x000000A0 /* UPMB */ -#define BR_MS_UPMC 0x000000C0 /* UPMC */ -#define BR_V 0x00000001 -#define BR_V_SHIFT 0 -#define BR_RES ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V) - - __be32 or; /**< Base Register */ -#define OR0 0x5004 -#define OR1 0x500C -#define OR2 0x5014 -#define OR3 0x501C -#define OR4 0x5024 -#define OR5 0x502C -#define OR6 0x5034 -#define OR7 0x503C - -#define OR_FCM_AM 0xFFFF8000 -#define OR_FCM_AM_SHIFT 15 -#define OR_FCM_BCTLD 0x00001000 -#define OR_FCM_BCTLD_SHIFT 12 -#define OR_FCM_PGS 0x00000400 -#define OR_FCM_PGS_SHIFT 10 -#define OR_FCM_CSCT 0x00000200 -#define OR_FCM_CSCT_SHIFT 9 -#define OR_FCM_CST 0x00000100 -#define OR_FCM_CST_SHIFT 8 -#define OR_FCM_CHT 0x00000080 -#define OR_FCM_CHT_SHIFT 7 -#define OR_FCM_SCY 0x00000070 -#define OR_FCM_SCY_SHIFT 4 -#define OR_FCM_SCY_1 0x00000010 -#define OR_FCM_SCY_2 0x00000020 -#define OR_FCM_SCY_3 0x00000030 -#define OR_FCM_SCY_4 0x00000040 -#define OR_FCM_SCY_5 0x00000050 -#define OR_FCM_SCY_6 0x00000060 -#define OR_FCM_SCY_7 0x00000070 -#define OR_FCM_RST 0x00000008 -#define OR_FCM_RST_SHIFT 3 -#define OR_FCM_TRLX 0x00000004 -#define OR_FCM_TRLX_SHIFT 2 -#define OR_FCM_EHTR 0x00000002 -#define OR_FCM_EHTR_SHIFT 1 -}; - -struct elbc_regs { - struct elbc_bank bank[8]; - u8 res0[0x28]; - __be32 mar; /**< UPM Address Register */ - u8 res1[0x4]; - __be32 mamr; /**< UPMA Mode Register */ - __be32 mbmr; /**< UPMB Mode Register */ - __be32 mcmr; /**< UPMC Mode Register */ - u8 res2[0x8]; - __be32 mrtpr; /**< Memory Refresh Timer Prescaler Register */ - __be32 mdr; /**< UPM Data Register */ - u8 res3[0x4]; - __be32 lsor; /**< Special Operation Initiation Register */ - __be32 lsdmr; /**< SDRAM Mode Register */ - u8 res4[0x8]; - __be32 lurt; /**< UPM Refresh Timer */ - __be32 lsrt; /**< SDRAM Refresh Timer */ - u8 res5[0x8]; - __be32 ltesr; /**< Transfer Error Status Register */ -#define LTESR_BM 0x80000000 -#define LTESR_FCT 0x40000000 -#define LTESR_PAR 0x20000000 -#define LTESR_WP 0x04000000 -#define LTESR_ATMW 0x00800000 -#define LTESR_ATMR 0x00400000 -#define LTESR_CS 0x00080000 -#define LTESR_CC 0x00000001 -#define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) - __be32 ltedr; /**< Transfer Error Disable Register */ - __be32 lteir; /**< Transfer Error Interrupt Register */ - __be32 lteatr; /**< Transfer Error Attributes Register */ - __be32 ltear; /**< Transfer Error Address Register */ - u8 res6[0xC]; - __be32 lbcr; /**< Configuration Register */ -#define LBCR_LDIS 0x80000000 -#define LBCR_LDIS_SHIFT 31 -#define LBCR_BCTLC 0x00C00000 -#define LBCR_BCTLC_SHIFT 22 -#define LBCR_AHD 0x00200000 -#define LBCR_LPBSE 0x00020000 -#define LBCR_LPBSE_SHIFT 17 -#define LBCR_EPAR 0x00010000 -#define LBCR_EPAR_SHIFT 16 -#define LBCR_BMT 0x0000FF00 -#define LBCR_BMT_SHIFT 8 -#define LBCR_INIT 0x00040000 - __be32 lcrr; /**< Clock Ratio Register */ -#define LCRR_DBYP 0x80000000 -#define LCRR_DBYP_SHIFT 31 -#define LCRR_BUFCMDC 0x30000000 -#define LCRR_BUFCMDC_SHIFT 28 -#define LCRR_ECL 0x03000000 -#define LCRR_ECL_SHIFT 24 -#define LCRR_EADC 0x00030000 -#define LCRR_EADC_SHIFT 16 -#define LCRR_CLKDIV 0x0000000F -#define LCRR_CLKDIV_SHIFT 0 - u8 res7[0x8]; - __be32 fmr; /**< Flash Mode Register */ -#define FMR_CWTO 0x0000F000 -#define FMR_CWTO_SHIFT 12 -#define FMR_BOOT 0x00000800 -#define FMR_ECCM 0x00000100 -#define FMR_AL 0x00000030 -#define FMR_AL_SHIFT 4 -#define FMR_OP 0x00000003 -#define FMR_OP_SHIFT 0 - __be32 fir; /**< Flash Instruction Register */ -#define FIR_OP0 0xF0000000 -#define FIR_OP0_SHIFT 28 -#define FIR_OP1 0x0F000000 -#define FIR_OP1_SHIFT 24 -#define FIR_OP2 0x00F00000 -#define FIR_OP2_SHIFT 20 -#define FIR_OP3 0x000F0000 -#define FIR_OP3_SHIFT 16 -#define FIR_OP4 0x0000F000 -#define FIR_OP4_SHIFT 12 -#define FIR_OP5 0x00000F00 -#define FIR_OP5_SHIFT 8 -#define FIR_OP6 0x000000F0 -#define FIR_OP6_SHIFT 4 -#define FIR_OP7 0x0000000F -#define FIR_OP7_SHIFT 0 -#define FIR_OP_NOP 0x0 /* No operation and end of sequence */ -#define FIR_OP_CA 0x1 /* Issue current column address */ -#define FIR_OP_PA 0x2 /* Issue current block+page address */ -#define FIR_OP_UA 0x3 /* Issue user defined address */ -#define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */ -#define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */ -#define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */ -#define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */ -#define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */ -#define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */ -#define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */ -#define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */ -#define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */ -#define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */ -#define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */ -#define FIR_OP_RSW 0xE /* Wait then read 1 or 2 bytes */ - __be32 fcr; /**< Flash Command Register */ -#define FCR_CMD0 0xFF000000 -#define FCR_CMD0_SHIFT 24 -#define FCR_CMD1 0x00FF0000 -#define FCR_CMD1_SHIFT 16 -#define FCR_CMD2 0x0000FF00 -#define FCR_CMD2_SHIFT 8 -#define FCR_CMD3 0x000000FF -#define FCR_CMD3_SHIFT 0 - __be32 fbar; /**< Flash Block Address Register */ -#define FBAR_BLK 0x00FFFFFF - __be32 fpar; /**< Flash Page Address Register */ -#define FPAR_SP_PI 0x00007C00 -#define FPAR_SP_PI_SHIFT 10 -#define FPAR_SP_MS 0x00000200 -#define FPAR_SP_CI 0x000001FF -#define FPAR_SP_CI_SHIFT 0 -#define FPAR_LP_PI 0x0003F000 -#define FPAR_LP_PI_SHIFT 12 -#define FPAR_LP_MS 0x00000800 -#define FPAR_LP_CI 0x000007FF -#define FPAR_LP_CI_SHIFT 0 - __be32 fbcr; /**< Flash Byte Count Register */ -#define FBCR_BC 0x00000FFF - u8 res11[0x8]; - u8 res8[0xF00]; -}; - struct fsl_elbc_ctrl; /* mtd information per set */ @@ -261,7 +66,7 @@ struct fsl_elbc_ctrl { /* device info */ struct device *dev; - struct elbc_regs __iomem *regs; + struct fsl_lbc_regs __iomem *regs; int irq; wait_queue_head_t irq_wait; unsigned int irq_status; /* status read from LTESR by irq handler */ @@ -322,7 +127,7 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; int buf_num; ctrl->page = page_addr; @@ -363,7 +168,7 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; /* Setup the FMR[OP] to execute without write protection */ out_be32(&lbc->fmr, priv->fmr | 3); @@ -406,7 +211,7 @@ static void fsl_elbc_do_read(struct nand_chip *chip, int oob) { struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; if (priv->page_size) { out_be32(&lbc->fir, @@ -439,7 +244,7 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; ctrl->use_mdr = 0; @@ -775,7 +580,7 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip) { struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; if (ctrl->status != LTESR_CC) return NAND_STATUS_FAIL; @@ -807,7 +612,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; unsigned int al; /* calculate FMR Address Length field */ @@ -922,7 +727,7 @@ static void fsl_elbc_write_page(struct mtd_info *mtd, static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) { struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; struct nand_chip *chip = &priv->chip; dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank); @@ -986,7 +791,7 @@ static int fsl_elbc_chip_remove(struct fsl_elbc_mtd *priv) static int fsl_elbc_chip_probe(struct fsl_elbc_ctrl *ctrl, struct device_node *node) { - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; struct fsl_elbc_mtd *priv; struct resource res; #ifdef CONFIG_MTD_PARTITIONS @@ -1083,7 +888,7 @@ err: static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl) { - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; /* clear event registers */ setbits32(&lbc->ltesr, LTESR_NAND_MASK); @@ -1128,7 +933,7 @@ static int __devexit fsl_elbc_ctrl_remove(struct of_device *ofdev) static irqreturn_t fsl_elbc_ctrl_irq(int irqno, void *data) { struct fsl_elbc_ctrl *ctrl = data; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; __be32 status = in_be32(&lbc->ltesr) & LTESR_NAND_MASK; if (status) { diff --git a/include/asm-powerpc/fsl_lbc.h b/include/asm-powerpc/fsl_lbc.h new file mode 100644 index 000000000000..13a3c28e1e10 --- /dev/null +++ b/include/asm-powerpc/fsl_lbc.h @@ -0,0 +1,223 @@ +/* Freescale Local Bus Controller + * + * Copyright (c) 2006-2007 Freescale Semiconductor + * + * Authors: Nick Spence , + * Scott Wood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_FSL_LBC_H +#define __ASM_FSL_LBC_H + +#include + +struct fsl_lbc_bank { + __be32 br; /**< Base Register */ +#define BR_BA 0xFFFF8000 +#define BR_BA_SHIFT 15 +#define BR_PS 0x00001800 +#define BR_PS_SHIFT 11 +#define BR_PS_8 0x00000800 /* Port Size 8 bit */ +#define BR_PS_16 0x00001000 /* Port Size 16 bit */ +#define BR_PS_32 0x00001800 /* Port Size 32 bit */ +#define BR_DECC 0x00000600 +#define BR_DECC_SHIFT 9 +#define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */ +#define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */ +#define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */ +#define BR_WP 0x00000100 +#define BR_WP_SHIFT 8 +#define BR_MSEL 0x000000E0 +#define BR_MSEL_SHIFT 5 +#define BR_MS_GPCM 0x00000000 /* GPCM */ +#define BR_MS_FCM 0x00000020 /* FCM */ +#define BR_MS_SDRAM 0x00000060 /* SDRAM */ +#define BR_MS_UPMA 0x00000080 /* UPMA */ +#define BR_MS_UPMB 0x000000A0 /* UPMB */ +#define BR_MS_UPMC 0x000000C0 /* UPMC */ +#define BR_V 0x00000001 +#define BR_V_SHIFT 0 +#define BR_RES ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V) + + __be32 or; /**< Base Register */ +#define OR0 0x5004 +#define OR1 0x500C +#define OR2 0x5014 +#define OR3 0x501C +#define OR4 0x5024 +#define OR5 0x502C +#define OR6 0x5034 +#define OR7 0x503C + +#define OR_FCM_AM 0xFFFF8000 +#define OR_FCM_AM_SHIFT 15 +#define OR_FCM_BCTLD 0x00001000 +#define OR_FCM_BCTLD_SHIFT 12 +#define OR_FCM_PGS 0x00000400 +#define OR_FCM_PGS_SHIFT 10 +#define OR_FCM_CSCT 0x00000200 +#define OR_FCM_CSCT_SHIFT 9 +#define OR_FCM_CST 0x00000100 +#define OR_FCM_CST_SHIFT 8 +#define OR_FCM_CHT 0x00000080 +#define OR_FCM_CHT_SHIFT 7 +#define OR_FCM_SCY 0x00000070 +#define OR_FCM_SCY_SHIFT 4 +#define OR_FCM_SCY_1 0x00000010 +#define OR_FCM_SCY_2 0x00000020 +#define OR_FCM_SCY_3 0x00000030 +#define OR_FCM_SCY_4 0x00000040 +#define OR_FCM_SCY_5 0x00000050 +#define OR_FCM_SCY_6 0x00000060 +#define OR_FCM_SCY_7 0x00000070 +#define OR_FCM_RST 0x00000008 +#define OR_FCM_RST_SHIFT 3 +#define OR_FCM_TRLX 0x00000004 +#define OR_FCM_TRLX_SHIFT 2 +#define OR_FCM_EHTR 0x00000002 +#define OR_FCM_EHTR_SHIFT 1 +}; + +struct fsl_lbc_regs { + struct fsl_lbc_bank bank[8]; + u8 res0[0x28]; + __be32 mar; /**< UPM Address Register */ + u8 res1[0x4]; + __be32 mamr; /**< UPMA Mode Register */ + __be32 mbmr; /**< UPMB Mode Register */ + __be32 mcmr; /**< UPMC Mode Register */ + u8 res2[0x8]; + __be32 mrtpr; /**< Memory Refresh Timer Prescaler Register */ + __be32 mdr; /**< UPM Data Register */ + u8 res3[0x4]; + __be32 lsor; /**< Special Operation Initiation Register */ + __be32 lsdmr; /**< SDRAM Mode Register */ + u8 res4[0x8]; + __be32 lurt; /**< UPM Refresh Timer */ + __be32 lsrt; /**< SDRAM Refresh Timer */ + u8 res5[0x8]; + __be32 ltesr; /**< Transfer Error Status Register */ +#define LTESR_BM 0x80000000 +#define LTESR_FCT 0x40000000 +#define LTESR_PAR 0x20000000 +#define LTESR_WP 0x04000000 +#define LTESR_ATMW 0x00800000 +#define LTESR_ATMR 0x00400000 +#define LTESR_CS 0x00080000 +#define LTESR_CC 0x00000001 +#define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) + __be32 ltedr; /**< Transfer Error Disable Register */ + __be32 lteir; /**< Transfer Error Interrupt Register */ + __be32 lteatr; /**< Transfer Error Attributes Register */ + __be32 ltear; /**< Transfer Error Address Register */ + u8 res6[0xC]; + __be32 lbcr; /**< Configuration Register */ +#define LBCR_LDIS 0x80000000 +#define LBCR_LDIS_SHIFT 31 +#define LBCR_BCTLC 0x00C00000 +#define LBCR_BCTLC_SHIFT 22 +#define LBCR_AHD 0x00200000 +#define LBCR_LPBSE 0x00020000 +#define LBCR_LPBSE_SHIFT 17 +#define LBCR_EPAR 0x00010000 +#define LBCR_EPAR_SHIFT 16 +#define LBCR_BMT 0x0000FF00 +#define LBCR_BMT_SHIFT 8 +#define LBCR_INIT 0x00040000 + __be32 lcrr; /**< Clock Ratio Register */ +#define LCRR_DBYP 0x80000000 +#define LCRR_DBYP_SHIFT 31 +#define LCRR_BUFCMDC 0x30000000 +#define LCRR_BUFCMDC_SHIFT 28 +#define LCRR_ECL 0x03000000 +#define LCRR_ECL_SHIFT 24 +#define LCRR_EADC 0x00030000 +#define LCRR_EADC_SHIFT 16 +#define LCRR_CLKDIV 0x0000000F +#define LCRR_CLKDIV_SHIFT 0 + u8 res7[0x8]; + __be32 fmr; /**< Flash Mode Register */ +#define FMR_CWTO 0x0000F000 +#define FMR_CWTO_SHIFT 12 +#define FMR_BOOT 0x00000800 +#define FMR_ECCM 0x00000100 +#define FMR_AL 0x00000030 +#define FMR_AL_SHIFT 4 +#define FMR_OP 0x00000003 +#define FMR_OP_SHIFT 0 + __be32 fir; /**< Flash Instruction Register */ +#define FIR_OP0 0xF0000000 +#define FIR_OP0_SHIFT 28 +#define FIR_OP1 0x0F000000 +#define FIR_OP1_SHIFT 24 +#define FIR_OP2 0x00F00000 +#define FIR_OP2_SHIFT 20 +#define FIR_OP3 0x000F0000 +#define FIR_OP3_SHIFT 16 +#define FIR_OP4 0x0000F000 +#define FIR_OP4_SHIFT 12 +#define FIR_OP5 0x00000F00 +#define FIR_OP5_SHIFT 8 +#define FIR_OP6 0x000000F0 +#define FIR_OP6_SHIFT 4 +#define FIR_OP7 0x0000000F +#define FIR_OP7_SHIFT 0 +#define FIR_OP_NOP 0x0 /* No operation and end of sequence */ +#define FIR_OP_CA 0x1 /* Issue current column address */ +#define FIR_OP_PA 0x2 /* Issue current block+page address */ +#define FIR_OP_UA 0x3 /* Issue user defined address */ +#define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */ +#define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */ +#define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */ +#define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */ +#define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */ +#define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */ +#define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */ +#define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */ +#define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */ +#define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */ +#define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */ +#define FIR_OP_RSW 0xE /* Wait then read 1 or 2 bytes */ + __be32 fcr; /**< Flash Command Register */ +#define FCR_CMD0 0xFF000000 +#define FCR_CMD0_SHIFT 24 +#define FCR_CMD1 0x00FF0000 +#define FCR_CMD1_SHIFT 16 +#define FCR_CMD2 0x0000FF00 +#define FCR_CMD2_SHIFT 8 +#define FCR_CMD3 0x000000FF +#define FCR_CMD3_SHIFT 0 + __be32 fbar; /**< Flash Block Address Register */ +#define FBAR_BLK 0x00FFFFFF + __be32 fpar; /**< Flash Page Address Register */ +#define FPAR_SP_PI 0x00007C00 +#define FPAR_SP_PI_SHIFT 10 +#define FPAR_SP_MS 0x00000200 +#define FPAR_SP_CI 0x000001FF +#define FPAR_SP_CI_SHIFT 0 +#define FPAR_LP_PI 0x0003F000 +#define FPAR_LP_PI_SHIFT 12 +#define FPAR_LP_MS 0x00000800 +#define FPAR_LP_CI 0x000007FF +#define FPAR_LP_CI_SHIFT 0 + __be32 fbcr; /**< Flash Byte Count Register */ +#define FBCR_BC 0x00000FFF + u8 res11[0x8]; + u8 res8[0xF00]; +}; + +#endif /* __ASM_FSL_LBC_H */ -- cgit v1.2.3 From acaa7aa30a8cdf7276945629f56d6daf30beb157 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 11 Apr 2008 21:03:40 +0400 Subject: [POWERPC] fsl_lbc: implement few UPM routines Freescale UPM can be used to adjust localbus timings or to generate orbitrary, pre-programmed "patterns" on the external Localbus signals. This patch implements few routines so drivers could work with UPMs in safe and generic manner. So far there is just one user of these routines: Freescale UPM NAND driver. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/Kconfig | 5 ++ arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/fsl_lbc.c | 129 ++++++++++++++++++++++++++++++++++++++++++ include/asm-powerpc/fsl_lbc.h | 88 ++++++++++++++++++++++++++++ 4 files changed, 223 insertions(+) create mode 100644 arch/powerpc/sysdev/fsl_lbc.c (limited to 'include') diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index d1fe425cfb58..7f2f126d1c2b 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -520,6 +520,11 @@ config FSL_PCI config 4xx_SOC bool +config FSL_LBC + bool + help + Freescale Localbus support + # Yes MCA RS/6000s exist but Linux-PPC does not currently support any config MCA bool diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 851a0be71947..6d386d0071a0 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o obj-$(CONFIG_FSL_SOC) += fsl_soc.o obj-$(CONFIG_FSL_PCI) += fsl_pci.o +obj-$(CONFIG_FSL_LBC) += fsl_lbc.o obj-$(CONFIG_RAPIDIO) += fsl_rio.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c new file mode 100644 index 000000000000..422c8faef593 --- /dev/null +++ b/arch/powerpc/sysdev/fsl_lbc.c @@ -0,0 +1,129 @@ +/* + * Freescale LBC and UPM routines. + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include + +spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock); + +struct fsl_lbc_regs __iomem *fsl_lbc_regs; +EXPORT_SYMBOL(fsl_lbc_regs); + +static char __initdata *compat_lbc[] = { + "fsl,pq2-localbus", + "fsl,pq2pro-localbus", + "fsl,pq3-localbus", + "fsl,elbc", +}; + +static int __init fsl_lbc_init(void) +{ + struct device_node *lbus; + int i; + + for (i = 0; i < ARRAY_SIZE(compat_lbc); i++) { + lbus = of_find_compatible_node(NULL, NULL, compat_lbc[i]); + if (lbus) + goto found; + } + return -ENODEV; + +found: + fsl_lbc_regs = of_iomap(lbus, 0); + of_node_put(lbus); + if (!fsl_lbc_regs) + return -ENOMEM; + return 0; +} +arch_initcall(fsl_lbc_init); + +/** + * fsl_lbc_find - find Localbus bank + * @addr_base: base address of the memory bank + * + * This function walks LBC banks comparing "Base address" field of the BR + * registers with the supplied addr_base argument. When bases match this + * function returns bank number (starting with 0), otherwise it returns + * appropriate errno value. + */ +int fsl_lbc_find(phys_addr_t addr_base) +{ + int i; + + if (!fsl_lbc_regs) + return -ENODEV; + + for (i = 0; i < ARRAY_SIZE(fsl_lbc_regs->bank); i++) { + __be32 br = in_be32(&fsl_lbc_regs->bank[i].br); + __be32 or = in_be32(&fsl_lbc_regs->bank[i].or); + + if (br & BR_V && (br & or & BR_BA) == addr_base) + return i; + } + + return -ENOENT; +} +EXPORT_SYMBOL(fsl_lbc_find); + +/** + * fsl_upm_find - find pre-programmed UPM via base address + * @addr_base: base address of the memory bank controlled by the UPM + * @upm: pointer to the allocated fsl_upm structure + * + * This function fills fsl_upm structure so you can use it with the rest of + * UPM API. On success this function returns 0, otherwise it returns + * appropriate errno value. + */ +int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm) +{ + int bank; + __be32 br; + + bank = fsl_lbc_find(addr_base); + if (bank < 0) + return bank; + + br = in_be32(&fsl_lbc_regs->bank[bank].br); + + switch (br & BR_MSEL) { + case BR_MS_UPMA: + upm->mxmr = &fsl_lbc_regs->mamr; + break; + case BR_MS_UPMB: + upm->mxmr = &fsl_lbc_regs->mbmr; + break; + case BR_MS_UPMC: + upm->mxmr = &fsl_lbc_regs->mcmr; + break; + default: + return -EINVAL; + } + + switch (br & BR_PS) { + case BR_PS_8: + upm->width = 8; + break; + case BR_PS_16: + upm->width = 16; + break; + case BR_PS_32: + upm->width = 32; + break; + default: + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL(fsl_upm_find); diff --git a/include/asm-powerpc/fsl_lbc.h b/include/asm-powerpc/fsl_lbc.h index 13a3c28e1e10..303f5484c050 100644 --- a/include/asm-powerpc/fsl_lbc.h +++ b/include/asm-powerpc/fsl_lbc.h @@ -24,6 +24,8 @@ #define __ASM_FSL_LBC_H #include +#include +#include struct fsl_lbc_bank { __be32 br; /**< Base Register */ @@ -98,6 +100,11 @@ struct fsl_lbc_regs { __be32 mar; /**< UPM Address Register */ u8 res1[0x4]; __be32 mamr; /**< UPMA Mode Register */ +#define MxMR_OP_NO (0 << 28) /**< normal operation */ +#define MxMR_OP_WA (1 << 28) /**< write array */ +#define MxMR_OP_RA (2 << 28) /**< read array */ +#define MxMR_OP_RP (3 << 28) /**< run pattern */ +#define MxMR_MAD 0x3f /**< machine address */ __be32 mbmr; /**< UPMB Mode Register */ __be32 mcmr; /**< UPMC Mode Register */ u8 res2[0x8]; @@ -220,4 +227,85 @@ struct fsl_lbc_regs { u8 res8[0xF00]; }; +extern struct fsl_lbc_regs __iomem *fsl_lbc_regs; +extern spinlock_t fsl_lbc_lock; + +/* + * FSL UPM routines + */ +struct fsl_upm { + __be32 __iomem *mxmr; + int width; +}; + +extern int fsl_lbc_find(phys_addr_t addr_base); +extern int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm); + +/** + * fsl_upm_start_pattern - start UPM patterns execution + * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find + * @pat_offset: UPM pattern offset for the command to be executed + * + * This routine programmes UPM so the next memory access that hits an UPM + * will trigger pattern execution, starting at pat_offset. + */ +static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u8 pat_offset) +{ + clrsetbits_be32(upm->mxmr, MxMR_MAD, MxMR_OP_RP | pat_offset); +} + +/** + * fsl_upm_end_pattern - end UPM patterns execution + * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find + * + * This routine reverts UPM to normal operation mode. + */ +static inline void fsl_upm_end_pattern(struct fsl_upm *upm) +{ + clrbits32(upm->mxmr, MxMR_OP_RP); + + while (in_be32(upm->mxmr) & MxMR_OP_RP) + cpu_relax(); +} + +/** + * fsl_upm_run_pattern - actually run an UPM pattern + * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find + * @io_base: remapped pointer to where memory access should happen + * @mar: MAR register content during pattern execution + * + * This function triggers dummy write to the memory specified by the io_base, + * thus UPM pattern actually executed. Note that mar usage depends on the + * pre-programmed AMX bits in the UPM RAM. + */ +static inline int fsl_upm_run_pattern(struct fsl_upm *upm, + void __iomem *io_base, u32 mar) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&fsl_lbc_lock, flags); + + out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); + + switch (upm->width) { + case 8: + out_8(io_base, 0x0); + break; + case 16: + out_be16(io_base, 0x0); + break; + case 32: + out_be32(io_base, 0x0); + break; + default: + ret = -EINVAL; + break; + } + + spin_unlock_irqrestore(&fsl_lbc_lock, flags); + + return ret; +} + #endif /* __ASM_FSL_LBC_H */ -- cgit v1.2.3 From 0b51b02edff2417deff98d8bbf294fa56b765bc6 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 11 Mar 2008 20:24:13 +0300 Subject: [POWERPC] QE: implement qe_muram_offset qe_muram_offset is the reverse of the qe_muram_addr, will be used for the Freescale QE USB Host Controller driver. This patch also moves qe_muram_addr into the qe.h header, plus adds __iomem hints to use with sparse. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/qe_lib/qe.c | 8 +------- include/asm-powerpc/immap_qe.h | 2 +- include/asm-powerpc/qe.h | 11 ++++++++++- 3 files changed, 12 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index cc81fd1141b0..addabcd443a6 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -55,7 +55,7 @@ struct qe_snum { /* We allocate this here because it is used almost exclusively for * the communication processor devices. */ -struct qe_immap *qe_immr = NULL; +struct qe_immap __iomem *qe_immr; EXPORT_SYMBOL(qe_immr); static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs */ @@ -415,12 +415,6 @@ void qe_muram_dump(void) } EXPORT_SYMBOL(qe_muram_dump); -void *qe_muram_addr(unsigned long offset) -{ - return (void *)&qe_immr->muram[offset]; -} -EXPORT_SYMBOL(qe_muram_addr); - /* The maximum number of RISCs we support */ #define MAX_QE_RISC 2 diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h index 82a452615097..924aefbd6a8e 100644 --- a/include/asm-powerpc/immap_qe.h +++ b/include/asm-powerpc/immap_qe.h @@ -468,7 +468,7 @@ struct qe_immap { u8 res18[0xC0000]; /* 0x140000 - 0x200000 */ } __attribute__ ((packed)); -extern struct qe_immap *qe_immr; +extern struct qe_immap __iomem *qe_immr; extern phys_addr_t get_qe_base(void); static inline unsigned long immrbar_virt_to_phys(void *address) diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h index 430dc77b35fc..398534c15cc7 100644 --- a/include/asm-powerpc/qe.h +++ b/include/asm-powerpc/qe.h @@ -92,7 +92,16 @@ unsigned long qe_muram_alloc(int size, int align); int qe_muram_free(unsigned long offset); unsigned long qe_muram_alloc_fixed(unsigned long offset, int size); void qe_muram_dump(void); -void *qe_muram_addr(unsigned long offset); + +static inline void __iomem *qe_muram_addr(unsigned long offset) +{ + return (void __iomem *)&qe_immr->muram[offset]; +} + +static inline unsigned long qe_muram_offset(void __iomem *addr) +{ + return addr - (void __iomem *)qe_immr->muram; +} /* Structure that defines QE firmware binary files. * -- cgit v1.2.3 From ab1220d5ac69bd3327305c4d367548221f2bc3b4 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 11 Mar 2008 20:24:21 +0300 Subject: [POWERPC] QE: immap_qe.h should include asm/io.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Headers should include prototypes they use, otherwise build will break if we use it without explicitly including io.h: CC arch/powerpc/sysdev/qe_lib/gtm.o In file included from include/asm/qe.h:20, from arch/powerpc/sysdev/qe_lib/gtm.c:18: include/asm/immap_qe.h: In function ‘immrbar_virt_to_phys’: include/asm/immap_qe.h:480: error: implicit declaration of function ‘virt_to_phys’ make[2]: *** [arch/powerpc/sysdev/qe_lib/gtm.o] Error 1 make[1]: *** [arch/powerpc/sysdev/qe_lib] Error 2 gtm.c needs qe.h (which includes immap_qe.h) to use qe_get_brg_clk(). Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- include/asm-powerpc/immap_qe.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h index 924aefbd6a8e..7b6f411db3e6 100644 --- a/include/asm-powerpc/immap_qe.h +++ b/include/asm-powerpc/immap_qe.h @@ -20,6 +20,7 @@ #ifdef __KERNEL__ #include +#include #define QE_IMMAP_SIZE (1024 * 1024) /* 1MB from 1MB+IMMR */ -- cgit v1.2.3 From 7f0a6fc81213b957714dfd2a49a28b110283ecc8 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 11 Mar 2008 20:24:24 +0300 Subject: [POWERPC] QE: export qe_get_brg_clk() qe_get_brg_clk() will be used by the fsl_gtm routines. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/qe_lib/qe.c | 5 +++-- include/asm-powerpc/qe.h | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index addabcd443a6..cff550eec7e8 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -156,7 +156,7 @@ EXPORT_SYMBOL(qe_issue_cmd); */ static unsigned int brg_clk = 0; -unsigned int get_brg_clk(void) +unsigned int qe_get_brg_clk(void) { struct device_node *qe; unsigned int size; @@ -180,6 +180,7 @@ unsigned int get_brg_clk(void) return brg_clk; } +EXPORT_SYMBOL(qe_get_brg_clk); /* Program the BRG to the given sampling rate and multiplier * @@ -197,7 +198,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) if ((brg < QE_BRG1) || (brg > QE_BRG16)) return -EINVAL; - divisor = get_brg_clk() / (rate * multiplier); + divisor = qe_get_brg_clk() / (rate * multiplier); if (divisor > QE_BRGC_DIVISOR_MAX + 1) { div16 = QE_BRGC_DIV16; diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h index 398534c15cc7..c3be6e2e1490 100644 --- a/include/asm-powerpc/qe.h +++ b/include/asm-powerpc/qe.h @@ -85,6 +85,7 @@ extern int par_io_data_set(u8 port, u8 pin, u8 val); /* QE internal API */ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input); enum qe_clock qe_clock_source(const char *source); +unsigned int qe_get_brg_clk(void); int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier); int qe_get_snum(void); void qe_put_snum(u8 snum); -- cgit v1.2.3 From 47b9d9bddf1877187d965f4dd4d7d454d8cdb50c Mon Sep 17 00:00:00 2001 From: Alexander van Heukelum Date: Wed, 16 Apr 2008 15:55:08 +0200 Subject: [POWERPC] Use asm-generic/bitops/find.h in bitops.h Powerpc and ppc have some code in their bitops.h that is exactly the same as asm-generic/bitops/find.h. Include this header instead of the private implementation. Signed-off-by: Alexander van Heukelum Signed-off-by: Paul Mackerras --- include/asm-powerpc/bitops.h | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h index 220d9a781ab9..36c8f3a43792 100644 --- a/include/asm-powerpc/bitops.h +++ b/include/asm-powerpc/bitops.h @@ -313,23 +313,8 @@ static __inline__ int fls(unsigned int x) return 32 - lz; } #include - #include - -#define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0) -unsigned long find_next_zero_bit(const unsigned long *addr, - unsigned long size, unsigned long offset); -/** - * find_first_bit - find the first set bit in a memory region - * @addr: The address to start the search at - * @size: The maximum size to search - * - * Returns the bit-number of the first set bit, not the number of the byte - * containing a bit. - */ -#define find_first_bit(addr, size) find_next_bit((addr), (size), 0) -unsigned long find_next_bit(const unsigned long *addr, - unsigned long size, unsigned long offset); +#include /* Little-endian versions */ -- cgit v1.2.3 From f13f4ca8036516ca1b99a41f95f7dea7e4dce104 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 9 Apr 2008 12:19:32 +1000 Subject: [POWERPC] Make pci_bus_to_host()'s struct pci_bus * argument const A) It's not modified and so it can be made const. const is good. B) If one has a function that was given a const pci_bus pointer and you want to get a pointer to its pci_controller, you'll get a warning from gcc when you use pci_bus_to_host(). This is the right way to stop that warning. Signed-off-by: Trent Piepho Acked-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/pci-bridge.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index e5802c62f428..b95d033ae6e6 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -117,7 +117,7 @@ struct pci_controller { #ifndef CONFIG_PPC64 -static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) +static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) { return bus->sysdata; } @@ -235,7 +235,7 @@ extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus); extern int pcibios_remove_root_bus(struct pci_controller *phb); -static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) +static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) { struct device_node *busdn = bus->sysdata; -- cgit v1.2.3 From ec2b36b9f23cfbbe94d89724b796b44fd57d5221 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Thu, 17 Apr 2008 14:34:59 +1000 Subject: [POWERPC] Move stackframe definitions to common header This moves various definitions used all over the place to parse stack frames to ptrace.h so only one definition is needed. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/entry_64.S | 3 ++- arch/powerpc/kernel/head_32.S | 5 +++-- arch/powerpc/kernel/process.c | 28 +++++++--------------------- arch/powerpc/xmon/xmon.c | 13 +++++-------- include/asm-powerpc/ptrace.h | 9 +++++++++ 5 files changed, 26 insertions(+), 32 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 148a3547c9aa..13019845536b 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -29,6 +29,7 @@ #include #include #include +#include /* * System calls. @@ -39,7 +40,7 @@ /* This value is used to mark exception frames on the stack. */ exception_marker: - .tc ID_72656773_68657265[TC],0x7265677368657265 + .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER .section ".text" .align 7 diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index c16d1354b19d..785af9b56591 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S @@ -30,6 +30,7 @@ #include #include #include +#include /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ #define LOAD_BAT(n, reg, RA, RB) \ @@ -268,8 +269,8 @@ __secondary_hold_acknowledge: li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \ MTMSRD(r10); /* (except for mach check in rtas) */ \ stw r0,GPR0(r11); \ - lis r10,0x7265; /* put exception frame marker */ \ - addi r10,r10,0x6773; \ + lis r10,STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */ \ + addi r10,r10,STACK_FRAME_REGS_MARKER@l; \ stw r10,8(r11); \ SAVE_4GPRS(3, r11); \ SAVE_2GPRS(7, r11) diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index a27910207c7e..703100d5e458 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -914,20 +914,6 @@ int validate_sp(unsigned long sp, struct task_struct *p, return valid_irq_stack(sp, p, nbytes); } -#ifdef CONFIG_PPC64 -#define MIN_STACK_FRAME 112 /* same as STACK_FRAME_OVERHEAD, in fact */ -#define FRAME_LR_SAVE 2 -#define INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD + 288) -#define REGS_MARKER 0x7265677368657265ul -#define FRAME_MARKER 12 -#else -#define MIN_STACK_FRAME 16 -#define FRAME_LR_SAVE 1 -#define INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD) -#define REGS_MARKER 0x72656773ul -#define FRAME_MARKER 2 -#endif - EXPORT_SYMBOL(validate_sp); unsigned long get_wchan(struct task_struct *p) @@ -939,15 +925,15 @@ unsigned long get_wchan(struct task_struct *p) return 0; sp = p->thread.ksp; - if (!validate_sp(sp, p, MIN_STACK_FRAME)) + if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) return 0; do { sp = *(unsigned long *)sp; - if (!validate_sp(sp, p, MIN_STACK_FRAME)) + if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) return 0; if (count > 0) { - ip = ((unsigned long *)sp)[FRAME_LR_SAVE]; + ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; if (!in_sched_functions(ip)) return ip; } @@ -976,12 +962,12 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) lr = 0; printk("Call Trace:\n"); do { - if (!validate_sp(sp, tsk, MIN_STACK_FRAME)) + if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) return; stack = (unsigned long *) sp; newsp = stack[0]; - ip = stack[FRAME_LR_SAVE]; + ip = stack[STACK_FRAME_LR_SAVE]; if (!firstframe || ip != lr) { printk("["REG"] ["REG"] ", sp, ip); print_symbol("%s", ip); @@ -995,8 +981,8 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) * See if this is an exception frame. * We look for the "regshere" marker in the current frame. */ - if (validate_sp(sp, tsk, INT_FRAME_SIZE) - && stack[FRAME_MARKER] == REGS_MARKER) { + if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) + && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { struct pt_regs *regs = (struct pt_regs *) (sp + STACK_FRAME_OVERHEAD); printk("--- Exception: %lx", regs->trap); diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 00fd7647f807..52c74780f403 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -1243,15 +1243,12 @@ static void get_function_bounds(unsigned long pc, unsigned long *startp, static int xmon_depth_to_print = 64; -#ifdef CONFIG_PPC64 -#define LRSAVE_OFFSET 0x10 -#define REG_FRAME_MARKER 0x7265677368657265ul /* "regshere" */ -#define MARKER_OFFSET 0x60 +#define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) +#define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) + +#ifdef __powerpc64__ #define REGS_OFFSET 0x70 #else -#define LRSAVE_OFFSET 4 -#define REG_FRAME_MARKER 0x72656773 -#define MARKER_OFFSET 8 #define REGS_OFFSET 16 #endif @@ -1317,7 +1314,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr, /* Look for "regshere" marker to see if this is an exception frame. */ if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) - && marker == REG_FRAME_MARKER) { + && marker == STACK_FRAME_REGS_MARKER) { if (mread(sp + REGS_OFFSET, ®s, sizeof(regs)) != sizeof(regs)) { printf("Couldn't read registers at %lx\n", diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h index 891d68932f39..39023dde1cc4 100644 --- a/include/asm-powerpc/ptrace.h +++ b/include/asm-powerpc/ptrace.h @@ -58,6 +58,11 @@ struct pt_regs { #define __ARCH_WANT_COMPAT_SYS_PTRACE #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ +#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */ +#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265) +#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \ + STACK_FRAME_OVERHEAD + 288) +#define STACK_FRAME_MARKER 12 /* Size of dummy stack frame allocated when calling signal handler. */ #define __SIGNAL_FRAMESIZE 128 @@ -66,6 +71,10 @@ struct pt_regs { #else /* __powerpc64__ */ #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ +#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */ +#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773) +#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD) +#define STACK_FRAME_MARKER 2 /* Size of stack frame allocated when calling signal handler. */ #define __SIGNAL_FRAMESIZE 64 -- cgit v1.2.3 From 945feb174b14e7098cc7ecf0cf4768d35bc52f9c Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Thu, 17 Apr 2008 14:35:01 +1000 Subject: [POWERPC] irqtrace support for 64-bit powerpc This adds the low level irq tracing hooks to the powerpc architecture needed to enable full lockdep functionality. This is partly based on Johannes Berg's initial version. I removed the asm trampoline that isn't needed (thus improving performance) and modified all sorts of bits and pieces, reworking most of the assembly, etc... Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/powerpc/Kconfig | 9 ++++++++ arch/powerpc/kernel/entry_64.S | 27 +++++++++++++++++++++-- arch/powerpc/kernel/head_64.S | 47 ++++++++++++++++++++++++++++------------- arch/powerpc/kernel/irq.c | 3 ++- arch/powerpc/kernel/ppc_ksyms.c | 4 ---- arch/powerpc/kernel/setup_64.c | 4 ++++ include/asm-powerpc/exception.h | 6 +++--- include/asm-powerpc/hw_irq.h | 13 ++++++------ include/asm-powerpc/irqflags.h | 37 +++++++++++++++++++++----------- include/asm-powerpc/rwsem.h | 35 ++++++++++++++++++++++-------- include/asm-powerpc/spinlock.h | 1 + 11 files changed, 134 insertions(+), 52 deletions(-) (limited to 'include') diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index ecca20d17a7b..4bb2e9310a56 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -53,6 +53,15 @@ config STACKTRACE_SUPPORT bool default y +config TRACE_IRQFLAGS_SUPPORT + bool + depends on PPC64 + default y + +config LOCKDEP_SUPPORT + bool + default y + config RWSEM_GENERIC_SPINLOCK bool diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 13019845536b..c0db5b769e55 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -30,6 +30,7 @@ #include #include #include +#include /* * System calls. @@ -89,6 +90,14 @@ system_call_common: addi r9,r1,STACK_FRAME_OVERHEAD ld r11,exception_marker@toc(r2) std r11,-16(r9) /* "regshere" marker */ +#ifdef CONFIG_TRACE_IRQFLAGS + bl .trace_hardirqs_on + REST_GPR(0,r1) + REST_4GPRS(3,r1) + REST_2GPRS(7,r1) + addi r9,r1,STACK_FRAME_OVERHEAD + ld r12,_MSR(r1) +#endif /* CONFIG_TRACE_IRQFLAGS */ li r10,1 stb r10,PACASOFTIRQEN(r13) stb r10,PACAHARDIRQEN(r13) @@ -103,7 +112,7 @@ BEGIN_FW_FTR_SECTION b hardware_interrupt_entry 2: END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) -#endif +#endif /* CONFIG_PPC_ISERIES */ mfmsr r11 ori r11,r11,MSR_EE mtmsrd r11,1 @@ -505,6 +514,10 @@ BEGIN_FW_FTR_SECTION li r3,0 stb r3,PACASOFTIRQEN(r13) /* ensure we are soft-disabled */ +#ifdef CONFIG_TRACE_IRQFLAGS + bl .trace_hardirqs_off + mfmsr r10 +#endif ori r10,r10,MSR_EE mtmsrd r10 /* hard-enable again */ addi r3,r1,STACK_FRAME_OVERHEAD @@ -513,7 +526,7 @@ BEGIN_FW_FTR_SECTION 4: END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) #endif - stb r5,PACASOFTIRQEN(r13) + TRACE_AND_RESTORE_IRQ(r5); /* extract EE bit and use it to restore paca->hard_enabled */ ld r3,_MSR(r1) @@ -581,6 +594,16 @@ do_work: bne restore /* here we are preempting the current task */ 1: +#ifdef CONFIG_TRACE_IRQFLAGS + bl .trace_hardirqs_on + /* Note: we just clobbered r10 which used to contain the previous + * MSR before the hard-disabling done by the caller of do_work. + * We don't have that value anymore, but it doesn't matter as + * we will hard-enable unconditionally, we can just reload the + * current MSR into r10 + */ + mfmsr r10 +#endif /* CONFIG_TRACE_IRQFLAGS */ li r0,1 stb r0,PACASOFTIRQEN(r13) stb r0,PACAHARDIRQEN(r13) diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 44229c3749ac..215973a2c8d5 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -36,8 +36,7 @@ #include #include #include - -#define DO_SOFT_DISABLE +#include /* * We layout physical memory as follows: @@ -450,8 +449,8 @@ bad_stack: */ fast_exc_return_irq: /* restores irq state too */ ld r3,SOFTE(r1) + TRACE_AND_RESTORE_IRQ(r3); ld r12,_MSR(r1) - stb r3,PACASOFTIRQEN(r13) /* restore paca->soft_enabled */ rldicl r4,r12,49,63 /* get MSR_EE to LSB */ stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */ b 1f @@ -824,7 +823,7 @@ _STATIC(load_up_altivec) * Hash table stuff */ .align 7 -_GLOBAL(do_hash_page) +_STATIC(do_hash_page) std r3,_DAR(r1) std r4,_DSISR(r1) @@ -835,6 +834,27 @@ BEGIN_FTR_SECTION bne- do_ste_alloc /* If so handle it */ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) + /* + * On iSeries, we soft-disable interrupts here, then + * hard-enable interrupts so that the hash_page code can spin on + * the hash_table_lock without problems on a shared processor. + */ + DISABLE_INTS + + /* + * Currently, trace_hardirqs_off() will be called by DISABLE_INTS + * and will clobber volatile registers when irq tracing is enabled + * so we need to reload them. It may be possible to be smarter here + * and move the irq tracing elsewhere but let's keep it simple for + * now + */ +#ifdef CONFIG_TRACE_IRQFLAGS + ld r3,_DAR(r1) + ld r4,_DSISR(r1) + ld r5,_TRAP(r1) + ld r12,_MSR(r1) + clrrdi r5,r5,4 +#endif /* CONFIG_TRACE_IRQFLAGS */ /* * We need to set the _PAGE_USER bit if MSR_PR is set or if we are * accessing a userspace segment (even from the kernel). We assume @@ -847,13 +867,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) ori r4,r4,1 /* add _PAGE_PRESENT */ rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ - /* - * On iSeries, we soft-disable interrupts here, then - * hard-enable interrupts so that the hash_page code can spin on - * the hash_table_lock without problems on a shared processor. - */ - DISABLE_INTS - /* * r3 contains the faulting address * r4 contains the required access permissions @@ -864,7 +877,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) bl .hash_page /* build HPTE if possible */ cmpdi r3,0 /* see if hash_page succeeded */ -#ifdef DO_SOFT_DISABLE BEGIN_FW_FTR_SECTION /* * If we had interrupts soft-enabled at the point where the @@ -876,7 +888,7 @@ BEGIN_FW_FTR_SECTION */ beq 13f END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) -#endif + BEGIN_FW_FTR_SECTION /* * Here we have interrupts hard-disabled, so it is sufficient @@ -890,11 +902,12 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) /* * hash_page couldn't handle it, set soft interrupt enable back - * to what it was before the trap. Note that .local_irq_restore + * to what it was before the trap. Note that .raw_local_irq_restore * handles any interrupts pending at this point. */ ld r3,SOFTE(r1) - bl .local_irq_restore + TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f) + bl .raw_local_irq_restore b 11f /* Here we have a page fault that hash_page can't handle. */ @@ -1493,6 +1506,10 @@ _INIT_STATIC(start_here_multiplatform) addi r2,r2,0x4000 add r2,r2,r26 + /* Set initial ptr to current */ + LOAD_REG_IMMEDIATE(r4, init_task) + std r4,PACACURRENT(r13) + /* Do very early kernel initializations, including initial hash table, * stab and slb setup before we turn on relocation. */ diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 4617b65d464d..425616f92d18 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -114,7 +114,7 @@ static inline void set_soft_enabled(unsigned long enable) : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); } -void local_irq_restore(unsigned long en) +void raw_local_irq_restore(unsigned long en) { /* * get_paca()->soft_enabled = en; @@ -174,6 +174,7 @@ void local_irq_restore(unsigned long en) __hard_irq_enable(); } +EXPORT_SYMBOL(raw_local_irq_restore); #endif /* CONFIG_PPC64 */ int show_interrupts(struct seq_file *p, void *v) diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index 5a4c76eada48..b9b765c7d1a7 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c @@ -45,10 +45,6 @@ #include #include -#ifdef CONFIG_PPC64 -EXPORT_SYMBOL(local_irq_restore); -#endif - #ifdef CONFIG_PPC32 extern void transfer_to_handler(void); extern void do_IRQ(struct pt_regs *regs); diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 0205d408d2ed..31ada9fdfc5c 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -178,6 +179,9 @@ void __init early_setup(unsigned long dt_ptr) /* Enable early debugging if any specified (see udbg.h) */ udbg_early_init(); + /* Initialize lockdep early or else spinlocks will blow */ + lockdep_init(); + DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); /* diff --git a/include/asm-powerpc/exception.h b/include/asm-powerpc/exception.h index 39abdb02fdef..329148b5acc6 100644 --- a/include/asm-powerpc/exception.h +++ b/include/asm-powerpc/exception.h @@ -228,18 +228,18 @@ label##_pSeries: \ BEGIN_FW_FTR_SECTION; \ stb r11,PACAHARDIRQEN(r13); \ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \ + TRACE_DISABLE_INTS; \ BEGIN_FW_FTR_SECTION; \ mfmsr r10; \ ori r10,r10,MSR_EE; \ mtmsrd r10,1; \ END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) - #else #define DISABLE_INTS \ li r11,0; \ stb r11,PACASOFTIRQEN(r13); \ - stb r11,PACAHARDIRQEN(r13) - + stb r11,PACAHARDIRQEN(r13); \ + TRACE_DISABLE_INTS #endif /* CONFIG_PPC_ISERIES */ #define ENABLE_INTS \ diff --git a/include/asm-powerpc/hw_irq.h b/include/asm-powerpc/hw_irq.h index a7b60bf639e0..ad8c9f7fd0e3 100644 --- a/include/asm-powerpc/hw_irq.h +++ b/include/asm-powerpc/hw_irq.h @@ -27,7 +27,7 @@ static inline unsigned long local_get_flags(void) return flags; } -static inline unsigned long local_irq_disable(void) +static inline unsigned long raw_local_irq_disable(void) { unsigned long flags, zero; @@ -39,14 +39,15 @@ static inline unsigned long local_irq_disable(void) return flags; } -extern void local_irq_restore(unsigned long); +extern void raw_local_irq_restore(unsigned long); extern void iseries_handle_interrupts(void); -#define local_irq_enable() local_irq_restore(1) -#define local_save_flags(flags) ((flags) = local_get_flags()) -#define local_irq_save(flags) ((flags) = local_irq_disable()) +#define raw_local_irq_enable() raw_local_irq_restore(1) +#define raw_local_save_flags(flags) ((flags) = local_get_flags()) +#define raw_local_irq_save(flags) ((flags) = raw_local_irq_disable()) -#define irqs_disabled() (local_get_flags() == 0) +#define raw_irqs_disabled() (local_get_flags() == 0) +#define raw_irqs_disabled_flags(flags) ((flags) == 0) #define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1) #define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1) diff --git a/include/asm-powerpc/irqflags.h b/include/asm-powerpc/irqflags.h index 7970cbaeaa54..cc6fdba33660 100644 --- a/include/asm-powerpc/irqflags.h +++ b/include/asm-powerpc/irqflags.h @@ -2,30 +2,43 @@ * include/asm-powerpc/irqflags.h * * IRQ flags handling - * - * This file gets included from lowlevel asm headers too, to provide - * wrapped versions of the local_irq_*() APIs, based on the - * raw_local_irq_*() macros from the lowlevel headers. */ #ifndef _ASM_IRQFLAGS_H #define _ASM_IRQFLAGS_H +#ifndef __ASSEMBLY__ /* * Get definitions for raw_local_save_flags(x), etc. */ #include +#else +#ifdef CONFIG_TRACE_IRQFLAGS /* - * Do the CPU's IRQ-state tracing from assembly code. We call a - * C function, so save all the C-clobbered registers: + * Most of the CPU's IRQ-state tracing is done from assembly code; we + * have to call a C function so call a wrapper that saves all the + * C-clobbered registers. */ -#ifdef CONFIG_TRACE_IRQFLAGS - -#error No support on PowerPC yet for CONFIG_TRACE_IRQFLAGS - +#define TRACE_ENABLE_INTS bl .trace_hardirqs_on +#define TRACE_DISABLE_INTS bl .trace_hardirqs_off +#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) \ + cmpdi en, 0; \ + bne 95f; \ + stb en,PACASOFTIRQEN(r13); \ + bl .trace_hardirqs_off; \ + b skip; \ +95: bl .trace_hardirqs_on; \ + li en,1; +#define TRACE_AND_RESTORE_IRQ(en) \ + TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f); \ +96: stb en,PACASOFTIRQEN(r13) #else -# define TRACE_IRQS_ON -# define TRACE_IRQS_OFF +#define TRACE_ENABLE_INTS +#define TRACE_DISABLE_INTS +#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) +#define TRACE_AND_RESTORE_IRQ(en) \ + stb en,PACASOFTIRQEN(r13) +#endif #endif #endif diff --git a/include/asm-powerpc/rwsem.h b/include/asm-powerpc/rwsem.h index cefc14728cc5..a6cc93b78b98 100644 --- a/include/asm-powerpc/rwsem.h +++ b/include/asm-powerpc/rwsem.h @@ -32,11 +32,20 @@ struct rw_semaphore { #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) spinlock_t wait_lock; struct list_head wait_list; +#ifdef CONFIG_DEBUG_LOCK_ALLOC + struct lockdep_map dep_map; +#endif }; +#ifdef CONFIG_DEBUG_LOCK_ALLOC +# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } +#else +# define __RWSEM_DEP_MAP_INIT(lockname) +#endif + #define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ - LIST_HEAD_INIT((name).wait_list) } + { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ + LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) } #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) @@ -46,12 +55,15 @@ extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} +extern void __init_rwsem(struct rw_semaphore *sem, const char *name, + struct lock_class_key *key); + +#define init_rwsem(sem) \ + do { \ + static struct lock_class_key __key; \ + \ + __init_rwsem((sem), #sem, &__key); \ + } while (0) /* * lock for reading @@ -78,7 +90,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) /* * lock for writing */ -static inline void __down_write(struct rw_semaphore *sem) +static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) { int tmp; @@ -88,6 +100,11 @@ static inline void __down_write(struct rw_semaphore *sem) rwsem_down_write_failed(sem); } +static inline void __down_write(struct rw_semaphore *sem) +{ + __down_write_nested(sem, 0); +} + static inline int __down_write_trylock(struct rw_semaphore *sem) { int tmp; diff --git a/include/asm-powerpc/spinlock.h b/include/asm-powerpc/spinlock.h index cc4cfceac67c..258c93993190 100644 --- a/include/asm-powerpc/spinlock.h +++ b/include/asm-powerpc/spinlock.h @@ -19,6 +19,7 @@ * * (the type definitions are in asm/spinlock_types.h) */ +#include #ifdef CONFIG_PPC64 #include #include -- cgit v1.2.3 From 9f264be6101c42cb9e471c58322fb83a5cde1461 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Fri, 18 Apr 2008 14:26:08 +1000 Subject: [POWERPC] Optimize fls64() on 64-bit processors 64-bit powerpc processors can find the leftmost 1 bit in a 64-bit doubleword in one instruction, so use that rather than using the generic fls64(), which does two 32-bit fls() calls. Signed-off-by: Paul Mackerras --- include/asm-powerpc/bitops.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h index 36c8f3a43792..a99a74929475 100644 --- a/include/asm-powerpc/bitops.h +++ b/include/asm-powerpc/bitops.h @@ -312,7 +312,24 @@ static __inline__ int fls(unsigned int x) asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); return 32 - lz; } + +/* + * 64-bit can do this using one cntlzd (count leading zeroes doubleword) + * instruction; for 32-bit we use the generic version, which does two + * 32-bit fls calls. + */ +#ifdef __powerpc64__ +static __inline__ int fls64(__u64 x) +{ + int lz; + + asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); + return 64 - lz; +} +#else #include +#endif /* __powerpc64__ */ + #include #include -- cgit v1.2.3 From 14b3ca4022f050f8622ed282b734ddf445464583 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Sun, 20 Apr 2008 17:57:10 +1000 Subject: [POWERPC] Fix compile breakage for 64-bit UP configs The rearrangements in 945feb174b14e7098cc7ecf0cf4768d35bc52f9c ("[POWERPC] irqtrace support for 64-bit powerpc") caused 64-bit non-SMP configs to fail to compile with a message about local_irq_save being undefined in include/linux/proportions.h. This follows the lead of x86 in including in asm/system.h, which fixes the problem. Signed-off-by: Paul Mackerras --- include/asm-powerpc/system.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index 29552ff182aa..fab1674b31b6 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -5,6 +5,7 @@ #define _ASM_POWERPC_SYSTEM_H #include +#include #include -- cgit v1.2.3