From f2e52cd17622eed39576f113b77bbd18c577e308 Mon Sep 17 00:00:00 2001 From: Manu Abraham Date: Mon, 19 Nov 2007 16:44:47 -0300 Subject: V4L/DVB (9442): Revert back previous change to 90MHz Note: * At High Symbol Rates we do not have enouph machine cycles to handle the incoming symbols and hence might run into problems at the very end of the specified definition * Most of the equations have been calculated for a master clock of 99 MHz, running at 90MHz, raises lot of issues such as the need to recalculate all of them , which is eventually very painful. Signed-off-by: Manu Abraham Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb/ttpci/budget-ci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/media/dvb/ttpci/budget-ci.c') diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c index 2a1b79d67b6d..3507463fdac9 100644 --- a/drivers/media/dvb/ttpci/budget-ci.c +++ b/drivers/media/dvb/ttpci/budget-ci.c @@ -1154,7 +1154,7 @@ static const struct stb0899_s1_reg tt3200_stb0899_s1_init_1[] = { { STB0899_GPIO37CFG , 0x82 }, { STB0899_GPIO38CFG , 0x82 }, { STB0899_GPIO39CFG , 0x82 }, - { STB0899_NCOARSE , 0x13 }, /* 0x13 = 27 Mhz Clock, F/3 = 180MHz, F/6 = 90MHz */ + { STB0899_NCOARSE , 0x15 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */ { STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */ { STB0899_FILTCTRL , 0x00 }, { STB0899_SYSCTRL , 0x00 }, -- cgit v1.2.3