From 10626c32e3827bca560217966f5bd586c4e91584 Mon Sep 17 00:00:00 2001 From: Alan Kao Date: Mon, 18 Dec 2017 17:52:48 +0800 Subject: riscv/ftrace: Add basic support This patch contains basic ftrace support for RV64I platform. Specifically, function tracer (HAVE_FUNCTION_TRACER), function graph tracer (HAVE_FUNCTION_GRAPH_TRACER), and a frame pointer test (HAVE_FUNCTION_GRAPH_FP_TEST) are implemented following the instructions in Documentation/trace/ftrace-design.txt. Note that the functions in both ftrace.c and setup.c should not be hooked with the compiler's -pg option: to prevent infinite self- referencing for the former, and to ignore early setup stuff for the latter. Signed-off-by: Alan Kao Signed-off-by: Palmer Dabbelt --- arch/riscv/include/asm/Kbuild | 1 - arch/riscv/include/asm/ftrace.h | 10 ++++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/include/asm/ftrace.h (limited to 'arch/riscv/include') diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild index 970460a0b492..b44a42499860 100644 --- a/arch/riscv/include/asm/Kbuild +++ b/arch/riscv/include/asm/Kbuild @@ -12,7 +12,6 @@ generic-y += errno.h generic-y += exec.h generic-y += fb.h generic-y += fcntl.h -generic-y += ftrace.h generic-y += futex.h generic-y += hardirq.h generic-y += hash.h diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h new file mode 100644 index 000000000000..66d4175eb13e --- /dev/null +++ b/arch/riscv/include/asm/ftrace.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2017 Andes Technology Corporation */ + +/* + * The graph frame test is not possible if CONFIG_FRAME_POINTER is not enabled. + * Check arch/riscv/kernel/mcount.S for detail. + */ +#if defined(CONFIG_FUNCTION_GRAPH_TRACER) && defined(CONFIG_FRAME_POINTER) +#define HAVE_FUNCTION_GRAPH_FP_TEST +#endif -- cgit v1.2.3 From 0b5030c8c0520ec310bf8ca8f16d56541e80cf5c Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Thu, 25 Jan 2018 11:00:00 +0100 Subject: riscv: remove unused __ARCH_HAVE_MMU define The __ARCH_HAVE_MMU define is (and was) used nowhere in the tree and also doesn't appear to be used by any libc. Signed-off-by: Tobias Klauser Signed-off-by: Palmer Dabbelt --- arch/riscv/include/asm/unistd.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/riscv/include') diff --git a/arch/riscv/include/asm/unistd.h b/arch/riscv/include/asm/unistd.h index 2f704a5c4196..080fb28061de 100644 --- a/arch/riscv/include/asm/unistd.h +++ b/arch/riscv/include/asm/unistd.h @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#define __ARCH_HAVE_MMU #define __ARCH_WANT_SYS_CLONE #include #include -- cgit v1.2.3 From f1b65f20fb05d1dd94656904848b96cc6df52bc0 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Thu, 26 Oct 2017 01:53:40 -0700 Subject: RISC-V: Limit the scope of TLB shootdowns RISC-V systems perform TLB shootdows via the SBI, which currently performs an IPI to each of the remote harts which then performs a local TLB flush. This process is a bit on the slow side, but we can at least speed it up for some common cases by restricting the set of harts to shoot down to the actual set of harts that are currently participating in the given mm context, as opposed to the entire system. This should provide a measurable performance increase, but we haven't measured it. Regardless, it seems like obviously the right thing to do here. Signed-off-by: Andrew Waterman Signed-off-by: Palmer Dabbelt --- arch/riscv/include/asm/tlbflush.h | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) (limited to 'arch/riscv/include') diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h index 7b9c24ebdf52..7b209aec355d 100644 --- a/arch/riscv/include/asm/tlbflush.h +++ b/arch/riscv/include/asm/tlbflush.h @@ -36,7 +36,14 @@ static inline void local_flush_tlb_page(unsigned long addr) #define flush_tlb_all() local_flush_tlb_all() #define flush_tlb_page(vma, addr) local_flush_tlb_page(addr) -#define flush_tlb_range(vma, start, end) local_flush_tlb_all() + +static inline void flush_tlb_range(struct vm_area_struct *vma, + unsigned long start, unsigned long end) +{ + local_flush_tlb_all(); +} + +#define flush_tlb_mm(mm) flush_tlb_all() #else /* CONFIG_SMP */ @@ -45,16 +52,13 @@ static inline void local_flush_tlb_page(unsigned long addr) #define flush_tlb_all() sbi_remote_sfence_vma(0, 0, -1) #define flush_tlb_page(vma, addr) flush_tlb_range(vma, addr, 0) #define flush_tlb_range(vma, start, end) \ - sbi_remote_sfence_vma(0, start, (end) - (start)) + sbi_remote_sfence_vma(mm_cpumask((vma)->vm_mm)->bits, \ + start, (end) - (start)) +#define flush_tlb_mm(mm) \ + sbi_remote_sfence_vma(mm_cpumask(mm)->bits, 0, -1) #endif /* CONFIG_SMP */ -/* Flush the TLB entries of the specified mm context */ -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - flush_tlb_all(); -} - /* Flush a range of kernel pages */ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) -- cgit v1.2.3 From 0ca7a0b7c13ecafd12b37a6793d3e302dfea0475 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 9 Jan 2018 15:00:33 +0100 Subject: riscv: remove the unused current_pgdir function Signed-off-by: Christoph Hellwig Signed-off-by: Palmer Dabbelt --- arch/riscv/include/asm/mmu_context.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/riscv/include') diff --git a/arch/riscv/include/asm/mmu_context.h b/arch/riscv/include/asm/mmu_context.h index 97424834dce2..082ef8652ac7 100644 --- a/arch/riscv/include/asm/mmu_context.h +++ b/arch/riscv/include/asm/mmu_context.h @@ -39,11 +39,6 @@ static inline void destroy_context(struct mm_struct *mm) { } -static inline pgd_t *current_pgdir(void) -{ - return pfn_to_virt(csr_read(sptbr) & SPTBR_PPN); -} - static inline void set_pgdir(pgd_t *pgd) { csr_write(sptbr, virt_to_pfn(pgd) | SPTBR_MODE); -- cgit v1.2.3 From 7549cdf59d9fafbaab42650375c29c64c16aa270 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 9 Jan 2018 15:00:32 +0100 Subject: riscv: rename sptbr to satp satp is the name used by the current privileged spec 1.10, use it instead of the old name. The most recent release binutils release (2.29) doesn't know about the satp name yet, so stick to the name from the previous privileged ISA release and comment on the fact. Signed-off-by: Christoph Hellwig Signed-off-by: Palmer Dabbelt --- arch/riscv/include/asm/csr.h | 14 +++++++------- arch/riscv/include/asm/mmu_context.h | 7 ++++++- arch/riscv/kernel/head.S | 6 +++--- arch/riscv/mm/fault.c | 4 ++++ 4 files changed, 20 insertions(+), 11 deletions(-) (limited to 'arch/riscv/include') diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 3c7a2c97e377..421fa3585798 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -40,15 +40,15 @@ #define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */ #endif -/* SPTBR flags */ +/* SATP flags */ #if __riscv_xlen == 32 -#define SPTBR_PPN _AC(0x003FFFFF, UL) -#define SPTBR_MODE_32 _AC(0x80000000, UL) -#define SPTBR_MODE SPTBR_MODE_32 +#define SATP_PPN _AC(0x003FFFFF, UL) +#define SATP_MODE_32 _AC(0x80000000, UL) +#define SATP_MODE SATP_MODE_32 #else -#define SPTBR_PPN _AC(0x00000FFFFFFFFFFF, UL) -#define SPTBR_MODE_39 _AC(0x8000000000000000, UL) -#define SPTBR_MODE SPTBR_MODE_39 +#define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL) +#define SATP_MODE_39 _AC(0x8000000000000000, UL) +#define SATP_MODE SATP_MODE_39 #endif /* Interrupt Enable and Interrupt Pending flags */ diff --git a/arch/riscv/include/asm/mmu_context.h b/arch/riscv/include/asm/mmu_context.h index 082ef8652ac7..d30f0c54b8b2 100644 --- a/arch/riscv/include/asm/mmu_context.h +++ b/arch/riscv/include/asm/mmu_context.h @@ -41,7 +41,12 @@ static inline void destroy_context(struct mm_struct *mm) static inline void set_pgdir(pgd_t *pgd) { - csr_write(sptbr, virt_to_pfn(pgd) | SPTBR_MODE); + /* + * Use the old spbtr name instead of using the current satp + * name to support binutils 2.29 which doesn't know about the + * privileged ISA 1.10 yet. + */ + csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE); } /* diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 78f670d70133..226eeb190f90 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -74,15 +74,15 @@ relocate: sub a1, a1, a0 add ra, ra, a1 - /* Point stvec to virtual address of intruction after sptbr write */ + /* Point stvec to virtual address of intruction after satp write */ la a0, 1f add a0, a0, a1 csrw stvec, a0 - /* Compute sptbr for kernel page tables, but don't load it yet */ + /* Compute satp for kernel page tables, but don't load it yet */ la a2, swapper_pg_dir srl a2, a2, PAGE_SHIFT - li a1, SPTBR_MODE + li a1, SATP_MODE or a2, a2, a1 /* diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c index 0713f3c67ab4..06c5621970ae 100644 --- a/arch/riscv/mm/fault.c +++ b/arch/riscv/mm/fault.c @@ -239,6 +239,10 @@ vmalloc_fault: * Do _not_ use "tsk->active_mm->pgd" here. * We might be inside an interrupt in the middle * of a task switch. + * + * Note: Use the old spbtr name instead of using the current + * satp name to support binutils 2.29 which doesn't know about + * the privileged ISA 1.10 yet. */ index = pgd_index(addr); pgd = (pgd_t *)pfn_to_virt(csr_read(sptbr)) + index; -- cgit v1.2.3 From 4889dec6c87d90619cc1e8436327b91f4bb0e467 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 9 Jan 2018 15:00:34 +0100 Subject: riscv: inline set_pgdir into its only caller Signed-off-by: Christoph Hellwig Signed-off-by: Palmer Dabbelt --- arch/riscv/include/asm/mmu_context.h | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) (limited to 'arch/riscv/include') diff --git a/arch/riscv/include/asm/mmu_context.h b/arch/riscv/include/asm/mmu_context.h index d30f0c54b8b2..336d60ec5698 100644 --- a/arch/riscv/include/asm/mmu_context.h +++ b/arch/riscv/include/asm/mmu_context.h @@ -39,16 +39,6 @@ static inline void destroy_context(struct mm_struct *mm) { } -static inline void set_pgdir(pgd_t *pgd) -{ - /* - * Use the old spbtr name instead of using the current satp - * name to support binutils 2.29 which doesn't know about the - * privileged ISA 1.10 yet. - */ - csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE); -} - /* * When necessary, performs a deferred icache flush for the given MM context, * on the local CPU. RISC-V has no direct mechanism for instruction cache @@ -93,7 +83,12 @@ static inline void switch_mm(struct mm_struct *prev, cpumask_clear_cpu(cpu, mm_cpumask(prev)); cpumask_set_cpu(cpu, mm_cpumask(next)); - set_pgdir(next->pgd); + /* + * Use the old spbtr name instead of using the current satp + * name to support binutils 2.29 which doesn't know about the + * privileged ISA 1.10 yet. + */ + csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE); local_flush_tlb_all(); flush_icache_deferred(next); -- cgit v1.2.3