From 2a7069190e7a7f19bd37e8c08e2bf02c8d6330f7 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 26 Mar 2008 22:39:50 +1100 Subject: [POWERPC] 4xx: Add PPC4xx L2-cache support (440GX) This patch adds support for the 256k L2 cache found on some IBM/AMCC 4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c) which currently "only" adds the L2 cache init code. Other common 4xx stuff can be added later here. The L2 cache handling code is a copy of Eugene's code in arch/ppc with small modifications. Tested on AMCC Taishan 440GX. Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/sysdev/ppc4xx_soc.c | 189 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 189 insertions(+) create mode 100644 arch/powerpc/sysdev/ppc4xx_soc.c (limited to 'arch/powerpc/sysdev/ppc4xx_soc.c') diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c new file mode 100644 index 000000000000..4b8617e44314 --- /dev/null +++ b/arch/powerpc/sysdev/ppc4xx_soc.c @@ -0,0 +1,189 @@ +/* + * IBM/AMCC PPC4xx SoC setup code + * + * Copyright 2008 DENX Software Engineering, Stefan Roese + * + * L2 cache routines cloned from arch/ppc/syslib/ibm440gx_common.c which is: + * Eugene Surovegin or + * Copyright (c) 2003 - 2006 Zultys Technologies + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static u32 dcrbase_l2c; + +/* + * L2-cache + */ + +/* Issue L2C diagnostic command */ +static inline u32 l2c_diag(u32 addr) +{ + mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, addr); + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_DIAG); + while (!(mfdcr(dcrbase_l2c + DCRN_L2C0_SR) & L2C_SR_CC)) + ; + + return mfdcr(dcrbase_l2c + DCRN_L2C0_DATA); +} + +static irqreturn_t l2c_error_handler(int irq, void *dev) +{ + u32 sr = mfdcr(dcrbase_l2c + DCRN_L2C0_SR); + + if (sr & L2C_SR_CPE) { + /* Read cache trapped address */ + u32 addr = l2c_diag(0x42000000); + printk(KERN_EMERG "L2C: Cache Parity Error, addr[16:26] = 0x%08x\n", + addr); + } + if (sr & L2C_SR_TPE) { + /* Read tag trapped address */ + u32 addr = l2c_diag(0x82000000) >> 16; + printk(KERN_EMERG "L2C: Tag Parity Error, addr[16:26] = 0x%08x\n", + addr); + } + + /* Clear parity errors */ + if (sr & (L2C_SR_CPE | L2C_SR_TPE)){ + mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, 0); + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); + } else { + printk(KERN_EMERG "L2C: LRU error\n"); + } + + return IRQ_HANDLED; +} + +static int __init ppc4xx_l2c_probe(void) +{ + struct device_node *np; + u32 r; + unsigned long flags; + int irq; + const u32 *dcrreg; + u32 dcrbase_isram; + int len; + const u32 *prop; + u32 l2_size; + + np = of_find_compatible_node(NULL, NULL, "ibm,l2-cache"); + if (!np) + return 0; + + /* Get l2 cache size */ + prop = of_get_property(np, "cache-size", NULL); + if (prop == NULL) { + printk(KERN_ERR "%s: Can't get cache-size!\n", np->full_name); + of_node_put(np); + return -ENODEV; + } + l2_size = prop[0]; + + /* Map DCRs */ + dcrreg = of_get_property(np, "dcr-reg", &len); + if (!dcrreg || (len != 4 * sizeof(u32))) { + printk(KERN_ERR "%s: Can't get DCR register base !", + np->full_name); + of_node_put(np); + return -ENODEV; + } + dcrbase_isram = dcrreg[0]; + dcrbase_l2c = dcrreg[2]; + + /* Get and map irq number from device tree */ + irq = irq_of_parse_and_map(np, 0); + if (irq == NO_IRQ) { + printk(KERN_ERR "irq_of_parse_and_map failed\n"); + of_node_put(np); + return -ENODEV; + } + + /* Install error handler */ + if (request_irq(irq, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0) { + printk(KERN_ERR "Cannot install L2C error handler" + ", cache is not enabled\n"); + of_node_put(np); + return -ENODEV; + } + + local_irq_save(flags); + asm volatile ("sync" ::: "memory"); + + /* Disable SRAM */ + mtdcr(dcrbase_isram + DCRN_SRAM0_DPC, + mfdcr(dcrbase_isram + DCRN_SRAM0_DPC) & ~SRAM_DPC_ENABLE); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB0CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB0CR) & ~SRAM_SBCR_BU_MASK); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB1CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB1CR) & ~SRAM_SBCR_BU_MASK); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB2CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB2CR) & ~SRAM_SBCR_BU_MASK); + mtdcr(dcrbase_isram + DCRN_SRAM0_SB3CR, + mfdcr(dcrbase_isram + DCRN_SRAM0_SB3CR) & ~SRAM_SBCR_BU_MASK); + + /* Enable L2_MODE without ICU/DCU */ + r = mfdcr(dcrbase_l2c + DCRN_L2C0_CFG) & + ~(L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_SS_MASK); + r |= L2C_CFG_L2M | L2C_CFG_SS_256; + mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); + + mtdcr(dcrbase_l2c + DCRN_L2C0_ADDR, 0); + + /* Hardware Clear Command */ + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_HCC); + while (!(mfdcr(dcrbase_l2c + DCRN_L2C0_SR) & L2C_SR_CC)) + ; + + /* Clear Cache Parity and Tag Errors */ + mtdcr(dcrbase_l2c + DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); + + /* Enable 64G snoop region starting at 0 */ + r = mfdcr(dcrbase_l2c + DCRN_L2C0_SNP0) & + ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK); + r |= L2C_SNP_SSR_32G | L2C_SNP_ESR; + mtdcr(dcrbase_l2c + DCRN_L2C0_SNP0, r); + + r = mfdcr(dcrbase_l2c + DCRN_L2C0_SNP1) & + ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK); + r |= 0x80000000 | L2C_SNP_SSR_32G | L2C_SNP_ESR; + mtdcr(dcrbase_l2c + DCRN_L2C0_SNP1, r); + + asm volatile ("sync" ::: "memory"); + + /* Enable ICU/DCU ports */ + r = mfdcr(dcrbase_l2c + DCRN_L2C0_CFG); + r &= ~(L2C_CFG_DCW_MASK | L2C_CFG_PMUX_MASK | L2C_CFG_PMIM + | L2C_CFG_TPEI | L2C_CFG_CPEI | L2C_CFG_NAM | L2C_CFG_NBRM); + r |= L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_TPC | L2C_CFG_CPC | L2C_CFG_FRAN + | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; + + /* Check for 460EX/GT special handling */ + if (of_device_is_compatible(np, "ibm,l2-cache-460ex")) + r |= L2C_CFG_RDBW; + + mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); + + asm volatile ("sync; isync" ::: "memory"); + local_irq_restore(flags); + + printk(KERN_INFO "%dk L2-cache enabled\n", l2_size >> 10); + + of_node_put(np); + return 0; +} +arch_initcall(ppc4xx_l2c_probe); -- cgit v1.2.3 From 93173ce272e54f81460986ff5040d16ab79488a9 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 28 Mar 2008 01:43:31 +1100 Subject: [POWERPC] 4xx: Create common ppc4xx_reset_system() in ppc4xx_soc.c This patch creates a common system reset routine for all 40x and 44x systems. Previously only a 44x routine existed. But since this system reset via the debug control register is common for 40x and 44x let's share this code for all those platforms in ppc4xx_soc.c. This patch also enables CONFIG_4xx_SOC for all 40x and 44x platforms. Tested on Kilauea (405EX) and Canyonlands (440EX). Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/platforms/40x/ep405.c | 2 ++ arch/powerpc/platforms/40x/kilauea.c | 4 +++- arch/powerpc/platforms/40x/makalu.c | 2 ++ arch/powerpc/platforms/40x/virtex.c | 2 ++ arch/powerpc/platforms/40x/walnut.c | 4 +++- arch/powerpc/platforms/44x/44x.h | 1 - arch/powerpc/platforms/44x/Kconfig | 1 - arch/powerpc/platforms/44x/bamboo.c | 15 +++++++-------- arch/powerpc/platforms/44x/canyonlands.c | 5 ++--- arch/powerpc/platforms/44x/ebony.c | 5 ++--- arch/powerpc/platforms/44x/katmai.c | 5 ++--- arch/powerpc/platforms/44x/misc_44x.S | 11 ----------- arch/powerpc/platforms/44x/rainier.c | 4 ++-- arch/powerpc/platforms/44x/sequoia.c | 4 ++-- arch/powerpc/platforms/44x/taishan.c | 5 ++--- arch/powerpc/platforms/44x/warp.c | 6 ++---- arch/powerpc/platforms/Kconfig.cputype | 2 ++ arch/powerpc/sysdev/ppc4xx_soc.c | 11 +++++++++++ include/asm-powerpc/ppc4xx.h | 18 ++++++++++++++++++ 19 files changed, 64 insertions(+), 43 deletions(-) create mode 100644 include/asm-powerpc/ppc4xx.h (limited to 'arch/powerpc/sysdev/ppc4xx_soc.c') diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c index 13d1345026da..ae2e7f67c18e 100644 --- a/arch/powerpc/platforms/40x/ep405.c +++ b/arch/powerpc/platforms/40x/ep405.c @@ -29,6 +29,7 @@ #include #include #include +#include static struct device_node *bcsr_node; static void __iomem *bcsr_regs; @@ -119,5 +120,6 @@ define_machine(ep405) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c index f9206a7fede0..1dd24ffc0dc1 100644 --- a/arch/powerpc/platforms/40x/kilauea.c +++ b/arch/powerpc/platforms/40x/kilauea.c @@ -1,7 +1,7 @@ /* * Kilauea board specific routines * - * Copyright 2007 DENX Software Engineering, Stefan Roese + * Copyright 2007-2008 DENX Software Engineering, Stefan Roese * * Based on the Walnut code by * Josh Boyer @@ -20,6 +20,7 @@ #include #include #include +#include static __initdata struct of_device_id kilauea_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -54,5 +55,6 @@ define_machine(kilauea) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/makalu.c b/arch/powerpc/platforms/40x/makalu.c index 4e4df72fc9cd..a6a1d6017b71 100644 --- a/arch/powerpc/platforms/40x/makalu.c +++ b/arch/powerpc/platforms/40x/makalu.c @@ -20,6 +20,7 @@ #include #include #include +#include static __initdata struct of_device_id makalu_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -54,5 +55,6 @@ define_machine(makalu) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c index 0422590040db..fc7fb001276c 100644 --- a/arch/powerpc/platforms/40x/virtex.c +++ b/arch/powerpc/platforms/40x/virtex.c @@ -14,6 +14,7 @@ #include #include #include +#include static struct of_device_id xilinx_of_bus_ids[] __initdata = { { .compatible = "xlnx,plb-v46-1.00.a", }, @@ -48,5 +49,6 @@ define_machine(virtex) { .probe = virtex_probe, .init_IRQ = xilinx_intc_init_tree, .get_irq = xilinx_intc_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c index b8b257efeb77..335df91fbee5 100644 --- a/arch/powerpc/platforms/40x/walnut.c +++ b/arch/powerpc/platforms/40x/walnut.c @@ -26,6 +26,7 @@ #include #include #include +#include static __initdata struct of_device_id walnut_of_bus[] = { { .compatible = "ibm,plb3", }, @@ -61,5 +62,6 @@ define_machine(walnut) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .calibrate_decr = generic_calibrate_decr, + .restart = ppc4xx_reset_system, + .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h index 42eabf87fea3..dbc4d2b4301a 100644 --- a/arch/powerpc/platforms/44x/44x.h +++ b/arch/powerpc/platforms/44x/44x.h @@ -3,6 +3,5 @@ extern u8 as1_readb(volatile u8 __iomem *addr); extern void as1_writeb(u8 data, volatile u8 __iomem *addr); -extern void ppc44x_reset_system(char *cmd); #endif /* __POWERPC_PLATFORMS_44X_44X_H */ diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 5fc28aa459e3..6abe91357eee 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -129,7 +129,6 @@ config 440GP config 440GX bool - select 4xx_SOC select IBM_NEW_EMAC_EMAC4 select IBM_NEW_EMAC_RGMII select IBM_NEW_EMAC_ZMII #test only diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c index fb9a22a7e8d0..cef169e95156 100644 --- a/arch/powerpc/platforms/44x/bamboo.c +++ b/arch/powerpc/platforms/44x/bamboo.c @@ -22,8 +22,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id bamboo_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -53,11 +52,11 @@ static int __init bamboo_probe(void) } define_machine(bamboo) { - .name = "Bamboo", - .probe = bamboo_probe, - .progress = udbg_progress, - .init_IRQ = uic_init_tree, - .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .name = "Bamboo", + .probe = bamboo_probe, + .progress = udbg_progress, + .init_IRQ = uic_init_tree, + .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c index dac5b3203696..3949289f51df 100644 --- a/arch/powerpc/platforms/44x/canyonlands.c +++ b/arch/powerpc/platforms/44x/canyonlands.c @@ -23,8 +23,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id canyonlands_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -59,6 +58,6 @@ define_machine(canyonlands) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c index 1a8d467bff85..a0e8fe4662f6 100644 --- a/arch/powerpc/platforms/44x/ebony.c +++ b/arch/powerpc/platforms/44x/ebony.c @@ -26,8 +26,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id ebony_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -66,6 +65,6 @@ define_machine(ebony) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/katmai.c b/arch/powerpc/platforms/44x/katmai.c index 11134121f272..44f4b3a00ced 100644 --- a/arch/powerpc/platforms/44x/katmai.c +++ b/arch/powerpc/platforms/44x/katmai.c @@ -22,8 +22,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id katmai_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -58,6 +57,6 @@ define_machine(katmai) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/misc_44x.S b/arch/powerpc/platforms/44x/misc_44x.S index 3bce71d5d756..dc12b8009e48 100644 --- a/arch/powerpc/platforms/44x/misc_44x.S +++ b/arch/powerpc/platforms/44x/misc_44x.S @@ -44,14 +44,3 @@ _GLOBAL(as1_writeb) sync isync blr - -/* - * void ppc44x_reset_system(char *cmd) - * - * At present, this routine just applies a system reset. - */ -_GLOBAL(ppc44x_reset_system) - mfspr r13,SPRN_DBCR0 - oris r13,r13,DBCR0_RST_SYSTEM@h - mtspr SPRN_DBCR0,r13 - b . /* Just in case the reset doesn't work */ diff --git a/arch/powerpc/platforms/44x/rainier.c b/arch/powerpc/platforms/44x/rainier.c index a7fae1cf69c1..4f1ff84c4b63 100644 --- a/arch/powerpc/platforms/44x/rainier.c +++ b/arch/powerpc/platforms/44x/rainier.c @@ -22,7 +22,7 @@ #include #include #include -#include "44x.h" +#include static __initdata struct of_device_id rainier_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -57,6 +57,6 @@ define_machine(rainier) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c index d279db42c896..49eb73daacdf 100644 --- a/arch/powerpc/platforms/44x/sequoia.c +++ b/arch/powerpc/platforms/44x/sequoia.c @@ -23,7 +23,7 @@ #include #include -#include "44x.h" +#include static __initdata struct of_device_id sequoia_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -58,6 +58,6 @@ define_machine(sequoia) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/taishan.c b/arch/powerpc/platforms/44x/taishan.c index 28ab7e2e02c3..49c78b2098b4 100644 --- a/arch/powerpc/platforms/44x/taishan.c +++ b/arch/powerpc/platforms/44x/taishan.c @@ -29,8 +29,7 @@ #include #include #include - -#include "44x.h" +#include static __initdata struct of_device_id taishan_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -68,6 +67,6 @@ define_machine(taishan) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index da5b7b7599db..39cf6150a72b 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c @@ -18,9 +18,7 @@ #include #include #include - -#include "44x.h" - +#include static __initdata struct of_device_id warp_of_bus[] = { { .compatible = "ibm,plb4", }, @@ -49,7 +47,7 @@ define_machine(warp) { .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, - .restart = ppc44x_reset_system, + .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, }; diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index 0c3face0ddbb..5fc7fac10e93 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -41,11 +41,13 @@ config 40x bool "AMCC 40x" select PPC_DCR_NATIVE select PPC_UDBG_16550 + select 4xx_SOC config 44x bool "AMCC 44x" select PPC_DCR_NATIVE select PPC_UDBG_16550 + select 4xx_SOC config E200 bool "Freescale e200" diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c index 4b8617e44314..5b32adc9a9b2 100644 --- a/arch/powerpc/sysdev/ppc4xx_soc.c +++ b/arch/powerpc/sysdev/ppc4xx_soc.c @@ -23,6 +23,7 @@ #include #include +#include static u32 dcrbase_l2c; @@ -187,3 +188,13 @@ static int __init ppc4xx_l2c_probe(void) return 0; } arch_initcall(ppc4xx_l2c_probe); + +/* + * At present, this routine just applies a system reset. + */ +void ppc4xx_reset_system(char *cmd) +{ + mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_RST_SYSTEM); + while (1) + ; /* Just in case the reset doesn't work */ +} diff --git a/include/asm-powerpc/ppc4xx.h b/include/asm-powerpc/ppc4xx.h new file mode 100644 index 000000000000..033039a80c42 --- /dev/null +++ b/include/asm-powerpc/ppc4xx.h @@ -0,0 +1,18 @@ +/* + * PPC4xx Prototypes and definitions + * + * Copyright 2008 DENX Software Engineering, Stefan Roese + * + * This is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_POWERPC_PPC4xx_H__ +#define __ASM_POWERPC_PPC4xx_H__ + +extern void ppc4xx_reset_system(char *cmd); + +#endif /* __ASM_POWERPC_PPC4xx_H__ */ -- cgit v1.2.3