From a51da0444ce720ae496ac3a85f8609a37e43c4f5 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sat, 24 Dec 2011 10:52:10 +0900 Subject: ARM: SAMSUNG: cleanup of rtc register definitions regs-rtc.h uses a mixture of tabs and spaces and also (x< Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/regs-rtc.h | 78 +++++++++++---------------- 1 file changed, 32 insertions(+), 46 deletions(-) (limited to 'arch/arm/plat-samsung') diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index 30b7cc14cef5..a7d944f4131e 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h @@ -18,51 +18,37 @@ #define S3C2410_INTP_ALM (1 << 1) #define S3C2410_INTP_TIC (1 << 0) -#define S3C2410_RTCCON S3C2410_RTCREG(0x40) -#define S3C2410_RTCCON_RTCEN (1<<0) -#define S3C2410_RTCCON_CLKSEL (1<<1) -#define S3C2410_RTCCON_CNTSEL (1<<2) -#define S3C2410_RTCCON_CLKRST (1<<3) -#define S3C64XX_RTCCON_TICEN (1<<8) - -#define S3C64XX_RTCCON_TICMSK (0xF<<7) -#define S3C64XX_RTCCON_TICSHT (7) - -#define S3C2410_TICNT S3C2410_RTCREG(0x44) -#define S3C2410_TICNT_ENABLE (1<<7) - -#define S3C2410_RTCALM S3C2410_RTCREG(0x50) -#define S3C2410_RTCALM_ALMEN (1<<6) -#define S3C2410_RTCALM_YEAREN (1<<5) -#define S3C2410_RTCALM_MONEN (1<<4) -#define S3C2410_RTCALM_DAYEN (1<<3) -#define S3C2410_RTCALM_HOUREN (1<<2) -#define S3C2410_RTCALM_MINEN (1<<1) -#define S3C2410_RTCALM_SECEN (1<<0) - -#define S3C2410_RTCALM_ALL \ - S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\ - S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\ - S3C2410_RTCALM_SECEN - - -#define S3C2410_ALMSEC S3C2410_RTCREG(0x54) -#define S3C2410_ALMMIN S3C2410_RTCREG(0x58) -#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) - -#define S3C2410_ALMDATE S3C2410_RTCREG(0x60) -#define S3C2410_ALMMON S3C2410_RTCREG(0x64) -#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68) - -#define S3C2410_RTCRST S3C2410_RTCREG(0x6c) - -#define S3C2410_RTCSEC S3C2410_RTCREG(0x70) -#define S3C2410_RTCMIN S3C2410_RTCREG(0x74) -#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78) -#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c) -#define S3C2410_RTCDAY S3C2410_RTCREG(0x80) -#define S3C2410_RTCMON S3C2410_RTCREG(0x84) -#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) - +#define S3C2410_RTCCON S3C2410_RTCREG(0x40) +#define S3C2410_RTCCON_RTCEN (1 << 0) +#define S3C2410_RTCCON_CNTSEL (1 << 2) +#define S3C2410_RTCCON_CLKRST (1 << 3) +#define S3C64XX_RTCCON_TICEN (1 << 8) + +#define S3C2410_TICNT S3C2410_RTCREG(0x44) +#define S3C2410_TICNT_ENABLE (1 << 7) + +#define S3C2410_RTCALM S3C2410_RTCREG(0x50) +#define S3C2410_RTCALM_ALMEN (1 << 6) +#define S3C2410_RTCALM_YEAREN (1 << 5) +#define S3C2410_RTCALM_MONEN (1 << 4) +#define S3C2410_RTCALM_DAYEN (1 << 3) +#define S3C2410_RTCALM_HOUREN (1 << 2) +#define S3C2410_RTCALM_MINEN (1 << 1) +#define S3C2410_RTCALM_SECEN (1 << 0) + +#define S3C2410_ALMSEC S3C2410_RTCREG(0x54) +#define S3C2410_ALMMIN S3C2410_RTCREG(0x58) +#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) + +#define S3C2410_ALMDATE S3C2410_RTCREG(0x60) +#define S3C2410_ALMMON S3C2410_RTCREG(0x64) +#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68) + +#define S3C2410_RTCSEC S3C2410_RTCREG(0x70) +#define S3C2410_RTCMIN S3C2410_RTCREG(0x74) +#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78) +#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c) +#define S3C2410_RTCMON S3C2410_RTCREG(0x84) +#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) #endif /* __ASM_ARCH_REGS_RTC_H */ -- cgit v1.2.3 From 25c1a2466008a75955e80df3cc0698410a0cec72 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sat, 24 Dec 2011 10:52:19 +0900 Subject: rtc-s3c: add variants for S3C2443 and S3C2416 Especially the TICNT registers are different from the two rtc types that currently exists. Signed-off-by: Heiko Stuebner Acked-by: Alessandro Zummo Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/regs-rtc.h | 17 ++++++++++++ drivers/rtc/rtc-s3c.c | 40 ++++++++++++++++++++++++--- 2 files changed, 53 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-samsung') diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index a7d944f4131e..0f8263e93eea 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h @@ -22,11 +22,28 @@ #define S3C2410_RTCCON_RTCEN (1 << 0) #define S3C2410_RTCCON_CNTSEL (1 << 2) #define S3C2410_RTCCON_CLKRST (1 << 3) +#define S3C2443_RTCCON_TICSEL (1 << 4) #define S3C64XX_RTCCON_TICEN (1 << 8) #define S3C2410_TICNT S3C2410_RTCREG(0x44) #define S3C2410_TICNT_ENABLE (1 << 7) +/* S3C2443: tick count is 15 bit wide + * TICNT[6:0] contains upper 7 bits + * TICNT1[7:0] contains lower 8 bits + */ +#define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8) +#define S3C2443_TICNT1 S3C2410_RTCREG(0x4C) +#define S3C2443_TICNT1_PART(x) (x & 0xff) + +/* S3C2416: tick count is 32 bit wide + * TICNT[6:0] contains bits [14:8] + * TICNT1[7:0] contains lower 8 bits + * TICNT2[16:0] contains upper 17 bits + */ +#define S3C2416_TICNT2 S3C2410_RTCREG(0x48) +#define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15) + #define S3C2410_RTCALM S3C2410_RTCREG(0x50) #define S3C2410_RTCALM_ALMEN (1 << 6) #define S3C2410_RTCALM_YEAREN (1 << 5) diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index a6f95fb74dd2..78951866f8ab 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c @@ -35,6 +35,8 @@ enum s3c_cpu_type { TYPE_S3C2410, + TYPE_S3C2416, + TYPE_S3C2443, TYPE_S3C64XX, }; @@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq) struct platform_device *pdev = to_platform_device(dev); struct rtc_device *rtc_dev = platform_get_drvdata(pdev); unsigned int tmp = 0; + int val; if (!is_power_of_2(freq)) return -EINVAL; @@ -139,12 +142,22 @@ static int s3c_rtc_setfreq(struct device *dev, int freq) clk_enable(rtc_clk); spin_lock_irq(&s3c_rtc_pie_lock); - if (s3c_rtc_cpu_type == TYPE_S3C2410) { + if (s3c_rtc_cpu_type != TYPE_S3C64XX) { tmp = readb(s3c_rtc_base + S3C2410_TICNT); tmp &= S3C2410_TICNT_ENABLE; } - tmp |= (rtc_dev->max_user_freq / freq)-1; + val = (rtc_dev->max_user_freq / freq) - 1; + + if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) { + tmp |= S3C2443_TICNT_PART(val); + writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1); + + if (s3c_rtc_cpu_type == TYPE_S3C2416) + writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2); + } else { + tmp |= val; + } writel(tmp, s3c_rtc_base + S3C2410_TICNT); spin_unlock_irq(&s3c_rtc_pie_lock); @@ -371,7 +384,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en) tmp &= ~S3C2410_RTCCON_RTCEN; writew(tmp, base + S3C2410_RTCCON); - if (s3c_rtc_cpu_type == TYPE_S3C2410) { + if (s3c_rtc_cpu_type != TYPE_S3C64XX) { tmp = readb(base + S3C2410_TICNT); tmp &= ~S3C2410_TICNT_ENABLE; writeb(tmp, base + S3C2410_TICNT); @@ -448,6 +461,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) struct rtc_time rtc_tm; struct resource *res; int ret; + int tmp; pr_debug("%s: probe=%p\n", __func__, pdev); @@ -541,11 +555,17 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev) dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); } - if (s3c_rtc_cpu_type == TYPE_S3C64XX) + if (s3c_rtc_cpu_type != TYPE_S3C2410) rtc->max_user_freq = 32768; else rtc->max_user_freq = 128; + if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) { + tmp = readw(s3c_rtc_base + S3C2410_RTCCON); + tmp |= S3C2443_RTCCON_TICSEL; + writew(tmp, s3c_rtc_base + S3C2410_RTCCON); + } + platform_set_drvdata(pdev, rtc); s3c_rtc_setfreq(&pdev->dev, 1); @@ -649,6 +669,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = { { .compatible = "samsung,s3c2410-rtc" .data = TYPE_S3C2410, + }, { + .compatible = "samsung,s3c2416-rtc" + .data = TYPE_S3C2416, + }, { + .compatible = "samsung,s3c2443-rtc" + .data = TYPE_S3C2443, }, { .compatible = "samsung,s3c6410-rtc" .data = TYPE_S3C64XX, @@ -664,6 +690,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = { { .name = "s3c2410-rtc", .driver_data = TYPE_S3C2410, + }, { + .name = "s3c2416-rtc", + .driver_data = TYPE_S3C2416, + }, { + .name = "s3c2443-rtc", + .driver_data = TYPE_S3C2443, }, { .name = "s3c64xx-rtc", .driver_data = TYPE_S3C64XX, -- cgit v1.2.3 From b2994d318dc78c9a4a43605629f00217335ada28 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sat, 24 Dec 2011 10:52:23 +0900 Subject: ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices As the S3C24xx SoCs use the same rtc device a renaming capability like in the adc driver is necessary. This patch adds a s3c_rtc_setname function and names the rtc devices for S3C2443 and S3C2416 accordingly. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2416/s3c2416.c | 2 ++ arch/arm/mach-s3c2443/s3c2443.c | 2 ++ arch/arm/plat-samsung/include/plat/rtc-core.h | 27 +++++++++++++++++++++++++++ 3 files changed, 31 insertions(+) create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h (limited to 'arch/arm/plat-samsung') diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 5287d2808d3e..5536392458e2 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -60,6 +60,7 @@ #include #include #include +#include static struct map_desc s3c2416_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -101,6 +102,7 @@ int __init s3c2416_init(void) s3c_fb_setname("s3c2443-fb"); s3c_adc_setname("s3c2416-adc"); + s3c_rtc_setname("s3c2416-rtc"); #ifdef CONFIG_PM register_syscore_ops(&s3c2416_pm_syscore_ops); diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index b9deaeb0dfff..b7778a9dafaf 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c @@ -41,6 +41,7 @@ #include #include #include +#include static struct map_desc s3c2443_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -73,6 +74,7 @@ int __init s3c2443_init(void) s3c_fb_setname("s3c2443-fb"); s3c_adc_setname("s3c2443-adc"); + s3c_rtc_setname("s3c2443-rtc"); /* change WDT IRQ number */ s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h b/arch/arm/plat-samsung/include/plat/rtc-core.h new file mode 100644 index 000000000000..21d8594d37ca --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/rtc-core.h @@ -0,0 +1,27 @@ +/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h + * + * Copyright (c) 2011 Heiko Stuebner + * + * Samsung RTC Controller core functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_RTC_CORE_H +#define __ASM_PLAT_RTC_CORE_H __FILE__ + +/* These functions are only for use with the core support code, such as + * the cpu specific initialisation code + */ + +/* re-define device name depending on support. */ +static inline void s3c_rtc_setname(char *name) +{ +#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX) + s3c_device_rtc.name = name; +#endif +} + +#endif /* __ASM_PLAT_RTC_CORE_H */ -- cgit v1.2.3 From 9ed76e0336988ecc9e7234e0bd49be4fd98f6c35 Mon Sep 17 00:00:00 2001 From: Boojin Kim Date: Wed, 15 Feb 2012 13:15:12 +0900 Subject: ARM: EXYNOS: Enable MDMA driver This patch adds MDMA platform data and enables MDMA for DMA memcpy operation for EXYNOS SoCs. Signed-off-by: Boojin Kim Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/clock-exynos4.c | 8 ++++++++ arch/arm/mach-exynos/dma.c | 22 ++++++++++++++++++++++ arch/arm/mach-exynos/include/mach/irqs.h | 2 ++ arch/arm/mach-exynos/include/mach/map.h | 3 ++- arch/arm/plat-samsung/include/plat/dma-pl330.h | 8 ++++++++ 5 files changed, 42 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-samsung') diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index 31b59e65463a..db5d1cce3d25 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -784,6 +784,13 @@ static struct clk exynos4_clk_pdma1 = { .ctrlbit = (1 << 1), }; +static struct clk exynos4_clk_mdma1 = { + .name = "dma", + .devname = "dma-pl330.2", + .enable = exynos4_clk_ip_image_ctrl, + .ctrlbit = ((1 << 8) | (1 << 5) | (1 << 2)), +}; + struct clk *exynos4_clkset_group_list[] = { [0] = &clk_ext_xtal_mux, [1] = &clk_xusbxti, @@ -1302,6 +1309,7 @@ static struct clksrc_clk *exynos4_sysclks[] = { static struct clk *exynos4_clk_cdev[] = { &exynos4_clk_pdma0, &exynos4_clk_pdma1, + &exynos4_clk_mdma1, }; static struct clksrc_clk *exynos4_clksrc_cdev[] = { diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index 25f3ef2c36e5..17a2f9086310 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c @@ -113,6 +113,25 @@ static struct dma_pl330_platdata exynos4_pdma1_pdata = { static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata); +static u8 mdma_peri[] = { + DMACH_MTOM_0, + DMACH_MTOM_1, + DMACH_MTOM_2, + DMACH_MTOM_3, + DMACH_MTOM_4, + DMACH_MTOM_5, + DMACH_MTOM_6, + DMACH_MTOM_7, +}; + +static struct dma_pl330_platdata exynos4_mdma1_pdata = { + .nr_valid_peri = ARRAY_SIZE(mdma_peri), + .peri_id = mdma_peri, +}; + +static AMBA_AHB_DEVICE(exynos4_mdma1, "dma-pl330.2", 0x00041330, + EXYNOS4_PA_MDMA1, {IRQ_MDMA1}, &exynos4_mdma1_pdata); + static int __init exynos4_dma_init(void) { if (of_have_populated_dt()) @@ -126,6 +145,9 @@ static int __init exynos4_dma_init(void) dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); amba_device_register(&exynos4_pdma1_device, &iomem_resource); + dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask); + amba_device_register(&exynos4_mdma1_device, &iomem_resource); + return 0; } arch_initcall(exynos4_dma_init); diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index f77bce04789a..1d401c957835 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -43,6 +43,8 @@ #define IRQ_EINT15 IRQ_SPI(31) #define IRQ_EINT16_31 IRQ_SPI(32) +#define IRQ_MDMA0 IRQ_SPI(33) +#define IRQ_MDMA1 IRQ_SPI(34) #define IRQ_PDMA0 IRQ_SPI(35) #define IRQ_PDMA1 IRQ_SPI(36) #define IRQ_TIMER0_VIC IRQ_SPI(37) diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index c754a22a2bb3..2ad4e9cfe498 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -67,7 +67,8 @@ #define EXYNOS4_PA_TWD 0x10500600 #define EXYNOS4_PA_L2CC 0x10502000 -#define EXYNOS4_PA_MDMA 0x10810000 +#define EXYNOS4_PA_MDMA0 0x10810000 +#define EXYNOS4_PA_MDMA1 0x12840000 #define EXYNOS4_PA_PDMA0 0x12680000 #define EXYNOS4_PA_PDMA1 0x12690000 diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index c5eaad529de5..ecf23a830e73 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h @@ -82,6 +82,14 @@ enum dma_ch { DMACH_SLIMBUS4_TX, DMACH_SLIMBUS5_RX, DMACH_SLIMBUS5_TX, + DMACH_MTOM_0, + DMACH_MTOM_1, + DMACH_MTOM_2, + DMACH_MTOM_3, + DMACH_MTOM_4, + DMACH_MTOM_5, + DMACH_MTOM_6, + DMACH_MTOM_7, /* END Marker, also used to denote a reserved channel */ DMACH_MAX, }; -- cgit v1.2.3 From efd9960b0e1bdfe48490504a8166ffdbcc466dba Mon Sep 17 00:00:00 2001 From: Boojin Kim Date: Wed, 15 Feb 2012 13:16:15 +0900 Subject: ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC Signed-off-by: Boojin Kim Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Kconfig | 3 + arch/arm/mach-exynos/dma.c | 95 +++++++++++++++++++++++--- arch/arm/plat-samsung/include/plat/dma-pl330.h | 8 +++ 3 files changed, 98 insertions(+), 8 deletions(-) (limited to 'arch/arm/plat-samsung') diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5d602f68a0e8..5e0a45605a22 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -41,6 +41,7 @@ config SOC_EXYNOS4212 bool "SAMSUNG EXYNOS4212" default y depends on ARCH_EXYNOS4 + select SAMSUNG_DMADEV select S5P_PM if PM select S5P_SLEEP if PM help @@ -50,6 +51,7 @@ config SOC_EXYNOS4412 bool "SAMSUNG EXYNOS4412" default y depends on ARCH_EXYNOS4 + select SAMSUNG_DMADEV help Enable EXYNOS4412 SoC support @@ -333,6 +335,7 @@ config MACH_SMDK4212 select SAMSUNG_DEV_BACKLIGHT select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_PWM + select EXYNOS4_DEV_DMA select EXYNOS4_SETUP_I2C1 select EXYNOS4_SETUP_I2C3 select EXYNOS4_SETUP_I2C7 diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index 17a2f9086310..13607c4328b3 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -36,7 +37,7 @@ static u64 dma_dmamask = DMA_BIT_MASK(32); -static u8 pdma0_peri[] = { +static u8 exynos4210_pdma0_peri[] = { DMACH_PCM0_RX, DMACH_PCM0_TX, DMACH_PCM2_RX, @@ -69,15 +70,47 @@ static u8 pdma0_peri[] = { DMACH_AC97_PCMOUT, }; -static struct dma_pl330_platdata exynos4_pdma0_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma0_peri), - .peri_id = pdma0_peri, +static u8 exynos4212_pdma0_peri[] = { + DMACH_PCM0_RX, + DMACH_PCM0_TX, + DMACH_PCM2_RX, + DMACH_PCM2_TX, + DMACH_MIPI_HSI0, + DMACH_MIPI_HSI1, + DMACH_SPI0_RX, + DMACH_SPI0_TX, + DMACH_SPI2_RX, + DMACH_SPI2_TX, + DMACH_I2S0S_TX, + DMACH_I2S0_RX, + DMACH_I2S0_TX, + DMACH_I2S2_RX, + DMACH_I2S2_TX, + DMACH_UART0_RX, + DMACH_UART0_TX, + DMACH_UART2_RX, + DMACH_UART2_TX, + DMACH_UART4_RX, + DMACH_UART4_TX, + DMACH_SLIMBUS0_RX, + DMACH_SLIMBUS0_TX, + DMACH_SLIMBUS2_RX, + DMACH_SLIMBUS2_TX, + DMACH_SLIMBUS4_RX, + DMACH_SLIMBUS4_TX, + DMACH_AC97_MICIN, + DMACH_AC97_PCMIN, + DMACH_AC97_PCMOUT, + DMACH_MIPI_HSI4, + DMACH_MIPI_HSI5, }; +struct dma_pl330_platdata exynos4_pdma0_pdata; + static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata); -static u8 pdma1_peri[] = { +static u8 exynos4210_pdma1_peri[] = { DMACH_PCM0_RX, DMACH_PCM0_TX, DMACH_PCM1_RX, @@ -105,11 +138,41 @@ static u8 pdma1_peri[] = { DMACH_SLIMBUS5_TX, }; -static struct dma_pl330_platdata exynos4_pdma1_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma1_peri), - .peri_id = pdma1_peri, +static u8 exynos4212_pdma1_peri[] = { + DMACH_PCM0_RX, + DMACH_PCM0_TX, + DMACH_PCM1_RX, + DMACH_PCM1_TX, + DMACH_MIPI_HSI2, + DMACH_MIPI_HSI3, + DMACH_SPI1_RX, + DMACH_SPI1_TX, + DMACH_I2S0S_TX, + DMACH_I2S0_RX, + DMACH_I2S0_TX, + DMACH_I2S1_RX, + DMACH_I2S1_TX, + DMACH_UART0_RX, + DMACH_UART0_TX, + DMACH_UART1_RX, + DMACH_UART1_TX, + DMACH_UART3_RX, + DMACH_UART3_TX, + DMACH_SLIMBUS1_RX, + DMACH_SLIMBUS1_TX, + DMACH_SLIMBUS3_RX, + DMACH_SLIMBUS3_TX, + DMACH_SLIMBUS5_RX, + DMACH_SLIMBUS5_TX, + DMACH_SLIMBUS0AUX_RX, + DMACH_SLIMBUS0AUX_TX, + DMACH_SPDIF, + DMACH_MIPI_HSI6, + DMACH_MIPI_HSI7, }; +static struct dma_pl330_platdata exynos4_pdma1_pdata; + static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata); @@ -137,6 +200,22 @@ static int __init exynos4_dma_init(void) if (of_have_populated_dt()) return 0; + if (soc_is_exynos4210()) { + exynos4_pdma0_pdata.nr_valid_peri = + ARRAY_SIZE(exynos4210_pdma0_peri); + exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri; + exynos4_pdma1_pdata.nr_valid_peri = + ARRAY_SIZE(exynos4210_pdma1_peri); + exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri; + } else if (soc_is_exynos4212() || soc_is_exynos4412()) { + exynos4_pdma0_pdata.nr_valid_peri = + ARRAY_SIZE(exynos4212_pdma0_peri); + exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri; + exynos4_pdma1_pdata.nr_valid_peri = + ARRAY_SIZE(exynos4212_pdma1_peri); + exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri; + } + dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); amba_device_register(&exynos4_pdma0_device, &iomem_resource); diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index ecf23a830e73..0670f37aaaed 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h @@ -82,6 +82,14 @@ enum dma_ch { DMACH_SLIMBUS4_TX, DMACH_SLIMBUS5_RX, DMACH_SLIMBUS5_TX, + DMACH_MIPI_HSI0, + DMACH_MIPI_HSI1, + DMACH_MIPI_HSI2, + DMACH_MIPI_HSI3, + DMACH_MIPI_HSI4, + DMACH_MIPI_HSI5, + DMACH_MIPI_HSI6, + DMACH_MIPI_HSI7, DMACH_MTOM_0, DMACH_MTOM_1, DMACH_MTOM_2, -- cgit v1.2.3 From 25419010a83e314d10b008aed86a198e07fa9487 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Tue, 7 Feb 2012 15:59:01 +0900 Subject: ARM: SAMSUNG: support the second capability for samsung-soc In mmc, there are capabilities and use the host_caps. That capability is expressed with bit[0:31]. But now..already filled the bit[0:31]... so we need to denote with the other capability field. (if we want to use the cache, powerclass, etc for eMMC.. this field is necessary) Signed-off-by: Jaehoon Chung Signed-off-by: Kyungmin Park Acked-by: Chris Ball Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/sdhci.h | 2 ++ arch/arm/plat-samsung/platformdata.c | 2 ++ 2 files changed, 4 insertions(+) (limited to 'arch/arm/plat-samsung') diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index f82f888b91a9..317e246ffc56 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -40,6 +40,7 @@ enum clk_types { * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI * @max_width: The maximum number of data bits supported. * @host_caps: Standard MMC host capabilities bit field. + * @host_caps2: The second standard MMC host capabilities bit field. * @cd_type: Type of Card Detection method (see cd_types enum above) * @clk_type: Type of clock divider method (see clk_types enum above) * @ext_cd_init: Initialize external card detect subsystem. Called on @@ -63,6 +64,7 @@ enum clk_types { struct s3c_sdhci_platdata { unsigned int max_width; unsigned int host_caps; + unsigned int host_caps2; unsigned int pm_caps; enum cd_types cd_type; enum clk_types clk_type; diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c index 0f707184eae0..fa78aa710ed1 100644 --- a/arch/arm/plat-samsung/platformdata.c +++ b/arch/arm/plat-samsung/platformdata.c @@ -53,6 +53,8 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd, set->cfg_gpio = pd->cfg_gpio; if (pd->host_caps) set->host_caps |= pd->host_caps; + if (pd->host_caps2) + set->host_caps2 |= pd->host_caps2; if (pd->pm_caps) set->pm_caps |= pd->pm_caps; if (pd->clk_type) -- cgit v1.2.3