From 434c23a7ef48763fd8d4adfb0edebb4237770f9d Mon Sep 17 00:00:00 2001 From: Aaro Koskinen Date: Mon, 20 Dec 2010 18:48:15 -0800 Subject: arm: mach-omap2: hsmmc_reset: fix clk_get() error handling clk_get() return value should be checked with IS_ERR(). Furthermore, clocks should be put and disabled properly. Signed-off-by: Aaro Koskinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 44 +++++++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 20 deletions(-) (limited to 'arch/arm/mach-omap2/devices.c') diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 5a0c148e23bc..1bca147ac91d 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -638,6 +638,7 @@ static struct platform_device dummy_pdev = { static void __init omap_hsmmc_reset(void) { u32 i, nr_controllers; + struct clk *iclk, *fclk; if (cpu_is_omap242x()) return; @@ -647,7 +648,6 @@ static void __init omap_hsmmc_reset(void) for (i = 0; i < nr_controllers; i++) { u32 v, base = 0; - struct clk *iclk, *fclk; struct device *dev = &dummy_pdev.dev; switch (i) { @@ -678,19 +678,16 @@ static void __init omap_hsmmc_reset(void) dummy_pdev.id = i; dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); iclk = clk_get(dev, "ick"); - if (iclk && clk_enable(iclk)) - iclk = NULL; + if (IS_ERR(iclk)) + goto err1; + if (clk_enable(iclk)) + goto err2; fclk = clk_get(dev, "fck"); - if (fclk && clk_enable(fclk)) - fclk = NULL; - - if (!iclk || !fclk) { - printk(KERN_WARNING - "%s: Unable to enable clocks for MMC%d, " - "cannot reset.\n", __func__, i); - break; - } + if (IS_ERR(fclk)) + goto err3; + if (clk_enable(fclk)) + goto err4; omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG); v = omap_readl(base + MMCHS_SYSSTATUS); @@ -698,15 +695,22 @@ static void __init omap_hsmmc_reset(void) MMCHS_SYSSTATUS_RESETDONE)) cpu_relax(); - if (fclk) { - clk_disable(fclk); - clk_put(fclk); - } - if (iclk) { - clk_disable(iclk); - clk_put(iclk); - } + clk_disable(fclk); + clk_put(fclk); + clk_disable(iclk); + clk_put(iclk); } + return; + +err4: + clk_put(fclk); +err3: + clk_disable(iclk); +err2: + clk_put(iclk); +err1: + printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, " + "cannot reset.\n", __func__, i); } #else static inline void omap_hsmmc_reset(void) {} -- cgit v1.2.3 From 81fbc5ef9b22df2e2198dd0c530719a263a8d1c5 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Dec 2010 19:56:17 -0700 Subject: OMAP2+: wd_timer: separate watchdog disable code from the rest of mach-omap2/devices.c Split the wd_timer disable code out into its own file, mach-omap2/wd_timer.c; it belongs in its own file rather than cluttering up devices.c. Signed-off-by: Paul Walmsley Cc: Charulatha Varadarajan --- arch/arm/mach-omap2/Makefile | 2 +- arch/arm/mach-omap2/devices.c | 55 ++++------------------------------ arch/arm/mach-omap2/wd_timer.c | 68 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/wd_timer.h | 17 +++++++++++ 4 files changed, 91 insertions(+), 51 deletions(-) create mode 100644 arch/arm/mach-omap2/wd_timer.c create mode 100644 arch/arm/mach-omap2/wd_timer.h (limited to 'arch/arm/mach-omap2/devices.c') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 1b699d3c6cb8..4a8ea79a2b0c 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ - common.o gpio.o dma.o + common.o gpio.o dma.o wd_timer.o omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o hwmod-common = omap_hwmod.o \ diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 1bca147ac91d..9221a486b51f 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -33,6 +33,7 @@ #include "mux.h" #include "control.h" +#include "wd_timer.h" #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) @@ -955,69 +956,23 @@ static inline void omap_init_vout(void) {} /*-------------------------------------------------------------------------*/ -/* - * Inorder to avoid any assumptions from bootloader regarding WDT - * settings, WDT module is reset during init. This enables the watchdog - * timer. Hence it is required to disable the watchdog after the WDT reset - * during init. Otherwise the system would reboot as per the default - * watchdog timer registers settings. - */ -#define OMAP_WDT_WPS (0x34) -#define OMAP_WDT_SPR (0x48) - static int omap2_disable_wdt(struct omap_hwmod *oh, void *unused) { - void __iomem *base; - int ret; - - if (!oh) { - pr_err("%s: Could not look up wdtimer_hwmod\n", __func__); - return -EINVAL; - } - - base = omap_hwmod_get_mpu_rt_va(oh); - if (!base) { - pr_err("%s: Could not get the base address for %s\n", - oh->name, __func__); - return -EINVAL; - } - - /* Enable the clocks before accessing the WDT registers */ - ret = omap_hwmod_enable(oh); - if (ret) { - pr_err("%s: Could not enable clocks for %s\n", - oh->name, __func__); - return ret; - } - - /* sequence required to disable watchdog */ - __raw_writel(0xAAAA, base + OMAP_WDT_SPR); - while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) - cpu_relax(); - - __raw_writel(0x5555, base + OMAP_WDT_SPR); - while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) - cpu_relax(); - - ret = omap_hwmod_idle(oh); - if (ret) - pr_err("%s: Could not disable clocks for %s\n", - oh->name, __func__); - - return ret; + return omap2_wd_timer_disable(oh); } static void __init omap_disable_wdt(void) { if (cpu_class_is_omap2()) omap_hwmod_for_each_by_class("wd_timer", - omap2_disable_wdt, NULL); + omap2_disable_wdt, NULL); return; } static int __init omap2_init_devices(void) { - /* please keep these calls, and their implementations above, + /* + * please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ omap_disable_wdt(); diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c new file mode 100644 index 000000000000..06c256d38988 --- /dev/null +++ b/arch/arm/mach-omap2/wd_timer.c @@ -0,0 +1,68 @@ +/* + * OMAP2+ MPU WD_TIMER-specific code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include + +#include + +/* + * In order to avoid any assumptions from bootloader regarding WDT + * settings, WDT module is reset during init. This enables the watchdog + * timer. Hence it is required to disable the watchdog after the WDT reset + * during init. Otherwise the system would reboot as per the default + * watchdog timer registers settings. + */ +#define OMAP_WDT_WPS 0x34 +#define OMAP_WDT_SPR 0x48 + + +int omap2_wd_timer_disable(struct omap_hwmod *oh) +{ + void __iomem *base; + int ret; + + if (!oh) { + pr_err("%s: Could not look up wdtimer_hwmod\n", __func__); + return -EINVAL; + } + + base = omap_hwmod_get_mpu_rt_va(oh); + if (!base) { + pr_err("%s: Could not get the base address for %s\n", + oh->name, __func__); + return -EINVAL; + } + + /* Enable the clocks before accessing the WDT registers */ + ret = omap_hwmod_enable(oh); + if (ret) { + pr_err("%s: Could not enable clocks for %s\n", + oh->name, __func__); + return ret; + } + + /* sequence required to disable watchdog */ + __raw_writel(0xAAAA, base + OMAP_WDT_SPR); + while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) + cpu_relax(); + + __raw_writel(0x5555, base + OMAP_WDT_SPR); + while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) + cpu_relax(); + + ret = omap_hwmod_idle(oh); + if (ret) + pr_err("%s: Could not disable clocks for %s\n", + oh->name, __func__); + + return ret; +} + diff --git a/arch/arm/mach-omap2/wd_timer.h b/arch/arm/mach-omap2/wd_timer.h new file mode 100644 index 000000000000..e0054a2d5505 --- /dev/null +++ b/arch/arm/mach-omap2/wd_timer.h @@ -0,0 +1,17 @@ +/* + * OMAP2+ MPU WD_TIMER-specific function prototypes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_WD_TIMER_H +#define __ARCH_ARM_MACH_OMAP2_WD_TIMER_H + +#include + +extern int omap2_wd_timer_disable(struct omap_hwmod *oh); + +#endif -- cgit v1.2.3 From ff2516fbef20ed9edd9cc2fc8b8b48d5cb5a932f Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 21 Dec 2010 15:39:15 -0700 Subject: OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The OMAP watchdog timer IP blocks require a specific set of register writes to occur before they will be disabled[1], even if the device clocks appear to be disabled in the CM_*CLKEN registers. In the MPU watchdog case, failure to execute this reset sequence will eventually cause the watchdog to reset the OMAP unexpectedly. Previously, the code to disable this watchdog was manually called from mach-omap2/devices.c during device initialization. This causes the watchdog to be unconditionally disabled for a portion of kernel initialization. This should be controllable by the board-*.c files, since some system integrators will want full watchdog coverage of kernel initialization. Also, the watchdog disable code was not connected to the hwmod shutdown code. This means that calling omap_hwmod_shutdown() will not, in fact, disable the watchdog, and the goal of omap_hwmod_shutdown() is to be able to shutdown any on-chip OMAP device. To resolve the latter problem, populate the pre_shutdown pointer in the watchdog timer hwmod classes with a function that executes the watchdog shutdown sequence. This allows the hwmod code to fully disable the watchdog. Then, to allow some board files to support watchdog coverage throughout kernel initialization, add common code to mach-omap2/io.c to cause the MPU watchdog to be disabled on boot unless a board file specifically requests it to remain enabled. Board files can do this by changing the watchdog timer hwmod's postsetup state between the omap2_init_common_infrastructure() and omap2_init_common_devices() function calls. 1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. ZH [SWPU222H], Section 16.4.3.6, "Start/Stop Sequence for WDTs (Using WDTi.WSPR Register)" Signed-off-by: Paul Walmsley Cc: Benoît Cousson Cc: Kevin Hilman Cc: Charulatha Varadarajan --- arch/arm/mach-omap2/devices.c | 15 --------------- arch/arm/mach-omap2/io.c | 18 ++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_2420_data.c | 6 ++++-- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 6 ++++-- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 6 ++++-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 6 ++++-- arch/arm/mach-omap2/wd_timer.c | 16 +--------------- 7 files changed, 35 insertions(+), 38 deletions(-) (limited to 'arch/arm/mach-omap2/devices.c') diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 9221a486b51f..381f4eb92352 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -33,7 +33,6 @@ #include "mux.h" #include "control.h" -#include "wd_timer.h" #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) @@ -956,26 +955,12 @@ static inline void omap_init_vout(void) {} /*-------------------------------------------------------------------------*/ -static int omap2_disable_wdt(struct omap_hwmod *oh, void *unused) -{ - return omap2_wd_timer_disable(oh); -} - -static void __init omap_disable_wdt(void) -{ - if (cpu_class_is_omap2()) - omap_hwmod_for_each_by_class("wd_timer", - omap2_disable_wdt, NULL); - return; -} - static int __init omap2_init_devices(void) { /* * please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ - omap_disable_wdt(); omap_hsmmc_reset(); omap_init_audio(); omap_init_camera(); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 7362b69a154d..d87e23a24dcd 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -361,6 +361,24 @@ void __init omap2_init_common_infrastructure(void) #endif omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state); + /* + * Set the default postsetup state for unusual modules (like + * MPU WDT). + * + * The postsetup_state is not actually used until + * omap_hwmod_late_init(), so boards that desire full watchdog + * coverage of kernel initialization can reprogram the + * postsetup_state between the calls to + * omap2_init_common_infra() and omap2_init_common_devices(). + * + * XXX ideally we could detect whether the MPU WDT was currently + * enabled here and make this conditional + */ + postsetup_state = _HWMOD_STATE_DISABLED; + omap_hwmod_for_each_by_class("wd_timer", + _set_hwmod_postsetup_state, + &postsetup_state); + omap_pm_if_early_init(); if (cpu_is_omap2420()) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 42606f6b0cdf..b85c630b64d6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -23,6 +23,7 @@ #include "cm-regbits-24xx.h" #include "prm-regbits-24xx.h" +#include "wd_timer.h" /* * OMAP2420 hardware module integration data @@ -312,8 +313,9 @@ static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { }; static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2420_wd_timer_sysc, + .name = "wd_timer", + .sysc = &omap2420_wd_timer_sysc, + .pre_shutdown = &omap2_wd_timer_disable }; /* wd_timer2 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 3315d241feef..3c2c724796a2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -23,6 +23,7 @@ #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" +#include "wd_timer.h" /* * OMAP2430 hardware module integration data @@ -311,8 +312,9 @@ static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { }; static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2430_wd_timer_sysc, + .name = "wd_timer", + .sysc = &omap2430_wd_timer_sysc, + .pre_shutdown = &omap2_wd_timer_disable }; /* wd_timer2 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index d5acb63ba9e0..89a943e9459c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -26,6 +26,7 @@ #include "prm-regbits-34xx.h" #include "cm-regbits-34xx.h" +#include "wd_timer.h" /* * OMAP3xxx hardware module integration data @@ -423,8 +424,9 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { }; static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap3xxx_wd_timer_sysc, + .name = "wd_timer", + .sysc = &omap3xxx_wd_timer_sysc, + .pre_shutdown = &omap2_wd_timer_disable }; /* wd_timer2 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index f9778fba8322..f136f7f2274c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -29,6 +29,7 @@ #include "cm.h" #include "prm-regbits-44xx.h" +#include "wd_timer.h" /* Base offset for all OMAP4 interrupts external to MPUSS */ #define OMAP44XX_IRQ_GIC_START 32 @@ -728,8 +729,9 @@ static struct omap_hwmod_class_sysconfig omap44xx_uart_sysc = { }; static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap44xx_wd_timer_sysc, + .name = "wd_timer", + .sysc = &omap44xx_wd_timer_sysc, + .pre_shutdown = &omap2_wd_timer_disable }; /* wd_timer2 */ diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index 06c256d38988..b0c4907ab3ca 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c @@ -27,7 +27,6 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) { void __iomem *base; - int ret; if (!oh) { pr_err("%s: Could not look up wdtimer_hwmod\n", __func__); @@ -41,14 +40,6 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) return -EINVAL; } - /* Enable the clocks before accessing the WDT registers */ - ret = omap_hwmod_enable(oh); - if (ret) { - pr_err("%s: Could not enable clocks for %s\n", - oh->name, __func__); - return ret; - } - /* sequence required to disable watchdog */ __raw_writel(0xAAAA, base + OMAP_WDT_SPR); while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) @@ -58,11 +49,6 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) cpu_relax(); - ret = omap_hwmod_idle(oh); - if (ret) - pr_err("%s: Could not disable clocks for %s\n", - oh->name, __func__); - - return ret; + return 0; } -- cgit v1.2.3