From 58ecb23f64ee3a2ef66bb55b2e1e841385b6d08b Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 25 Nov 2013 17:53:16 -0700 Subject: ARM: tegra: add missing unit addresses to DT DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-colibri-512.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/boot/dts/tegra20-colibri-512.dtsi') diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index d5c9bca01232..f20fc9794e89 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -8,8 +8,8 @@ reg = <0x00000000 0x20000000>; }; - host1x { - hdmi { + host1x@50000000 { + hdmi@54280000 { vdd-supply = <&hdmi_vdd_reg>; pll-supply = <&hdmi_pll_reg>; @@ -19,7 +19,7 @@ }; }; - pinmux { + pinmux@70000014 { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -362,7 +362,7 @@ }; }; - pmc { + pmc@7000e400 { nvidia,suspend-mode = <1>; nvidia,cpu-pwr-good-time = <5000>; nvidia,cpu-pwr-off-time = <5000>; @@ -442,7 +442,7 @@ }; }; - ac97: ac97 { + ac97: ac97@70002000 { status = "okay"; nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>; @@ -471,7 +471,7 @@ #address-cells = <1>; #size-cells = <0>; - clk32k_in: clock { + clk32k_in: clock@0 { compatible = "fixed-clock"; reg=<0>; #clock-cells = <0>; -- cgit v1.2.3 From 578990537aa553a3194420e63d467fcb12d42ba4 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 26 Nov 2013 14:43:45 -0700 Subject: ARM: tegra: fix node sort order For Tegra DT files, I've been attempting to keep the nodes sorted in the order: 1) Nodes with reg, in order of reg. 2) Nodes without reg, alphabetically. This patch fixes a few escapees that I missed:-( The diffs look larger than they really are, because sometimes when one node was moved up or down, diff chose to represent this as many other nodes being moved the other way! Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-colibri-512.dtsi | 56 +++--- arch/arm/boot/dts/tegra20-harmony.dts | 184 +++++++++---------- arch/arm/boot/dts/tegra20-iris-512.dts | 14 +- arch/arm/boot/dts/tegra20-seaboard.dts | 281 +++++++++++++++-------------- arch/arm/boot/dts/tegra20-whistler.dts | 26 +-- arch/arm/boot/dts/tegra30-beaver.dts | 64 +++---- arch/arm/boot/dts/tegra30-cardhu-a02.dts | 14 +- arch/arm/boot/dts/tegra30-cardhu-a04.dts | 14 +- arch/arm/boot/dts/tegra30-cardhu.dtsi | 12 +- 9 files changed, 333 insertions(+), 332 deletions(-) (limited to 'arch/arm/boot/dts/tegra20-colibri-512.dtsi') diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index f20fc9794e89..78f7e919ab6f 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -199,6 +199,14 @@ }; }; + ac97: ac97@70002000 { + status = "okay"; + nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0) + GPIO_ACTIVE_HIGH>; + nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0) + GPIO_ACTIVE_HIGH>; + }; + i2c@7000c000 { clock-frequency = <400000>; }; @@ -442,14 +450,6 @@ }; }; - ac97: ac97@70002000 { - status = "okay"; - nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0) - GPIO_ACTIVE_HIGH>; - nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0) - GPIO_ACTIVE_HIGH>; - }; - usb@c5004000 { status = "okay"; nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) @@ -479,26 +479,6 @@ }; }; - sound { - compatible = "nvidia,tegra-audio-wm9712-colibri_t20", - "nvidia,tegra-audio-wm9712"; - nvidia,model = "Colibri T20 AC97 Audio"; - - nvidia,audio-routing = - "Headphone", "HPOUTL", - "Headphone", "HPOUTR", - "LineIn", "LINEINL", - "LineIn", "LINEINR", - "Mic", "MIC1"; - - nvidia,ac97-controller = <&ac97>; - - clocks = <&tegra_car TEGRA20_CLK_PLL_A>, - <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA20_CLK_CDEV1>; - clock-names = "pll_a", "pll_a_out0", "mclk"; - }; - regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -525,4 +505,24 @@ gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>; }; }; + + sound { + compatible = "nvidia,tegra-audio-wm9712-colibri_t20", + "nvidia,tegra-audio-wm9712"; + nvidia,model = "Colibri T20 AC97 Audio"; + + nvidia,audio-routing = + "Headphone", "HPOUTL", + "Headphone", "HPOUTR", + "LineIn", "LINEINL", + "LineIn", "LINEINR", + "Mic", "MIC1"; + + nvidia,ac97-controller = <&ac97>; + + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA20_CLK_CDEV1>; + clock-names = "pll_a", "pll_a_out0", "mclk"; + }; }; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index b9c6f67e87ef..94d2189a47a7 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -415,98 +415,6 @@ }; }; - pmc@7000e400 { - nvidia,invert-interrupt; - nvidia,suspend-mode = <1>; - nvidia,cpu-pwr-good-time = <5000>; - nvidia,cpu-pwr-off-time = <5000>; - nvidia,core-pwr-good-time = <3845 3845>; - nvidia,core-pwr-off-time = <3875>; - nvidia,sys-clock-req-active-high; - }; - - pcie-controller@80003000 { - pex-clk-supply = <&pci_clk_reg>; - vdd-supply = <&pci_vdd_reg>; - status = "okay"; - - pci@1,0 { - status = "okay"; - }; - - pci@2,0 { - status = "okay"; - }; - }; - - usb@c5000000 { - status = "okay"; - }; - - usb-phy@c5000000 { - status = "okay"; - }; - - usb@c5004000 { - status = "okay"; - nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) - GPIO_ACTIVE_LOW>; - }; - - usb-phy@c5004000 { - status = "okay"; - nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) - GPIO_ACTIVE_LOW>; - }; - - usb@c5008000 { - status = "okay"; - }; - - usb-phy@c5008000 { - status = "okay"; - }; - - sdhci@c8000200 { - status = "okay"; - cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; - power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; - bus-width = <4>; - }; - - sdhci@c8000600 { - status = "okay"; - cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; - power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; - bus-width = <8>; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock@0 { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - power { - label = "Power"; - gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; - linux,code = <116>; /* KEY_POWER */ - gpio-key,wakeup; - }; - }; - kbc@7000e200 { status = "okay"; nvidia,debounce-delay-ms = <2>; @@ -624,6 +532,98 @@ 0x1F0400D6>; /* KEY_QUESTION */ }; + pmc@7000e400 { + nvidia,invert-interrupt; + nvidia,suspend-mode = <1>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; + }; + + pcie-controller@80003000 { + pex-clk-supply = <&pci_clk_reg>; + vdd-supply = <&pci_vdd_reg>; + status = "okay"; + + pci@1,0 { + status = "okay"; + }; + + pci@2,0 { + status = "okay"; + }; + }; + + usb@c5000000 { + status = "okay"; + }; + + usb-phy@c5000000 { + status = "okay"; + }; + + usb@c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) + GPIO_ACTIVE_LOW>; + }; + + usb-phy@c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) + GPIO_ACTIVE_LOW>; + }; + + usb@c5008000 { + status = "okay"; + }; + + usb-phy@c5008000 { + status = "okay"; + }; + + sdhci@c8000200 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; + power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; + power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; + bus-width = <8>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts index 770fc66e5fce..274d252c90f8 100644 --- a/arch/arm/boot/dts/tegra20-iris-512.dts +++ b/arch/arm/boot/dts/tegra20-iris-512.dts @@ -36,31 +36,31 @@ }; }; - usb@c5000000 { + serial@70006000 { status = "okay"; }; - usb-phy@c5000000 { + serial@70006300 { status = "okay"; }; - usb@c5008000 { + i2c_ddc: i2c@7000c400 { status = "okay"; }; - usb-phy@c5008000 { + usb@c5000000 { status = "okay"; }; - serial@70006000 { + usb-phy@c5000000 { status = "okay"; }; - serial@70006300 { + usb@c5008000 { status = "okay"; }; - i2c_ddc: i2c@7000c400 { + usb-phy@c5008000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 01442fc257de..07ff55a0d631 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -386,6 +386,13 @@ status = "okay"; clock-frequency = <400000>; + magnetometer@c { + compatible = "ak,ak8975"; + reg = <0xc>; + interrupt-parent = <&gpio>; + interrupts = ; + }; + pmic: tps6586x@34 { compatible = "ti,tps6586x"; reg = <0x34>; @@ -507,146 +514,6 @@ compatible = "onnn,nct1008"; reg = <0x4c>; }; - - magnetometer@c { - compatible = "ak,ak8975"; - reg = <0xc>; - interrupt-parent = <&gpio>; - interrupts = ; - }; - }; - - pmc@7000e400 { - nvidia,invert-interrupt; - nvidia,suspend-mode = <1>; - nvidia,cpu-pwr-good-time = <5000>; - nvidia,cpu-pwr-off-time = <5000>; - nvidia,core-pwr-good-time = <3845 3845>; - nvidia,core-pwr-off-time = <3875>; - nvidia,sys-clock-req-active-high; - }; - - memory-controller@7000f400 { - emc-table@190000 { - reg = <190000>; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = <190000>; - nvidia,emc-registers = <0x0000000c 0x00000026 - 0x00000009 0x00000003 0x00000004 0x00000004 - 0x00000002 0x0000000c 0x00000003 0x00000003 - 0x00000002 0x00000001 0x00000004 0x00000005 - 0x00000004 0x00000009 0x0000000d 0x0000059f - 0x00000000 0x00000003 0x00000003 0x00000003 - 0x00000003 0x00000001 0x0000000b 0x000000c8 - 0x00000003 0x00000007 0x00000004 0x0000000f - 0x00000002 0x00000000 0x00000000 0x00000002 - 0x00000000 0x00000000 0x00000083 0xa06204ae - 0x007dc010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000>; - }; - - emc-table@380000 { - reg = <380000>; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = <380000>; - nvidia,emc-registers = <0x00000017 0x0000004b - 0x00000012 0x00000006 0x00000004 0x00000005 - 0x00000003 0x0000000c 0x00000006 0x00000006 - 0x00000003 0x00000001 0x00000004 0x00000005 - 0x00000004 0x00000009 0x0000000d 0x00000b5f - 0x00000000 0x00000003 0x00000003 0x00000006 - 0x00000006 0x00000001 0x00000011 0x000000c8 - 0x00000003 0x0000000e 0x00000007 0x0000000f - 0x00000002 0x00000000 0x00000000 0x00000002 - 0x00000000 0x00000000 0x00000083 0xe044048b - 0x007d8010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000>; - }; - }; - - usb@c5000000 { - status = "okay"; - dr_mode = "otg"; - }; - - usb-phy@c5000000 { - status = "okay"; - vbus-supply = <&vbus_reg>; - dr_mode = "otg"; - }; - - usb@c5004000 { - status = "okay"; - nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) - GPIO_ACTIVE_LOW>; - }; - - usb-phy@c5004000 { - status = "okay"; - nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) - GPIO_ACTIVE_LOW>; - }; - - usb@c5008000 { - status = "okay"; - }; - - usb-phy@c5008000 { - status = "okay"; - }; - - sdhci@c8000000 { - status = "okay"; - power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; - bus-width = <4>; - keep-power-in-suspend; - }; - - sdhci@c8000400 { - status = "okay"; - cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; - power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; - bus-width = <4>; - }; - - sdhci@c8000600 { - status = "okay"; - bus-width = <8>; - non-removable; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock@0 { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - power { - label = "Power"; - gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; - linux,code = <116>; /* KEY_POWER */ - gpio-key,wakeup; - }; - - lid { - label = "Lid"; - gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; - linux,input-type = <5>; /* EV_SW */ - linux,code = <0>; /* SW_LID */ - debounce-interval = <1>; - gpio-key,wakeup; - }; }; kbc@7000e200 { @@ -788,6 +655,140 @@ 0x1F04008A>; /* KEY_HELP */ }; + + pmc@7000e400 { + nvidia,invert-interrupt; + nvidia,suspend-mode = <1>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <3875>; + nvidia,sys-clock-req-active-high; + }; + + memory-controller@7000f400 { + emc-table@190000 { + reg = <190000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <190000>; + nvidia,emc-registers = <0x0000000c 0x00000026 + 0x00000009 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x0000059f + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000b 0x000000c8 + 0x00000003 0x00000007 0x00000004 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xa06204ae + 0x007dc010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + + emc-table@380000 { + reg = <380000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <380000>; + nvidia,emc-registers = <0x00000017 0x0000004b + 0x00000012 0x00000006 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000006 0x00000006 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x00000b5f + 0x00000000 0x00000003 0x00000003 0x00000006 + 0x00000006 0x00000001 0x00000011 0x000000c8 + 0x00000003 0x0000000e 0x00000007 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe044048b + 0x007d8010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + }; + + usb@c5000000 { + status = "okay"; + dr_mode = "otg"; + }; + + usb-phy@c5000000 { + status = "okay"; + vbus-supply = <&vbus_reg>; + dr_mode = "otg"; + }; + + usb@c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) + GPIO_ACTIVE_LOW>; + }; + + usb-phy@c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) + GPIO_ACTIVE_LOW>; + }; + + usb@c5008000 { + status = "okay"; + }; + + usb-phy@c5008000 { + status = "okay"; + }; + + sdhci@c8000000 { + status = "okay"; + power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + keep-power-in-suspend; + }; + + sdhci@c8000400 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; + power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + + lid { + label = "Lid"; + gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + gpio-key,wakeup; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index b047621b95d2..82037fe814ce 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts @@ -495,6 +495,19 @@ }; }; + kbc@7000e200 { + status = "okay"; + nvidia,debounce-delay-ms = <20>; + nvidia,repeat-delay-ms = <160>; + nvidia,kbc-row-pins = <0 1 2>; + nvidia,kbc-col-pins = <16 17>; + nvidia,wakeup-source; + linux,keymap = <0x00000074 /* KEY_POWER */ + 0x01000066 /* KEY_HOME */ + 0x0101009E /* KEY_BACK */ + 0x0201008B>; /* KEY_MENU */ + }; + pmc@7000e400 { nvidia,invert-interrupt; nvidia,suspend-mode = <1>; @@ -551,19 +564,6 @@ }; }; - kbc@7000e200 { - status = "okay"; - nvidia,debounce-delay-ms = <20>; - nvidia,repeat-delay-ms = <160>; - nvidia,kbc-row-pins = <0 1 2>; - nvidia,kbc-col-pins = <16 17>; - nvidia,wakeup-source; - linux,keymap = <0x00000074 /* KEY_POWER */ - 0x01000066 /* KEY_HOME */ - 0x0101009E /* KEY_BACK */ - 0x0201008B>; /* KEY_MENU */ - }; - regulators { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index bc28e27e4fe7..3ad193c37436 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -168,19 +168,6 @@ <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>; }; - tps62361@60 { - compatible = "ti,tps62361"; - reg = <0x60>; - - regulator-name = "tps62361-vout"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1500000>; - regulator-boot-on; - regulator-always-on; - ti,vsel0-state-high; - ti,vsel1-state-high; - }; - pmic: tps65911@2d { compatible = "ti,tps65911"; reg = <0x2d>; @@ -284,6 +271,19 @@ }; }; }; + + tps62361@60 { + compatible = "ti,tps62361"; + reg = <0x60>; + + regulator-name = "tps62361-vout"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-high; + ti,vsel1-state-high; + }; }; spi@7000da00 { @@ -296,12 +296,6 @@ }; }; - ahub@70080000 { - i2s@70080400 { - status = "okay"; - }; - }; - pmc@7000e400 { status = "okay"; nvidia,invert-interrupt; @@ -314,6 +308,12 @@ nvidia,sys-clock-req-active-high; }; + ahub@70080000 { + i2s@70080400 { + status = "okay"; + }; + }; + sdhci@78000000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; @@ -350,6 +350,19 @@ }; }; + gpio-leds { + compatible = "gpio-leds"; + + gpled1 { + label = "LED1"; /* CR5A1 (blue) */ + gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>; + }; + gpled2 { + label = "LED2"; /* CR4A2 (green) */ + gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -453,19 +466,6 @@ }; }; - gpio-leds { - compatible = "gpio-leds"; - - gpled1 { - label = "LED1"; /* CR5A1 (blue) */ - gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>; - }; - gpled2 { - label = "LED2"; /* CR4A2 (green) */ - gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>; - }; - }; - sound { compatible = "nvidia,tegra-audio-rt5640-beaver", "nvidia,tegra-audio-rt5640"; diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts index 1082c5ed90d1..c9bfedcca6ed 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts @@ -8,6 +8,13 @@ model = "NVIDIA Tegra30 Cardhu A02 evaluation board"; compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30"; + sdhci@78000400 { + status = "okay"; + power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + keep-power-in-suspend; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -83,12 +90,5 @@ gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_HIGH>; }; }; - - sdhci@78000400 { - status = "okay"; - power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>; - bus-width = <4>; - keep-power-in-suspend; - }; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts index bf012bddaafb..fadf55e46b2b 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts @@ -8,6 +8,13 @@ model = "NVIDIA Tegra30 Cardhu A04 (A05, A06, A07) evaluation board"; compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30"; + sdhci@78000400 { + status = "okay"; + power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + keep-power-in-suspend; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -95,11 +102,4 @@ gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>; }; }; - - sdhci@78000400 { - status = "okay"; - power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>; - bus-width = <4>; - keep-power-in-suspend; - }; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index b159a41c7338..748b4ba945ee 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -326,12 +326,6 @@ }; }; - ahub@70080000 { - i2s@70080400 { - status = "okay"; - }; - }; - pmc@7000e400 { status = "okay"; nvidia,invert-interrupt; @@ -344,6 +338,12 @@ nvidia,sys-clock-req-active-high; }; + ahub@70080000 { + i2s@70080400 { + status = "okay"; + }; + }; + sdhci@78000000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; -- cgit v1.2.3 From ba4104e79470ae848a9f38029fe1371790dc0df9 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Thu, 5 Dec 2013 16:14:08 +0530 Subject: ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra20 platforms. Signed-off-by: Laxman Dewangan Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-colibri-512.dtsi | 104 ++++++++++++++--------------- arch/arm/boot/dts/tegra20-harmony.dts | 30 ++++----- arch/arm/boot/dts/tegra20-iris-512.dts | 10 +-- arch/arm/boot/dts/tegra20-paz00.dts | 30 ++++----- arch/arm/boot/dts/tegra20-seaboard.dts | 44 ++++++------ arch/arm/boot/dts/tegra20-tamonten.dtsi | 30 ++++----- arch/arm/boot/dts/tegra20-trimslice.dts | 34 +++++----- arch/arm/boot/dts/tegra20-ventana.dts | 44 ++++++------ arch/arm/boot/dts/tegra20-whistler.dts | 40 +++++------ arch/arm/boot/dts/tegra20.dtsi | 1 + 10 files changed, 184 insertions(+), 183 deletions(-) (limited to 'arch/arm/boot/dts/tegra20-colibri-512.dtsi') diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index 78f7e919ab6f..7792637a3ba7 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -27,20 +27,20 @@ audio_refclk { nvidia,pins = "cdev1"; nvidia,function = "plla_out"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; crt { nvidia,pins = "crtp"; nvidia,function = "crt"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; dap3 { nvidia,pins = "dap3"; nvidia,function = "dap3"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; displaya { nvidia,pins = "ld0", "ld1", "ld2", "ld3", @@ -50,151 +50,151 @@ "lhs", "lpw0", "lpw2", "lsc0", "lsc1", "lsck", "lsda", "lspi", "lvs"; nvidia,function = "displaya"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; gpio_dte { nvidia,pins = "dte"; nvidia,function = "rsvd1"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; gpio_gmi { nvidia,pins = "ata", "atc", "atd", "ate", "dap1", "dap2", "dap4", "gpu", "irrx", "irtx", "spia", "spib", "spic"; nvidia,function = "gmi"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; gpio_pta { nvidia,pins = "pta"; nvidia,function = "rsvd4"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; gpio_uac { nvidia,pins = "uac"; nvidia,function = "rsvd2"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; hdint { nvidia,pins = "hdint"; nvidia,function = "hdmi"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; i2c1 { nvidia,pins = "rm"; nvidia,function = "i2c1"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; i2c3 { nvidia,pins = "dtf"; nvidia,function = "i2c3"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; i2cddc { nvidia,pins = "ddc"; nvidia,function = "i2c2"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; i2cp { nvidia,pins = "i2cp"; nvidia,function = "i2cp"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; irda { nvidia,pins = "uad"; nvidia,function = "irda"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; nand { nvidia,pins = "kbca", "kbcc", "kbcd", "kbce", "kbcf"; nvidia,function = "nand"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; owc { nvidia,pins = "owc"; nvidia,function = "owr"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; pmc { nvidia,pins = "pmc"; nvidia,function = "pwr_on"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; pwm { nvidia,pins = "sdb", "sdc", "sdd"; nvidia,function = "pwm"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; sdio4 { nvidia,pins = "atb", "gma", "gme"; nvidia,function = "sdio4"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; spi1 { nvidia,pins = "spid", "spie", "spif"; nvidia,function = "spi1"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; spi4 { nvidia,pins = "slxa", "slxc", "slxd", "slxk"; nvidia,function = "spi4"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; uarta { nvidia,pins = "sdio1"; nvidia,function = "uarta"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; uartd { nvidia,pins = "gmc"; nvidia,function = "uartd"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; ulpi { nvidia,pins = "uaa", "uab", "uda"; nvidia,function = "ulpi"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; ulpi_refclk { nvidia,pins = "cdev2"; nvidia,function = "pllp_out4"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; usb_gpio { nvidia,pins = "spig", "spih"; nvidia,function = "spi2_alt"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; vi { nvidia,pins = "dta", "dtb", "dtc", "dtd"; nvidia,function = "vi"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; vi_sc { nvidia,pins = "csus"; nvidia,function = "vi_sensor_clk"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; }; }; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 7e578f4ce296..b02653da8bd7 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -185,50 +185,50 @@ "gmb", "gmc", "gmd", "gme", "gpu7", "gpv", "i2cp", "pta", "rm", "slxa", "slxk", "spia", "spib", "uac"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_csus { nvidia,pins = "csus", "spid", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_crtp { nvidia,pins = "crtp", "dap2", "dap3", "dap4", "dtc", "dte", "dtf", "gpu", "sdio1", "slxc", "slxd", "spdi", "spdo", "spig", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ddc { nvidia,pins = "ddc", "dta", "dtd", "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf", "sdc"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_hdint { nvidia,pins = "hdint", "lcsn", "ldc", "lm1", "lpw1", "lsc1", "lsck", "lsda", "lsdi", "lvp0", "owc", "sdb"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; conf_irrx { nvidia,pins = "irrx", "irtx", "sdd", "spic", "spie", "spih", "uaa", "uab", "uad", "uca", "ucb"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_lc { nvidia,pins = "lc", "ls"; - nvidia,pull = <2>; + nvidia,pull = ; }; conf_ld0 { nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", @@ -238,12 +238,12 @@ "lhp1", "lhp2", "lhs", "lm0", "lpp", "lpw0", "lpw2", "lsc0", "lspi", "lvp1", "lvs", "pmc"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; }; }; diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts index 274d252c90f8..8cfb83f42e1f 100644 --- a/arch/arm/boot/dts/tegra20-iris-512.dts +++ b/arch/arm/boot/dts/tegra20-iris-512.dts @@ -15,23 +15,23 @@ pinmux@70000014 { state_default: pinmux { hdint { - nvidia,tristate = <0>; + nvidia,tristate = ; }; i2cddc { - nvidia,tristate = <0>; + nvidia,tristate = ; }; sdio4 { - nvidia,tristate = <0>; + nvidia,tristate = ; }; uarta { - nvidia,tristate = <0>; + nvidia,tristate = ; }; uartd { - nvidia,tristate = <0>; + nvidia,tristate = ; }; }; }; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 31c14d09b5af..02923fb96fed 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -178,39 +178,39 @@ "gpu", "gpu7", "gpv", "i2cp", "pta", "rm", "sdio1", "slxk", "spdo", "uac", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_crtp { nvidia,pins = "crtp", "dap3", "dap4", "dtb", "dtc", "dte", "slxa", "slxc", "slxd", "spdi"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_csus { nvidia,pins = "csus", "spia", "spib", "spid", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ddc { nvidia,pins = "ddc", "irrx", "irtx", "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf", "spic", "spig", "uaa", "uab"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_dta { nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd", "spie", "spih", "uad", "uca", "ucb"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_hdint { nvidia,pins = "hdint", "ld0", "ld1", "ld2", @@ -219,23 +219,23 @@ "ld13", "ld14", "ld15", "ld16", "ld17", "ldc", "ldi", "lhs", "lsc0", "lspi", "lvs", "pmc"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; conf_lc { nvidia,pins = "lc", "ls"; - nvidia,pull = <2>; + nvidia,pull = ; }; conf_lcsn { nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2", "lm0", "lm1", "lpp", "lpw0", "lpw1", "lpw2", "lsc1", "lsck", "lsda", "lsdi", "lvp0", "lvp1", "sdb"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; }; }; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 476e4e8bf7cb..1204738dbf29 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -190,53 +190,53 @@ "irtx", "pta", "rm", "sdc", "sdd", "slxd", "slxk", "spdi", "spdo", "uac", "uad", "uca", "ucb", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ate { nvidia,pins = "ate", "csus", "dap3", "gpv", "owc", "slxc", "spib", "spid", "spie"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_crtp { nvidia,pins = "crtp", "gmb", "slxa", "spia", "spig", "spih"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_dta { nvidia,pins = "dta", "dtb", "dtc", "dtd"; - nvidia,pull = <1>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_dte { nvidia,pins = "dte", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_hdint { nvidia,pins = "hdint", "lcsn", "ldc", "lm1", "lpw1", "lsc1", "lsck", "lsda", "lsdi", "lvp0"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; conf_kbca { nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf", "sdio1", "spic", "uaa", "uab"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_lc { nvidia,pins = "lc", "ls"; - nvidia,pull = <2>; + nvidia,pull = ; }; conf_ld0 { nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", @@ -246,22 +246,22 @@ "lhp1", "lhp2", "lhs", "lm0", "lpp", "lpw0", "lpw2", "lsc0", "lspi", "lvp1", "lvs", "pmc", "sdb"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; drive_sdio1 { nvidia,pins = "drive_sdio1"; - nvidia,high-speed-mode = <0>; - nvidia,schmitt = <0>; - nvidia,low-power-mode = <3>; + nvidia,high-speed-mode = ; + nvidia,schmitt = ; + nvidia,low-power-mode = ; nvidia,pull-down-strength = <31>; nvidia,pull-up-strength = <31>; - nvidia,slew-rate-rising = <3>; - nvidia,slew-rate-falling = <3>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; }; }; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 02dbc6965fdc..eb2f9aa211a2 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -176,50 +176,50 @@ "gmb", "gmc", "gmd", "gme", "gpu7", "gpv", "i2cp", "pta", "rm", "slxa", "slxk", "spia", "spib", "uac"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_csus { nvidia,pins = "csus", "spid", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_crtp { nvidia,pins = "crtp", "dap2", "dap3", "dap4", "dtc", "dte", "dtf", "gpu", "sdio1", "slxc", "slxd", "spdi", "spdo", "spig", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ddc { nvidia,pins = "ddc", "dta", "dtd", "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf", "sdc"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_hdint { nvidia,pins = "hdint", "lcsn", "ldc", "lm1", "lpw1", "lsc1", "lsck", "lsda", "lsdi", "lvp0", "owc", "sdb"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; conf_irrx { nvidia,pins = "irrx", "irtx", "sdd", "spic", "spie", "spih", "uaa", "uab", "uad", "uca", "ucb"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_lc { nvidia,pins = "lc", "ls"; - nvidia,pull = <2>; + nvidia,pull = ; }; conf_ld0 { nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", @@ -229,12 +229,12 @@ "lhp1", "lhp2", "lhs", "lm0", "lpp", "lpw0", "lpw2", "lsc0", "lspi", "lvp1", "lvs", "pmc"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; }; diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index babc8fbf1663..ec36fafb0f90 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -192,49 +192,49 @@ "dtb", "dtc", "dtd", "dte", "gmb", "gme", "i2cp", "pta", "slxc", "slxd", "spdi", "spdo", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_atb { nvidia,pins = "atb", "cdev1", "cdev2", "dap1", "gma", "gmc", "gmd", "gpu", "gpu7", "gpv", "sdio1", "slxa", "slxk", "uac"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_csus { nvidia,pins = "csus", "spia", "spib", "spid", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ddc { nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_hdint { nvidia,pins = "hdint", "lcsn", "ldc", "lm1", "lpw1", "lsc1", "lsck", "lsda", "lsdi", "lvp0", "pmc"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; conf_irrx { nvidia,pins = "irrx", "irtx", "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf", "owc", "spic", "spie", "spig", "spih", "uaa", "uab", "uad", "uca", "ucb"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_lc { nvidia,pins = "lc", "ls"; - nvidia,pull = <2>; + nvidia,pull = ; }; conf_ld0 { nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", @@ -244,17 +244,17 @@ "lhp1", "lhp2", "lhs", "lm0", "lpp", "lpw0", "lpw2", "lsc0", "lspi", "lvp1", "lvs", "sdb"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; conf_spif { nvidia,pins = "spif"; - nvidia,pull = <1>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; }; }; diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 323ad642036e..0d83062b9be4 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -190,50 +190,50 @@ "irtx", "pta", "rm", "sdc", "sdd", "slxc", "slxd", "slxk", "spdi", "spdo", "uac", "uad", "uca", "ucb", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ate { nvidia,pins = "ate", "csus", "dap3", "gmd", "gpv", "owc", "spia", "spib", "spic", "spid", "spie", "spig"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_crtp { nvidia,pins = "crtp", "gmb", "slxa", "spih"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_dta { nvidia,pins = "dta", "dtb", "dtc", "dtd"; - nvidia,pull = <1>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_dte { nvidia,pins = "dte", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_hdint { nvidia,pins = "hdint", "lcsn", "ldc", "lm1", "lpw1", "lsck", "lsda", "lsdi", "lvp0"; - nvidia,tristate = <1>; + nvidia,tristate = ; }; conf_kbca { nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf", "sdio1", "uaa", "uab"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_lc { nvidia,pins = "lc", "ls"; - nvidia,pull = <2>; + nvidia,pull = ; }; conf_ld0 { nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", @@ -243,22 +243,22 @@ "lhp1", "lhp2", "lhs", "lm0", "lpp", "lpw0", "lpw2", "lsc0", "lsc1", "lspi", "lvp1", "lvs", "pmc", "sdb"; - nvidia,tristate = <0>; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; drive_sdio1 { nvidia,pins = "drive_sdio1"; - nvidia,high-speed-mode = <0>; - nvidia,schmitt = <1>; - nvidia,low-power-mode = <3>; + nvidia,high-speed-mode = ; + nvidia,schmitt = ; + nvidia,low-power-mode = ; nvidia,pull-down-strength = <31>; nvidia,pull-up-strength = <31>; - nvidia,slew-rate-rising = <3>; - nvidia,slew-rate-falling = <3>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; }; }; diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index 00ba97a916f8..813b04ef8717 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts @@ -190,8 +190,8 @@ "kbcf", "sdc", "sdd", "spie", "spig", "spih", "uaa", "uab", "uad", "uca", "ucb"; - nvidia,pull = <2>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_atd { nvidia,pins = "atd", "ate", "cdev1", "csus", @@ -199,54 +199,54 @@ "dtf", "gpu", "gpu7", "gpv", "i2cp", "rm", "sdio1", "slxa", "slxc", "slxd", "slxk", "spdi", "spdo", "uac", "uda"; - nvidia,pull = <0>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_cdev2 { nvidia,pins = "cdev2", "spia", "spib"; - nvidia,pull = <1>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ck32 { nvidia,pins = "ck32", "ddrc", "lc", "pmca", "pmcb", "pmcc", "pmcd", "xm2c", "xm2d"; - nvidia,pull = <0>; + nvidia,pull = ; }; conf_crtp { nvidia,pins = "crtp"; - nvidia,pull = <0>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_dta { nvidia,pins = "dta", "dtb", "dtc", "dtd", "spid", "spif"; - nvidia,pull = <1>; - nvidia,tristate = <0>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_gme { nvidia,pins = "gme", "owc", "pta", "spic"; - nvidia,pull = <2>; - nvidia,tristate = <1>; + nvidia,pull = ; + nvidia,tristate = ; }; conf_ld17_0 { nvidia,pins = "ld17_0", "ld19_18", "ld21_20", "ld23_22"; - nvidia,pull = <1>; + nvidia,pull = ; }; conf_ls { nvidia,pins = "ls", "pmce"; - nvidia,pull = <2>; + nvidia,pull = ; }; drive_dap1 { nvidia,pins = "drive_dap1"; - nvidia,high-speed-mode = <0>; - nvidia,schmitt = <1>; - nvidia,low-power-mode = <0>; + nvidia,high-speed-mode = ; + nvidia,schmitt = ; + nvidia,low-power-mode = ; nvidia,pull-down-strength = <0>; nvidia,pull-up-strength = <0>; - nvidia,slew-rate-rising = <0>; - nvidia,slew-rate-falling = <0>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; }; }; }; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 648c494e927f..480ecda3416b 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -1,5 +1,6 @@ #include #include +#include #include #include "skeleton.dtsi" -- cgit v1.2.3 From c7ac2b7b1e4d85fe13a52e10f6c3164d778eb550 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 6 Dec 2013 13:51:47 +0100 Subject: ARM: tegra: correct Colibri T20 regulator settings Set the parent of the regulators LDO2 to LDO9 according to the schematic. Set the base voltage to 3.3V, there is only 3.3V on the module itself. Set the Core and CPU voltage to the specified voltages of 1.2V and 1.0V respectivly. LDO6 should deliver 2.85V. The attached peripherals were not in use so far. Signed-off-by: Stefan Agner Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-colibri-512.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'arch/arm/boot/dts/tegra20-colibri-512.dtsi') diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index 7792637a3ba7..81c2c902580a 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -233,15 +233,15 @@ #gpio-cells = <2>; gpio-controller; - sys-supply = <&vdd_5v0_reg>; + sys-supply = <&vdd_3v3_reg>; vin-sm0-supply = <&sys_reg>; vin-sm1-supply = <&sys_reg>; vin-sm2-supply = <&sys_reg>; vinldo01-supply = <&sm2_reg>; - vinldo23-supply = <&sm2_reg>; - vinldo4-supply = <&sm2_reg>; - vinldo678-supply = <&sm2_reg>; - vinldo9-supply = <&sm2_reg>; + vinldo23-supply = <&vdd_3v3_reg>; + vinldo4-supply = <&vdd_3v3_reg>; + vinldo678-supply = <&vdd_3v3_reg>; + vinldo9-supply = <&vdd_3v3_reg>; regulators { #address-cells = <1>; @@ -258,8 +258,8 @@ reg = <1>; regulator-compatible = "sm0"; regulator-name = "vdd_sm0,vdd_core"; - regulator-min-microvolt = <1275000>; - regulator-max-microvolt = <1275000>; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; regulator-always-on; }; @@ -267,8 +267,8 @@ reg = <2>; regulator-compatible = "sm1"; regulator-name = "vdd_sm1,vdd_cpu"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; regulator-always-on; }; @@ -324,8 +324,8 @@ reg = <10>; regulator-compatible = "ldo6"; regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; }; hdmi_vdd_reg: regulator@11 { @@ -484,12 +484,12 @@ #address-cells = <1>; #size-cells = <0>; - vdd_5v0_reg: regulator@100 { + vdd_3v3_reg: regulator@100 { compatible = "regulator-fixed"; reg = <100>; - regulator-name = "vdd_5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; + regulator-name = "vdd_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-always-on; }; -- cgit v1.2.3 From 553c0a200e2082686fd9b829b77f7df6ebae14e9 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 9 Dec 2013 14:43:59 -0700 Subject: ARM: tegra: set up /aliases entries for RTCs This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra114-dalmore.dts | 5 +++++ arch/arm/boot/dts/tegra20-colibri-512.dtsi | 5 +++++ arch/arm/boot/dts/tegra20-harmony.dts | 5 +++++ arch/arm/boot/dts/tegra20-paz00.dts | 5 +++++ arch/arm/boot/dts/tegra20-seaboard.dts | 5 +++++ arch/arm/boot/dts/tegra20-tamonten.dtsi | 5 +++++ arch/arm/boot/dts/tegra20-trimslice.dts | 5 +++++ arch/arm/boot/dts/tegra20-ventana.dts | 5 +++++ arch/arm/boot/dts/tegra20-whistler.dts | 5 +++++ arch/arm/boot/dts/tegra30-beaver.dts | 5 +++++ arch/arm/boot/dts/tegra30-cardhu.dtsi | 5 +++++ 11 files changed, 55 insertions(+) (limited to 'arch/arm/boot/dts/tegra20-colibri-512.dtsi') diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 88be40cf8845..ca4485903b9d 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -7,6 +7,11 @@ model = "NVIDIA Tegra114 Dalmore evaluation board"; compatible = "nvidia,dalmore", "nvidia,tegra114"; + aliases { + rtc0 = "/i2c@7000d000/tps65913@58"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index 81c2c902580a..61bc39335e3a 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -4,6 +4,11 @@ model = "Toradex Colibri T20 512MB"; compatible = "toradex,colibri_t20-512", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index b02653da8bd7..6145f26a0ec5 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -7,6 +7,11 @@ model = "NVIDIA Tegra20 Harmony evaluation board"; compatible = "nvidia,harmony", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 02923fb96fed..c7cd8e6802d7 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -7,6 +7,11 @@ model = "Toshiba AC100 / Dynabook AZ"; compatible = "compal,paz00", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 1204738dbf29..a11b6e7b4759 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -7,6 +7,11 @@ model = "NVIDIA Seaboard"; compatible = "nvidia,seaboard", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index eb2f9aa211a2..a1b0d965757f 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -4,6 +4,11 @@ model = "Avionic Design Tamonten SOM"; compatible = "ad,tamonten", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index ec36fafb0f90..216fa6d50c65 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -7,6 +7,11 @@ model = "Compulab TrimSlice board"; compatible = "compulab,trimslice", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000c500/rtc@56"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 0d83062b9be4..571d12e6ac2d 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -7,6 +7,11 @@ model = "NVIDIA Tegra20 Ventana evaluation board"; compatible = "nvidia,ventana", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index 813b04ef8717..1843725785c9 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts @@ -7,6 +7,11 @@ model = "NVIDIA Tegra20 Whistler evaluation board"; compatible = "nvidia,whistler", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/max8907@3c"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 7e8562a8507d..d36c8212dcbf 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -6,6 +6,11 @@ model = "NVIDIA Tegra30 Beaver evaluation board"; compatible = "nvidia,beaver", "nvidia,tegra30"; + aliases { + rtc0 = "/i2c@7000d000/tps65911@2d"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x80000000 0x7ff00000>; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index f3aab9eb6453..dfcc18adcfd7 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -27,6 +27,11 @@ model = "NVIDIA Tegra30 Cardhu evaluation board"; compatible = "nvidia,cardhu", "nvidia,tegra30"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x80000000 0x40000000>; }; -- cgit v1.2.3