From 1233f59f745b237d85f12aa9cf12ffab469f322d Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 22 Jul 2014 23:27:14 +0400 Subject: phy: Renesas R-Car Gen2 PHY driver This PHY, though formally being a part of Renesas USBHS controller, contains the UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them channels) to the different USB controllers: channel 0 can be connected to either PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI or xHCI controllers. This is a new driver for this USB PHY currently already supported under drivers/ usb/phy/. The reason for writing the new driver was the requirement that the multiplexing of USB channels to the controller be dynamic, depending on what USB drivers are loaded, rather than static as provided by the old driver. The infrastructure provided by drivers/phy/phy-core.c seems to fit that purpose ideally. The new driver only supports device tree probing for now. Signed-off-by: Sergei Shtylyov Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/phy/rcar-gen2-phy.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt (limited to 'Documentation/devicetree/bindings/phy') diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt new file mode 100644 index 000000000000..00fc52a034b7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt @@ -0,0 +1,51 @@ +* Renesas R-Car generation 2 USB PHY + +This file provides information on what the device node for the R-Car generation +2 USB PHY contains. + +Required properties: +- compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC. + "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC. +- reg: offset and length of the register block. +- #address-cells: number of address cells for the USB channel subnodes, must + be <1>. +- #size-cells: number of size cells for the USB channel subnodes, must be <0>. +- clocks: clock phandle and specifier pair. +- clock-names: string, clock input name, must be "usbhs". + +The USB PHY device tree node should have the subnodes corresponding to the USB +channels. These subnodes must contain the following properties: +- reg: the USB controller selector; see the table below for the values. +- #phy-cells: see phy-bindings.txt in the same directory, must be <1>. + +The phandle's argument in the PHY specifier is the USB controller selector for +the USB channel; see the selector meanings below: + ++-----------+---------------+---------------+ +|\ Selector | | | ++ --------- + 0 | 1 | +| Channel \| | | ++-----------+---------------+---------------+ +| 0 | PCI EHCI/OHCI | HS-USB | +| 2 | PCI EHCI/OHCI | xHCI | ++-----------+---------------+---------------+ + +Example (Lager board): + + usb-phy@e6590100 { + compatible = "renesas,usb-phy-r8a7790"; + reg = <0 0xe6590100 0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; + clock-names = "usbhs"; + + usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + usb-channel@2 { + reg = <2>; + #phy-cells = <1>; + }; + }; -- cgit v1.2.3 From ea1e53c7f147c48e5227f7ba67224ee99b67f865 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Thu, 11 Sep 2014 18:02:45 +0100 Subject: phy: phy-stih407-usb: Add dt documentation for USB picophy found on stih407 SoC family This patch adds the dt documentation for the usb picophy found on stih407 SoC family available from STMicroelectronics. Signed-off-by: Giuseppe Cavallaro Signed-off-by: Peter Griffin Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/phy/phy-stih407-usb.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-stih407-usb.txt (limited to 'Documentation/devicetree/bindings/phy') diff --git a/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt b/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt new file mode 100644 index 000000000000..1ef8228db73b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt @@ -0,0 +1,30 @@ +ST STiH407 USB PHY controller + +This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and USB3 +host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroelectronics. + +Required properties: +- compatible : should be "st,stih407-usb2-phy" +- reg : contain the offset and length of the system configuration registers + used as glue logic to control & parameter phy +- reg-names : the names of the system configuration registers in "reg", should be "param" and "reg" +- st,syscfg : sysconfig register to manage phy parameter at driver level +- resets : list of phandle and reset specifier pairs. There should be two entries, one + for the whole phy and one for the port +- reset-names : list of reset signal names. Should be "global" and "port" +See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt +See: Documentation/devicetree/bindings/reset/reset.txt + +Example: + +usb2_picophy0: usbpicophy@f8 { + compatible = "st,stih407-usb2-phy"; + reg = <0xf8 0x04>, /* syscfg 5062 */ + <0xf4 0x04>; /* syscfg 5061 */ + reg-names = "param", "ctrl"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; +}; -- cgit v1.2.3 From d6140c70ed5759e1097cf8ac80f89b208cf0260f Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Mon, 8 Sep 2014 11:33:01 +0100 Subject: phy: phy-stih41x-usb: Add dt documentation for USB phy on STiH415/6 This patch adds dt documentation bindings for the usb phy found on STiH415/5 SoC's from STMicroelectronics, which support USB 1.1 and 2.0. Signed-off-by: Maxime Coquelin Signed-off-by: Peter Griffin Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/phy/phy-stih41x-usb.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt (limited to 'Documentation/devicetree/bindings/phy') diff --git a/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt b/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt new file mode 100644 index 000000000000..00944a05ee6b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt @@ -0,0 +1,24 @@ +STMicroelectronics STiH41x USB PHY binding +------------------------------------------ + +This file contains documentation for the usb phy found in STiH415/6 SoCs from +STMicroelectronics. + +Required properties: +- compatible : should be "st,stih416-usb-phy" or "st,stih415-usb-phy" +- st,syscfg : should be a phandle of the syscfg node +- clock-names : must contain "osc_phy" +- clocks : must contain an entry for each name in clock-names. +See: Documentation/devicetree/bindings/clock/clock-bindings.txt +- #phy-cells : must be 0 for this phy +See: Documentation/devicetree/bindings/phy/phy-bindings.txt + +Example: + +usb2_phy: usb2phy@0 { + compatible = "st,stih416-usb-phy"; + #phy-cell = <0>; + st,syscfg = <&syscfg_rear>; + clocks = <&clk_sysin>; + clock-names = "osc_phy"; +}; -- cgit v1.2.3 From a5ec598650257d9a7abefa6616840c872e194fdb Mon Sep 17 00:00:00 2001 From: Vivek Gautam Date: Tue, 16 Sep 2014 10:32:06 +0530 Subject: phy: exynos-dp-video: Use syscon support to control pmu register Currently the DP_PHY_ENABLE register is mapped in the driver, and accessed to control power to the PHY. With mfd-syscon and regmap interface available at our disposal, it's wise to use that instead of using a 'reg' property for the controller and allocating a memory resource for that. To facilitate this, we have added another compatible string for Exynso5420 SoC to acquire driver data which contains different DP-PHY-CONTROL register offset. Signed-off-by: Vivek Gautam Cc: Jingoo Han Cc: Kishon Vijay Abraham I Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/phy/samsung-phy.txt | 7 +- drivers/phy/phy-exynos-dp-video.c | 79 +++++++++++++++------- 2 files changed, 59 insertions(+), 27 deletions(-) (limited to 'Documentation/devicetree/bindings/phy') diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 7a6feea2a48b..15e0f2c7130f 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -17,8 +17,11 @@ Samsung EXYNOS SoC series Display Port PHY ------------------------------------------------- Required properties: -- compatible : should be "samsung,exynos5250-dp-video-phy"; -- reg : offset and length of the Display Port PHY register set; +- compatible : should be one of the following supported values: + - "samsung,exynos5250-dp-video-phy" + - "samsung,exynos5420-dp-video-phy" +- samsung,pmu-syscon: phandle for PMU system controller interface, used to + control pmu registers for power isolation. - #phy-cells : from the generic PHY bindings, must be 0; Samsung S5P/EXYNOS SoC series USB PHY diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c index 8b3026e2af7f..53f44a0fe0aa 100644 --- a/drivers/phy/phy-exynos-dp-video.c +++ b/drivers/phy/phy-exynos-dp-video.c @@ -13,44 +13,55 @@ #include #include #include +#include +#include #include #include #include #include +#include -/* DPTX_PHY_CONTROL register */ -#define EXYNOS_DPTX_PHY_ENABLE (1 << 0) +struct exynos_dp_video_phy_drvdata { + u32 phy_ctrl_offset; +}; struct exynos_dp_video_phy { - void __iomem *regs; + struct regmap *regs; + const struct exynos_dp_video_phy_drvdata *drvdata; }; -static int __set_phy_state(struct exynos_dp_video_phy *state, unsigned int on) +static void exynos_dp_video_phy_pwr_isol(struct exynos_dp_video_phy *state, + unsigned int on) { - u32 reg; + unsigned int val; + + if (IS_ERR(state->regs)) + return; - reg = readl(state->regs); - if (on) - reg |= EXYNOS_DPTX_PHY_ENABLE; - else - reg &= ~EXYNOS_DPTX_PHY_ENABLE; - writel(reg, state->regs); + val = on ? 0 : EXYNOS5_PHY_ENABLE; - return 0; + regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, + EXYNOS5_PHY_ENABLE, val); } static int exynos_dp_video_phy_power_on(struct phy *phy) { struct exynos_dp_video_phy *state = phy_get_drvdata(phy); - return __set_phy_state(state, 1); + /* Disable power isolation on DP-PHY */ + exynos_dp_video_phy_pwr_isol(state, 0); + + return 0; } static int exynos_dp_video_phy_power_off(struct phy *phy) { struct exynos_dp_video_phy *state = phy_get_drvdata(phy); - return __set_phy_state(state, 0); + /* Enable power isolation on DP-PHY */ + exynos_dp_video_phy_pwr_isol(state, 1); + + return 0; } static struct phy_ops exynos_dp_video_phy_ops = { @@ -59,11 +70,31 @@ static struct phy_ops exynos_dp_video_phy_ops = { .owner = THIS_MODULE, }; +static const struct exynos_dp_video_phy_drvdata exynos5250_dp_video_phy = { + .phy_ctrl_offset = EXYNOS5_DPTX_PHY_CONTROL, +}; + +static const struct exynos_dp_video_phy_drvdata exynos5420_dp_video_phy = { + .phy_ctrl_offset = EXYNOS5420_DPTX_PHY_CONTROL, +}; + +static const struct of_device_id exynos_dp_video_phy_of_match[] = { + { + .compatible = "samsung,exynos5250-dp-video-phy", + .data = &exynos5250_dp_video_phy, + }, { + .compatible = "samsung,exynos5420-dp-video-phy", + .data = &exynos5420_dp_video_phy, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, exynos_dp_video_phy_of_match); + static int exynos_dp_video_phy_probe(struct platform_device *pdev) { struct exynos_dp_video_phy *state; struct device *dev = &pdev->dev; - struct resource *res; + const struct of_device_id *match; struct phy_provider *phy_provider; struct phy *phy; @@ -71,11 +102,15 @@ static int exynos_dp_video_phy_probe(struct platform_device *pdev) if (!state) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - - state->regs = devm_ioremap_resource(dev, res); - if (IS_ERR(state->regs)) + state->regs = syscon_regmap_lookup_by_phandle(dev->of_node, + "samsung,pmu-syscon"); + if (IS_ERR(state->regs)) { + dev_err(dev, "Failed to lookup PMU regmap\n"); return PTR_ERR(state->regs); + } + + match = of_match_node(exynos_dp_video_phy_of_match, dev->of_node); + state->drvdata = match->data; phy = devm_phy_create(dev, NULL, &exynos_dp_video_phy_ops, NULL); if (IS_ERR(phy)) { @@ -89,12 +124,6 @@ static int exynos_dp_video_phy_probe(struct platform_device *pdev) return PTR_ERR_OR_ZERO(phy_provider); } -static const struct of_device_id exynos_dp_video_phy_of_match[] = { - { .compatible = "samsung,exynos5250-dp-video-phy" }, - { }, -}; -MODULE_DEVICE_TABLE(of, exynos_dp_video_phy_of_match); - static struct platform_driver exynos_dp_video_phy_driver = { .probe = exynos_dp_video_phy_probe, .driver = { -- cgit v1.2.3