summaryrefslogtreecommitdiff
path: root/sound/soc/intel/skylake/skl-sst-dsp.c
AgeCommit message (Collapse)AuthorFilesLines
2017-12-20ASoC: Intel: Skylake: Request IRQ late only after all context are initializedSubhransu S. Prusty1-4/+10
Sometimes during boot, panic is observed at sst_dsp_shim_read_unlocked(). This happens when interrupt occurs before the context is initialized. So move the irq initialization only after the context is initialized completely. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Pawse, GuruprasadX <guruprasadx.pawse@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-23ASoC: Intel: Skylake: Fix DSP core ref count for init failureSubhransu S. Prusty1-2/+2
During dsp init failure, the ref count is not incremented and dsp is powered down. But as the skl driver calls put_core for the init failure it decrements the dsp core ref count and ref count becomes unbalanced. This results in dsp core powered up in further runtime suspend/resume cycles and never powered down. So increment the ref count before dsp core powerup and for any failure, decrement in put_core will be balanced. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-03ASoC: Intel: Skylake: Use num_core to allocate instead of macroGuneshwor Singh1-1/+1
For different platforms, number of dsp cores can vary. So instead of creating array of size SKL_DSP_CORES_MAX, use num_core in dsp_ops() of the respective platform to allocate core usage counts and states. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-15ASoC: Intel: bxtn: Update DSP core state in D0Jeeja KP1-2/+4
In system suspend, firmware needs to be re-downloaded as IMR is cleared. When firmware is downloaded in D0, core state is not set to running state causing instability with subsequent D0-D3 cycles. So set the core state correctly during D0 and check the DSP core state if not in reset to set the DSP to D3. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-22ASoC: Intel: Skylake: Add DSP muti-core infrastructureJayachandran B1-70/+183
The DSP can have more than one cores. In that case the secondary core has to be managed by the driver. This patch adds the changes to driver infrastructure to support multiple core. A new object skl_dsp_cores is introduced to support multiple core. Helpers skl_dsp_get_core() skl_dsp_put_core() help to managed the cores. Many of the power_up/down and DSP APIs take additional argument of core_id. The primary core, 0 is always powered up first and then on demand second core. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-14ASoC: Intel: Skylake: Update DSP stall bitsJayachandran B1-6/+5
The stall bits needs to comprehend the number of DSP cores running, so update the stall and unstall register writes to comprehend SKL_DSP_CORES_MASK values as well. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-14ASoC: Intel: Skylake: Update FW purge for BroxtonSenthilnathan Veppur1-2/+2
Broxton needs to send Purge firmware IPC to DSP before downloading the firmware. The DMA id needs to be updated for that. While at it also update Broxton boot sequence to send purge request after power up and before yanking off reset. Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-02ASoC: Intel: Skylake: Fix the NULL pointer exception in dsp_clean upDharageswari.R1-2/+0
If request firmware fails at init, the code loader DMA allocation can be NULL, so check for boot complete before freeing up these resources Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-16ASoC: Intel: Skylake: Freeup properly on skl_dsp_freeVinod Koul1-0/+5
We are supposed to freeup the Code loader DMA allocation and ensure all interrupts are disabled before we disable dsp cores. So invoke these to ensure DSP shuts down properly. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-12ASoC: Intel: Skylake: Unstatify skl_dsp_enable_coreJayachandran B1-1/+1
The function skl_dsp_enable_core will be called by other parts of driver so this can no longer be a static function. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: GuruprasadX Pawse <guruprasadx.pawse@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-12ASoC: Intel: Skylake: Fix whitepsace issuesVinod Koul1-7/+7
Some double whitespaces issues existed in driver, so fix them up. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-09ASoC: Intel: Skylake: Verify the status bit before handling interruptJeeja KP1-0/+5
Like we have in legacy mode HDA driver, we need to check the status bit and handle interrupt only when it is not zero or all bits set. We typically see the status as all 1's when controller resumes from suspend, So add the check here as well and don't handle for these cases. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-09ASoC: Intel: Skylake: Check CPA bit in DSP core power downJeeja KP1-1/+1
Skylake driver will set the SPA bit to 0 to turn off the DSP core. Driver will poll the Current Power Active (CPA) bit to match the Set Power Active (SPA) bit value. When CPA bit matches the value of SPA bit, the achieved power state has reached. In case of DSP power down, register that was polled is SPA instead of CPA. This patch corrects the register to be polled in case of DSP power down. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-16ASoC: Intel: Skylake: Process code loader DMA interruptSubhransu S. Prusty1-0/+5
The code loader DMA interrupt is received by main interrupt handler which dispatches it to cldma routines Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-09ASoC: Intel: Add DSP init and boot up functionality for SKLSubhransu S. Prusty1-0/+337
This patch adds code to enable, disable and boot DSP core. Also provide some helpers to reset and power up/down the core. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>