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AgeCommit message (Expand)AuthorFilesLines
2020-06-30clk: qcom: Fix return value check in apss_ipq6018_probe()Wei Yongjun1-2/+2
2020-06-26clk: bcm: dvp: Add missing module informationsMaxime Ripard1-0/+4
2020-06-24clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2Martin Blumenstingl1-7/+0
2020-06-23clk: imx: vf610: add CAAM clockAndrey Smirnov1-0/+1
2020-06-23clk: imx8mp: add mu root clkPeng Fan1-0/+1
2020-06-23clk: vc5: Enable addition output configurations of the VersaclockAdam Ford1-0/+156
2020-06-23clk: vc5: Allow Versaclock driver to support multiple instancesAdam Ford1-47/+37
2020-06-23clk: qcom: smd: Add support for MSM8936 rpm clocksVincent Knecht1-0/+50
2020-06-22clk: renesas: rzg2: Mark RWDT clocks as criticalUlrich Hecht3-0/+3
2020-06-22clk: renesas: rcar-gen3: Mark RWDT clocks as criticalUlrich Hecht7-5/+7
2020-06-22clk: renesas: cpg-mssr: Mark clocks as critical only if on at bootUlrich Hecht1-8/+9
2020-06-22clk: qcom: smd: Add support for SDM660 rpm clocksKonrad Dybcio1-0/+76
2020-06-22clk: add function documentation for clk_hw_round_rate()Sarang Mairal1-0/+15
2020-06-22clk: qcom: Add ipq6018 apss clock controllerSivaprakash Murugesan3-0/+118
2020-06-22clk: qcom: Add ipq apss pll driverSivaprakash Murugesan3-0/+104
2020-06-20clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clkDinh Nguyen1-1/+1
2020-06-20clk: socfpga: agilex: add nand_x_clk and nand_ecc_clkDinh Nguyen1-1/+5
2020-06-20clk: bcm: rpi: Remove the quirks for the CPU clockMaxime Ripard1-164/+0
2020-06-20clk: bcm2835: Don't cache the PLLB rateMaxime Ripard1-2/+3
2020-06-20clk: bcm2835: Allow custom CCF flags for the PLLsMaxime Ripard1-1/+2
2020-06-20Revert "clk: bcm2835: remove pllb"Maxime Ripard1-4/+26
2020-06-20clk: bcm: rpi: Give firmware clocks a nameMaxime Ripard1-1/+20
2020-06-20clk: bcm: rpi: Discover the firmware clocksMaxime Ripard1-12/+141
2020-06-20clk: bcm: rpi: Add an enum for the firmware clocksMaxime Ripard1-4/+19
2020-06-20clk: bcm: rpi: Add DT provider for the clocksMaxime Ripard1-0/+16
2020-06-20clk: bcm: rpi: Make the PLLB registration function return a clk_hwMaxime Ripard1-22/+24
2020-06-20clk: bcm: rpi: Split pllb clock hooksMaxime Ripard1-8/+22
2020-06-20clk: bcm: rpi: Rename is_prepared functionMaxime Ripard1-2/+2
2020-06-20clk: bcm: rpi: Pass the clocks data to the firmware functionMaxime Ripard1-15/+14
2020-06-20clk: bcm: rpi: Add clock id to dataMaxime Ripard1-9/+9
2020-06-20clk: bcm: rpi: Create a data structure for the clocksMaxime Ripard1-10/+21
2020-06-20clk: bcm: rpi: Use CCF boundaries instead of rolling our ownMaxime Ripard1-10/+8
2020-06-20clk: bcm: rpi: Make sure the clkdev lookup is removedMaxime Ripard1-2/+3
2020-06-20clk: bcm: rpi: Switch to clk_hw_register_clkdevMaxime Ripard1-6/+5
2020-06-20clk: bcm: rpi: Remove pllb_arm_lookup global pointerMaxime Ripard1-4/+4
2020-06-20clk: bcm: rpi: Make sure pllb_arm is removedMaxime Ripard1-2/+1
2020-06-20clk: bcm: rpi: Remove global pllb_arm clock pointerMaxime Ripard1-4/+3
2020-06-20clk: bcm: rpi: Use clk_hw_register for pllb_armMaxime Ripard1-6/+18
2020-06-20clk: bcm: rpi: Statically init clk_init_dataMaxime Ripard1-2/+1
2020-06-20clk: bcm: rpi: Allow the driver to be probed by DTMaxime Ripard1-2/+17
2020-06-20firmware: rpi: Only create clocks device if we don't have a node for itMaxime Ripard1-0/+14
2020-06-20clk: bcm: Add BCM2711 DVP driverMaxime Ripard3-0/+132
2020-06-20Merge branch 'reset/simple' of git://git.pengutronix.de/git/pza/linux into cl...Stephen Boyd5-49/+24
2020-06-20clk: bcm63xx-gate: switch to dt-bindings definitionsÁlvaro Fernández Rojas1-141/+439
2020-06-20clk: bcm63xx-gate: add BCM6318 supportÁlvaro Fernández Rojas1-0/+44
2020-06-20clk: bcm63xx-gate: fix last clock availabilityÁlvaro Fernández Rojas1-0/+1
2020-06-19clk: meson: g12a: Add support for NNA CLK source clocksDmitry Shmidt2-1/+125
2020-06-17clk: rockchip: Handle clock tree for rk3288w variantMylène Josserand1-2/+18
2020-06-16reset: simple: Add reset callbackMaxime Ripard1-0/+20
2020-06-16reset: Move reset-simple header out of drivers/resetMaxime Ripard5-49/+4