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path: root/drivers/usb/dwc3
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2012-08-03usb: dwc3: ep0: move DATA phase away from on-demandFelipe Balbi1-0/+62
We uncovered a limitation of this core WRT to the Link Layer Compliance Suite's TD7.06. On that test, host will start a GetDescriptor(DEVICE) standard request, but it will do so only on the SETUP phase, meaning there will *NOT* be any DATA or STATUS phases. The idea of the test is to verify robustness of the IP WRT framing errors, so the test will send a sequence of different SETUP_DPs each with a different framing error and the Suite expects us to be able to receive all SETUP_DPs with no timeouts. This core, has the ability to tell us which phase the host is expecting before we start it. Whenever we receive a TP or DP when no transfers are cached on the internal IP's caches, the IP will generate a XferNotReady event with status informing us (in case of physical ep0/ep1) if it's related to DATA or STATUS phases - SETUP phase is expected to be prestarted. Because we're always waiting for XferNotReady events for DATA and STATUS phases, we will never be able to know that the Host wants to start another SETUP phase instead, which will render us "not compliant" with TD7.06. In order to "fix" the problem we must not rely on XferNotReady events for the DATA phase and try to always pre-start DATA transfers on physical endpoints 0 and 1. If host goes back to SETUP phase from DATA phase we will receive a XferComplete for that phase with TRB's status set to SETUP_PENDING, which is only useful for printing a debugging log as the core expects us to still go through to the STATUS phase, initiate a CONTROL_STATUS TRB just so it completes right away and, only then, we go back to the pending SETUP phase. SNPS has decided to modify the programming model of the core so that on-demand DATA phases will not be supported anymore. Note that this limitation does not affect 2-stage transfers, meaning that if TD7.06 would start a 2-stage transfer instead of a 3-stage transfer, we would receive a "fake" XferNotReady(STATUS) which would complete right after being initiated with SETUP_PENDING status. Other endpoints are also not affected, so we can still use on-demand transfers on Bulk/Isoc/Interrupt endpoints. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-08-03usb: dwc3: ep0: ignore XferNotReady(STATUS) when we're not expecting itFelipe Balbi1-9/+3
Databook doesn't say we should stall if we get XferNotReady(STATUS) while we're expecting something else. Instead of stalling and restarting, tests have proven that ignoring the event is far more effective. This problem has been caught while rewriting ep0 handling in order we pass Link Layer TD7.6. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-08-03usb: dwc3: ep0: drop dead codeFelipe Balbi2-51/+0
There's no such thing as XferNotReady(SETUP), we can safely drop all that code with no problems whatsoever. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-08-03usb: dwc3: ep0: split the special cases on ep0_queueFelipe Balbi1-1/+11
We can return early from each if () branch and split the special cases for clarity. While at that also add a comment to the delayed_status case. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-08-03usb: dwc3: ep0: drop unnecessary variableFelipe Balbi1-2/+1
When returning from ep0_queue, we have an unnecessary ret variable which is always zero. Remove it. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-08-03usb: dwc3: gadget: set Ignore Sequence Number bit from ConnectDone EventFelipe Balbi1-8/+13
Databook says we should set Ignore Sequence Number bit from ConnectDone Event, so let's do so. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-07-06Merge tag 'dwc3-for-v3.6' of ↵Greg Kroah-Hartman6-229/+407
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next usb: dwc3: patches for v3.6 merge window lots of changes for the dwc3 driver which will make the driver a lot more stable and some changes which are just cosmetic. The bulk of changes is related to mis-defined macros which were never used before, some fixes to error path which e.g. prevent the driver from initiating two transfer on ep0out in case of stall, some fixes to request dequeueing and the End Transfer Command. We have some changes to U1/U2 handling where we were enabling those transtions at the wrong spot (though we haven't seen a problem from that as of today). A few patches will make it easier to add support for newer releases of the core by adding definitions for new registers and changing the code to act accordingly when certain revisions are detected. There's also the usual comestic changes to make the driver easier to maintain and make it easier for new- comers to understand the driver. Also one patch fixing a double inclusion of a header.
2012-07-06Merge tag 'gadget-for-v3.6' of ↵Greg Kroah-Hartman1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next usb: gadget: patches for v3.6 merge window This is quite a big pull request and contains patches all over the place. omap_udc is now a bit cleaner after removing omap2 support, fixing some checkpatch.pl warnings and errors, switching over to generic map/unmap routines and preventing a NULL pointer de-reference. s3c-hsotg has been switched over to devm_* API, got some locking fixes and improvements and it also got an implementation for the pullup() method. the mass storage gadgets changed default value of the removable parameter, dropped some unused options and made "file" and "ro" module_parameters read-only in some cases. ffs function got support for HID descriptor. Some UDCs have been converted to clk_prepare_enable() and clk_disable_unprepare(). Marvell now got support for its USB3 controller in mainline after introducing its mv_u3d_core.c driver.
2012-07-02usb: dwc3: return error in case of run/stop timeoutPratyush Anand1-4/+7
Although timeout has never been experienced, still to make it meaningful, its better to return error if it ever occurs. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-07-02usb: dwc3: enable ACCEPT{U1,U2}ENA when SetConfiguration receivedPratyush Anand2-1/+9
As per databook, ACCEPT{U1,U2}ENA bits should be set after receiving SetConfiguration Command. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-07-02usb: dwc3: no need to clear INIT{U1,U2}ENA bitsPratyush Anand1-1/+0
as per databook, these bits are cleared by hardware on each USB reset, so no need to clear it explicitly by software in reset ISR. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-07-02usb: dwc3: keep default hird threshold value as 4b1100Pratyush Anand1-1/+1
as per data book any HIRD threshold value greater than 4b1100 is invalid. So set the maximum valid value as default values. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-07-02usb: dwc3: correct set_halt implementation for ep0Pratyush Anand3-2/+16
set_halt for ep0 is called to stall a deferred control responses by the gadget. We already have a function to stall default control endpoint. This patch points set_halt for ep0 to the already available function. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Michel Sanches <michel.sanches@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-25usb: dwc3: ep0: prevent starting transfers twice on ep0Felipe Balbi1-0/+1
In case we try to start an invalid test mode, we will call dwc3_ep0_stall_and_restart() but we will also call dwc3_ep0_out_start() which will start a second transfer on ep0. Let's prevent any problems by returning early in the error case. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-25usb: dwc3: gadget: remove duplicated code from __dwc3_gadget_ep_set_haltFelipe Balbi1-9/+0
whenever we want to stall ep0, we always call dwc3_ep0_stall_and_restart() which makes sure to send ep0state properly rendering the code in __dwc3_gadget_ep_set_halt() duplicated. Reported-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-25usb: dwc3: rename res_trans_idx to resource_indexFelipe Balbi3-12/+12
resource_index is more human readable. No functional changes. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-25usb: dwc3: gadget: split special cases of ep_queue()Felipe Balbi1-22/+28
It makes it easier to read and also avoids setting DWC3_EP_PENDING_REQUEST just so the next branch evaluates true. No functional changes otherwise. Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-25usb: dwc3: remove WARN_ON from dwc_stop_active_transferPratyush Anand1-10/+10
Now we are sure that, if res_trans_idx is zero, then endpoint has been stopped. So it's safe to just return if endpoint is already stopped. No need to generate warning anymore. While doing so, it's better to return when res_trans_idx is zero and decrease one level of indentation. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> [ balbi@ti.com: slightly changed commit log ] Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-22USB: DWC3: Issue device soft reset before core soft resetPratyush Anand1-2/+2
Synopsys specification clearly states under section "Device Power-On or Soft Reset" that DCTL.CSftRst=1 should be first step. So, just follow what specification says. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-22USB: DWC3: Put 100 ms delay for phy to be stablePratyush Anand1-0/+2
Before taking core out of reset phy must be stable. So wait for 100ms after clear phy reset. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-22usb: dwc3: Remove duplicate header file inclusionSachin Kamat1-1/+0
module.h header file was included twice. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-15usb: dwc3: giveback all queued request when ep disabled or reset receivedPratyush Anand1-2/+5
In case of ep_disable and reset interrupt is received and, still there was at least one request queued for dma transfer, then endpoint is stopped first. Once endpoint is stopped, callback for all queued request must be called. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-15usb: dwc3: fix giveback of queued request in ep_dequeuePratyush Anand1-1/+2
In case of ep_dequeue , if dequeued request was submitted for dma transfer, then endpoint is stopped. Once endpoint is stooped, callback for the dequeued request must be called. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-12usb: gadget: composite: fix ep->maxburst initializationFelipe Balbi1-1/+1
bMaxBurst field on endpoint companion descriptor is supposed to contain the number of burst minus 1. When passing that to controller drivers, we should be passing the real number instead (by incrementing 1). While doing that, also fix the assumption on dwc3 that value comes decremented by one. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-06usb: dwc3: resume phy during gadget initialization on recent coresPratyush Anand1-2/+2
It is needed to enumerate recent cores like 2.10a. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-06usb: dwc3: Correct DWC3_DCTL_HIRD_THRES definitionPratyush Anand1-1/+1
The definition of DWC3_DCTL_HIRD_THRES macro is completely wrong. It will only work for when we want to read the register's contents for that bitfield. Change the macro so that it can be used to writing to the register, and when we need to read, we can add extra right shift of 24 bits. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> [ balbi@ti.com: add a commit log ] Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-06usb: dwc3: gadget: ignore endpoint IRQs when endpoint is disabledFelipe Balbi1-0/+3
By the time we're disabling the endpoint, HW could already have posted more events to our event buffer. In that case, we will receive endpoint events for a disabled endpoint. In order to protect ourselves from that situation, we simply ignore endpoint interrupts whenever the endpoint is disabled. Tested-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-06usb: dwc3: gadget: don't call stop_active_transfers() on disconnectFelipe Balbi1-1/+0
In case we get disconnected, we will call gadget driver's disconnect method, which should make sure to disable all endpoints. At that point we will call stop_active_transfers() to make sure we didn't leave any pending request on the controller. Tested-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-06usb: dwc3: gadget: don't wait for ep cmd IRQFelipe Balbi1-39/+27
That IRQ is causing way too much trouble. We have a different handling which was agreed with IP provider and has been tested with FPGA and OMAP5. Tested-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-06usb: dwc3: gadget: drop useless codeFelipe Balbi1-3/+0
We never set CMDIOC bit for Start Transfer command, so that code will never be used. Tested-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: Fix break from cleanup request loopPratyush Anand1-1/+2
If event status says that its last completed TRB but TRB is still owned by HW then break from the loop, because we are not going to get correct TRB status from trb control/size register. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: Fix missed isoc IN transactionPratyush Anand2-24/+52
If an IN transfer is missed on isoc endpoint, then driver must insure that next ep_queue is properly handled. This patch fixes this issue by starting a new transfer for next queued request. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04USB: DWC3: Correct DWC3_DSTS_SOFFN_MASK definitionPratyush Anand1-1/+1
SOF Number is bit16:3 of DSTS. Correct the mask accordingly. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04USB: DWC3: Correct DWC3_TRB_SIZE_TRBSTS definitionPratyush Anand1-1/+1
Correct define for DWC3_TRB_SIZE_TRBSTS. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04USB: DWC3: Generate interrupt on each TRB as default optionPratyush Anand1-2/+1
Currently in case of isoc, interrupt is programmed after each TRB_NUM/4 ie 8th TRB. A TRB is programmed against each submitted request from gadget. If we do not want to limit the minimum number of necessary request to be submitted from gadget then we must receive interrupt on each TRB submission. There can be such situation with a gadget working with ping-pong buffer. If a gadget does not want to receive interrupt after each request completion then it may set no_interrupt flag. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: ep0: rename dwc3_ep0_complete_req to dwc3_ep0_complete_statusFelipe Balbi1-2/+2
That's a much more intuitive name as that function is only called at the completion of a Status Phase. It also matches dwc3_ep0_complete_data() for the completion of Data Phase. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: ep0: be careful with endianness on SetSEL commandFelipe Balbi1-2/+2
USB is always little endian, but this driver could run on non little endian cpus. Let's be carefull with that. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: ep0: simplify error handling on dwc3_ep0_inspect_setupFelipe Balbi1-7/+5
There's no need for returning early. Instead, we can call dwc3_ep0_stall_and_restart() conditionally. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: gadget: move AcceptU1Ena and AcceptU2Ena to Reset IRQGerard CAUVY1-4/+1
According to the databook, the DWC3 Core will reset those bits to 0 on USB Bus Reset. This means we must re-enable those bits on every reset interrupt. Because we will always get a Reset interrupt after loading a gadget driver, we can, instead of re-enabling something that was just lost, move the handling of those bits to the Reset Interrupt. This patch fixes USB30CV U1/U2 Test. Signed-off-by: Gerard CAUVY <g-cauvy1@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: gadget: disable U1/U2 on disconnectFelipe Balbi1-5/+2
If we get a disconnect IRQ, we should take the core out of low power mode so we can reconnect afterwards. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: gadget: prevent DCTL register corruptionFelipe Balbi1-0/+1
If we don't read out the contents of the register (in order to reinitialize 'reg' variable) we will be writing unknown contents to the DCTL register whenever we try to use dwc3_gadget_wakeup() function. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: core: make sure evt->lpos is correctly initializedPaul Zimmerman1-1/+6
The same event buffers will be reused when coming out of hibernation, so we must reinitialize them properly to avoid any mistakes. While at that, also take dwc3_event_buffers_setup() out of __devinit section. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: support new revisions of DWC3 corePaul Zimmerman1-13/+70
Recent cores (>= 1.94a) have a set of new features, commands and a slightly different programming model. This patch aims to support those changes. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: gadget: rename phy_power() to phy_suspend()Paul Zimmerman1-16/+16
those two functions don't power PHYs, they simply put them in suspend state. Rename to reflect better what functions actually do. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: gadget: reinitialize retriesPaul Zimmerman1-0/+1
retries is used twice without being reinitialized. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: add definitions for new registersPaul Zimmerman2-19/+80
This patch adds definitions for some new registers that have been added to later versions of the controller, up to v2.10a. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: gadget: remove trailing semicolonFelipe Balbi1-1/+1
That semicolon doesn't do anything, it's not needed and should be removed. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: ep0: fix a typo in commentFelipe Balbi1-1/+1
s/has/have. No functional changes, just a typo fix on a code comment. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: ep0: align on function signatureFelipe Balbi1-6/+12
On our Transfer Not Ready handlers, only dwc3_ep0_do_control_status() had a different list of parameters. Align on the parameters in order to keep consistency. No functional changes. Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-06-04usb: dwc3: ep0: switch over to IS_ALIGNEDFelipe Balbi1-1/+1
IS_ALIGNED provides a much faster operation for checking proper size alignment then a modulo operation. Let's use it. Reported-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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