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path: root/drivers/spi/spi-hisi-sfc-v3xx.c
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2021-04-12spi: hisi-sfc-v3xx: drop unnecessary ACPI_PTR and related ifendif protectionYicong Yang1-4/+2
We use ACPI_PTR() and related ifendif protection for the id table. This is unnecessary as the struct acpi_device_id is defined in mod_devicetable.h and doesn't rely on ACPI. The driver doesn't use any ACPI apis, so it can be compiled in the ACPI=n case with no warnings. So remove the ACPI_PTR and related ifendif protection, also replace the header acpi.h with mod_devicetable.h. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1618228708-37949-3-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-12spi: hisi-sfc-v3xx: fix potential irq race conditionYicong Yang1-0/+1
We mask the irq when the command completion is timeout. This won't stop the already running irq handler. Use sychronize_irq() after we mask the irq, to make sure there is no running handler. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1618228708-37949-2-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-27spi: hisi-sfc-v3xx: add address mode checkYicong Yang1-1/+24
The address mode is either 3 or 4 for the controller, which is configured by the firmware and cannot be modified in the OS driver. Get the firmware configuration and add address mode check in the .supports_op() to block invalid operations. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Acked-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1611740450-47975-3-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-13spi: hisi-sfc-v3xx: extend version checking compatibilityYicong Yang1-6/+2
Currently we use concrete version to determine the max_cmd_dword. New entries should be added for compatible hardwares of new version or on new platform, otherwise the device will use 16 dwords instead of 64 even if it supports, which will degrade the performance. This will decrease the compatibility and the maintainability. Drop the switch-case statement of the version checking. Only version less than 0x351 supports maximum 16 command dwords. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Acked-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1610526716-14882-1-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-28spi: hisi-sfc-v3xx: fix spelling mistake "occured" -> "occurred"Colin Ian King1-1/+1
There is a spelling mistake in a dev_err message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20200928123042.125359-1-colin.king@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-25spi: hisi-sfc-v3xx: add support for IRQ modeYicong Yang1-22/+109
The controller can work with interrupts, so add support for it. Then we can work under IRQ mode or Poll mode now, if firmware doesn't declare the IRQ support, it will fall back to Poll mode. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1600950270-52536-5-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-25spi: hisi-sfc-v3xx: factor out the bit definition of interrupt registerYicong Yang1-6/+10
The definition of the register field in the interrupt corresponding registers are the same. So factor them out to public place. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1600950270-52536-4-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-25spi: hisi-sfc-v3xx: factor out bus config and transfer functionsYicong Yang1-9/+24
In hisi_sfc_v3xx_generic_exec_op(), we will write the data to the buffer, configure and start the transfer, read the data to the buffer and check whether occurs an error. Factor out the config and transfer start codes as individual functions, to make the process a bit clearer. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1600950270-52536-3-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-25spi: hisi-sfc-v3xx: factor out IO modes configurationYicong Yang1-42/+55
Factor IO modes configuration out of hisi_sfc_v3xx_generic_exec_op() using an IO modes lookup table. This will make the process a bit clearer and reduce the cyclomatic complexity. Simplify the IO mode definition macros a little bit as well. Also add the .supports_op() method for the controller mem ops, in order to avoid OOB access. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1600950270-52536-2-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-04-17spi: hisi-sfc-v3xx: add error check after per operationYicong Yang1-1/+25
The controller may receive instructions of accessing protected address, or may perform failed page program. These operations will not succeed and the controller will receive interrupts when such failure occur. Previously we don't check the interrupts and return 0 even if such operation fails. Check the interrupts after per command and inform the user if there is an error. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Acked-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1587109707-23597-1-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-28spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bitsJohn Garry1-1/+55
The Huawei D06 board (and variants) can support Quad mode of operation. Since we have no current method in ACPI SPI bus device resource description to describe this information, use DMI to detect the board, and set the controller buswidth override bits. Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1582903131-160033-4-git-send-email-john.garry@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-02-28spi: HiSilicon v3xx: Properly set CMD_CONFIG for Dual/Quad modesJohn Garry1-0/+43
The CMD_CONFIG register memory interface type field is not set configured for Dual and Quad modes, so set appropriately. This was not detected previously as we only ever operated in standard SPI mode. Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1582903131-160033-3-git-send-email-john.garry@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-01-10spi: Add HiSilicon v3xx SPI NOR flash controller driverJohn Garry1-0/+284
Add the driver for the HiSilicon v3xx SPI NOR flash controller, commonly found in hi16xx chipsets. This is a different controller than that in drivers/mtd/spi-nor/hisi-sfc.c; indeed, the naming for that driver is poor, since it is really known as FMC, and can support other memory technologies. The driver module name is "hisi-sfc-v3xx", as recommended by HW designer, being an attempt to provide a distinct name - v3xx being the unique controller versioning. Only ACPI firmware is supported. DMA is not supported, and we just use polling mode for operation completion notification. The driver uses the SPI MEM OPs. Signed-off-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1575900490-74467-3-git-send-email-john.garry@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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