summaryrefslogtreecommitdiff
path: root/drivers/soc
AgeCommit message (Collapse)AuthorFilesLines
2021-11-06Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"Lucas Stach1-2/+2
commit 2b2f106eb55276a60a89ac27a52d0d738b57a546 upstream. This reverts commit a77ebdd9f553. It turns out that the VPU domain has no different requirements, even though the downstream ATF implementation seems to suggest otherwise. Powering on the domain with the reset asserted works fine. As the changed sequence has caused sporadic issues with the GPU domains, just revert the change to go back to the working sequence. Cc: <stable@vger.kernel.org> # 5.14 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Peng Fan <peng.fan@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-11-05soc: aspeed: mctp: fix a build breakJae Hyun Yoo1-2/+2
This commit fixes a build break which is caused by an incompatible compare function parameter of list_sort() call. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
2021-11-05soc: aspeed: mctp: Clear TX channel and client rings after resetIwona Winiarska1-15/+64
Currently, after TX channel wr_ptr reaches the maximum value, there is no mechanism to clear it. The driver expects that the HW will make forward progress, and eventually the buffer will have free space available. That's not true for some reset scenarios and when this happens, we may end up with a blocked full channel. While we could fix it by just adding a trigger after reset, this may cause userspace to receive unexpected responses for packets that got stuck in queues during reset. Let's fix it by flushing both TX channel and client rings. Note: The barriers are necessary just to enforce ordering between flush and producing new packets by the clients (we don't want to flush packets that were sent after reset, just the ones that were sent before it) but to keep things consistent, introduce helpers for all priv->pcie.bdf accesses. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> Change-Id: I457a05a6e7f0cb1fd8ce6f2bff6a59b166d32149
2021-11-05soc: aspeed: lpc-sio: add SMI event triggering supportJae Hyun Yoo1-0/+30
Add SMI event triggering support. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: I711b5642a654e671a2d97d3079e3a1a055d400a0
2021-11-05Add chip unique id reading interfaceJae Hyun Yoo1-10/+109
This commit adds an interface for reading chip unique id value. Optionally, the id can be encrypted using a dts-supplied hash data. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com> Change-Id: Ifd98500ea87b3d40e1738e583e077a74851fae35
2021-11-05soc: aspeed: mctp: Reject packets with invalid payload sizeIwona Winiarska1-9/+27
When we program TX command register, it requires packet data size in dwords. Since the aspeed-mctp driver doesn't implement MCTP protocol, it copies MCTP packet "as it" form userspace and uses size from write() syscall to program TX command. If the size from write() doesn't match the payload length in packet PCIe VDM header, it causes MCTP HW to stop working and we are not able to reset it without platform power cycle. To avoid HW issues, let's verify if the data size from write() matches the payload length in PCIe VDM header. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> Change-Id: I6da14babadcc65cb2ba4a2b685495d1baa92c169
2021-11-05soc: aspeed: add a raw value setting interface for uart routingJae Hyun Yoo1-17/+51
This commit adds a raw value setting interface for uart routing to provide an atomic way of switching the route. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Change-Id: Id8b80f44f9a503d9f25a692211fc5ec78500ce68
2021-11-05mailbox: ioctl to fetch mailbox sizeArun P. Mohanan1-0/+20
The size of mailbox differ from AST2500, AST2600 A0 and A1. Add an ioctl support to fetch the mailbox size. Tested: Verfied ioctl call returns mailbox size as expected. Change-Id: I4e261aaf8aa3fb108d6ad152d30a17b114d70ccd Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com>
2021-11-05soc: aspeed: Miscellaneous control interfacesAndrew Jeffery3-0/+199
The ASPEED BMC SoCs have many knobs and switches that are sometimes design-specific and often defy any approach to unify them under an existing subsystem. Add a driver to translate a devicetree table into sysfs entries to expose bits and fields for manipulation from userspace. This encompasses concepts from scratch registers to boolean conditions to enable or disable host interface features. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-11-05soc: aspeed: mctp: Export function used to read BDFIwona Winiarska1-0/+19
Recently, aspeed-mctp driver functionality was extended to store BDF values for already discovered MCTP endpoints on PCIe bus. Let's expose kernel API to read BDF based on endpoint ID. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-11-05Enable mailbox interruptsYong Li1-49/+90
Support interrupt generation for both 16 and 32 mailbox registers. Tested: After applied this patch, write the mailbox registers from BIOS side, the misc manager can capture the new mailbox data. Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
2021-11-05soc: aspeed: aspeed-espi-slave: fix SUS_WARN handling logicJae Hyun Yoo1-18/+27
This commit fixes SUS_WARN handling as dual-edge detection mode to support deepsx entry event properly. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
2021-11-05Add poll fops in eSPI driverArun P. Mohanan1-24/+61
Modify eSPI driver to support poll fops. Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com>
2021-11-05Add AST2500 eSPI driverHaiyue Wang3-0/+474
When PCH works under eSPI mode, the PMC (Power Management Controller) in PCH is waiting for SUS_ACK from BMC after it alerts SUS_WARN. It is in dead loop if no SUS_ACK assert. This is the basic requirement for the BMC works as eSPI slave. Also for the host power on / off actions, from BMC side, the following VW (Virtual Wire) messages are done in firmware: 1. SLAVE_BOOT_LOAD_DONE / SLAVE_BOOT_LOAD_STATUS 2. SUS_ACK 3. OOB_RESET_ACK 4. HOST_RESET_ACK Also, it provides monitoring interface of PLTRST_N signal through /dev/espi-pltrstn Signed-off-by: Haiyue Wang <haiyue.wang@linux.intel.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Signed-off-by: James Feist <james.feist@linux.intel.com> Signed-off-by: Vernon Mauery <vernon.mauery@intel.com>
2021-11-05soc: aspeed: mctp: Register peci_mctp deviceIwona Winiarska1-1/+9
Now that it is possible to send PECI frames via aspeed-mctp driver, let's add aspeed-peci-mctp node to allow bind peci-mctp-aspeed adapter driver. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-11-05soc: aspeed: mctp: Fix TX hangs and optimize TX logicAndrzej Kacprowski1-58/+42
Currently driver submits 1 (or rarely more than 1) packet then waits until HW signals transmission completion before sending more packets. This logic requires interrupt after each packet, aspeed_mctp_tx_tasklet() is invoked twice per packet. New logic uses TX ring correctly, packets are added to the end of circular ring buffer. The driver does not have to wait for HW to complete transmission of enqueued packets before adding more packets to TX queue. Interrupt is generated only if TX ring if full. This change significantly improves packet transmission performance: PECI GetTemp command takes ~25us instead of ~30us. This change also fixes sporadic TX hangs during host reboot seen with current driver. Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Update source EID in TX packetsAndrzej Kacprowski1-1/+26
If self EID is known then the driver updates source EID in MCTP header of sent packets. For MCTP control packets the source EID is not updated as it may disrupt MCTP discovery flow. Self EID is determined from list of known endpoints provided by ASPEED_MCTP_IOCTL_SET_EID_INFO IOCTL. Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Fix RX hangs and RX packet missesAndrzej Kacprowski1-76/+133
Under even moderate traffic the driver can miss a lot of received packets and eventually stops receiving packets at all. There is an bug in AST2600 RX logic where HW does not wrap around RX read buffer pointer correctly. Current driver workaround for this bug resets RX HW read pointer to 0 whenever it reaches end of the RX buffer ring - this does not work properly if more than 1 packet is received while RX pointer is close to the end of the RX buffer ring - in such case HW can detect ring full condition and stop RX. The new workaround has different logic: it sets HW buffer count to 4n - 1 and updates driver maintained RX write pointer so it tracks HW read pointer to prevent hardware from stopping. Received packets are located by looking into RX data buffers rather that HW read pointer that contains incorrect value anyway. Driver never resets HW read pointer, HW is receiving packets without any interference form the driver. Also handle RX_CMD_NO_MORE_INT - if RX ring if full then HW will clear RX_CMD_READY bit and we need to re-enable it once we free some space in RX ring. Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Expose internal kernel APIIwona Winiarska1-39/+73
Some protocols that are already implemented in kernel can be encapsulated in MCTP packets. To allow use aspeed-mctp internally in kernel space, let's allow to use selected functions outside of aspeed-mctp. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-11-05soc: aspeed: mctp: Fix header swapping consistencyIwona Winiarska1-24/+23
Right now, TX ring contains packets with PCIe header already swapped to little endian (byte order expected by HW), while RX ring contains packets with PCIe header already swapped to network order (expected by userspace). Let's keep TX packets in network order and swap before write to HW buffer. To make it more readable, let's extract swapping into a helper function. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-11-05aspeed-mctp: Add EID information related ioctlsKarol Wachowski1-0/+178
Implement two new ioctls for storing EID related information: * ASPEED_MCTP_IOCTL_GET_EID_INFO * ASPEED_MCTP_IOCTL_SET_EID_INFO Driver stores EID mapping in a list which is traversed when one tries to get information using ASPEED_MCTP_IOCTL_GET_EID_INFO ioctl, when given EID mapping is not found in the list, next entry is returned. When there are no entries with EIDs higher than specified in the IOCTL call -ENODEV is returned. Whenever new information about EID mapping is stored with ASPEED_MCTP_IOCTL_SET_EID_INFO ioctl driver empties exsiting list of mappings and creates new one based on user input. After insertion list is sorted by EID. Invalid input such as duplicated EIDs will cause driver to return -EINVAL. Signed-off-by: Karol Wachowski <karol.wachowski@intel.com>
2021-11-05soc: aspeed: mctp: Pick uevents consistentlyIwona Winiarska1-3/+2
Uevent objects are different for PCI_READY=0 and PCI_READY=1. Let's make uevents consistent and use the same object in both cases. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-11-05soc: aspeed: mctp: Add API to register client for MCTP typeAndrzej Kacprowski1-2/+198
MCTP client can register for receiving packets with selected MCTP message type or PCIE vendor defined message type. Vendor defined type is 2 bytes but in Intel VDMs the first byte is variable and only the second byte contains constant message type - to support this use case we have to specify 2 byte mask that is applied to packet type before comparing with registered vendor type. When MCTP packet arrives its header is compared with a list of registered (vendor) types. If no client registered for packet's (vendor) type then the packet is dispatched to the default client. Fragmented packets are not considered for type matching. Only one client can register for given (vendor) type. Client can register for multiple (vendor) types. All packet fields must be specified in big endian byte order. This feature allows to support multiple clients simultaneously but only one client per (vendor) message type. For example we can have PECI client in kernel that uses PECI vendor message type, dcpmm daemon in user space that handles NVDIMM vendor type messages and mctpd service that handles MCTP control and PLDM message types. tested with peci_mctp_test application Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Add IOCTL to register default clientAndrzej Kacprowski1-8/+22
Add IOCTL to register given client as default client that receives all packets that were not dispatched to other clients. This IOCTL is intended to be used by mctpd service or test application that should receive all packets that are not claimed by other clients. mctpd service might not be the first user space client since dcpmm or telemetry client can start before mctpd or mctpd can crash and be restarted automatically at any time. To preserve backward compatibility with mctpd, the first user space client will be registered automatically as default client - once mctpd is modified to call ASPEED_MCTP_IOCTL_REGISTER_DEFAULT_HANDLER we can remove this workaround. Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Move wait queue to clientAndrzej Kacprowski1-7/+5
Whenever MCTP packet arrives it is dispatched to a specific client - there is no need to wake up all clients waiting in aspeed_mctp_poll(). Move wait queue from driver structure to client structure. Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Add support for multiple clientsAndrzej Kacprowski1-104/+93
This commit adds minimal support for multiple clients. Currently packets are dispatched to default client. Support for dispatching incoming packets to different clients will be added in subsequent patches. Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05soc: aspeed: mctp: Add initial driver for ast2600-mctpIwona Winiarska3-0/+1214
Currently, there is no proper MCTP networking subsystem in Linux. Until we are able to work out the details of that, we are going to expose HW to userspace using raw read/write interface. Because of that, this driver is not intended to be submitted upstream. Here we are providing a simple device driver for AST2600 MCTP controller. v2: Added workarounds for BMC reboot/reset, corrected endianess comment, changed TX_BUF_ADDR to be consistent, fixed typos. v3: Added workaround for RX hang, added swapping PCIe VDM header to network order, corrected buffer allocation size. v4: Fixed TX broken after sending 32 byte packet Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-11-05Enabling interrupt based mailboxArun P. Mohanan1-33/+69
Modifying the mailbox driver to use FIFO queue while using interrupt. Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com>
2021-11-05misc: Block error printing on probe defer case in Aspeed LPC ctrlJae Hyun Yoo1-4/+4
This commit adds a checking code when it gets -EPROBE_DEFER while getting a clock resource. In this case it doesn't need to print out an error message because the probing will be re-visited. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-11-05Implement a memory driver share memoryCheng C Yang3-0/+172
Implement a memory driver for BMC to access VGA share memory. The driver is used by MDRV2. In MDRV2 BIOS will send whole SMBIOS table to VGA memory and BMC can get the table from VGA memory through this driver. Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com>
2021-11-05Aspeed LPC SIO driverYong Li3-0/+415
Add lpc sio device driver for AST2500/2400 Signed-off-by: Yong Li <yong.b.li@intel.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-11-05soc: aspeed: add lpc mbox driverJae Hyun Yoo3-0/+382
This commit adds back the lpc mbox driver which was removed from the openbmc linux dev-5.2 tree. This driver should be rewritten later. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com>
2021-11-03soc: aspeed: Fix UART routing driverChia-Wei Wang2-4/+15
The build changes relating to the routing driver were lost when backporting. Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-11-02soc: aspeed: Add UART routing supportChia-Wei Wang1-0/+603
Add driver support for the UART routing control. Users can perform runtime configuration of the RX muxes among the UART controllers and the UART IO pins. The sysfs interface is also exported for the convenience of routing paths check and update. Signed-off-by: Oskar Senft <osk@google.com> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Tested-by: Lei YU <yulei.sh@bytedance.com> Link: https://lore.kernel.org/r/20210927023053.6728-5-chiawei_wang@aspeedtech.com Link: https://lore.kernel.org/r/20211022000616.481772-1-joel@jms.id.au' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-11-01soc: aspeed: xdma: Add reset ioctlEddie James1-0/+32
Users of the XDMA engine need a way to reset it if something goes wrong. Problems on the host side, or user error, such as incorrect host address, may result in the DMA operation never completing and no way to determine what went wrong. Therefore, add an ioctl to reset the engine so that users can recover in this situation. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/1588697905-23444-5-git-send-email-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-11-01soc: aspeed: xdma: Add user interfaceEddie James1-0/+217
This commits adds a miscdevice to provide a user interface to the XDMA engine. The interface provides the write operation to start DMA operations. The DMA parameters are passed as the data to the write call. The actual data to transfer is NOT passed through write. Note that both directions of DMA operation are accomplished through the write command; BMC to host and host to BMC. The XDMA driver reserves an area of physical memory for DMA operations, as the XDMA engine is restricted to accessing certain physical memory areas on some platforms. This memory forms a pool from which users can allocate pages for their usage with calls to mmap. The space allocated by a client will be the space used in the DMA operation. For an "upstream" (BMC to host) operation, the data in the client's area will be transferred to the host. For a "downstream" (host to BMC) operation, the host data will be placed in the client's memory area. Poll is also provided in order to determine when the DMA operation is complete for non-blocking IO. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/1588697905-23444-4-git-send-email-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-11-01soc: aspeed: Add XDMA Engine DriverEddie James3-0/+974
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI DMA operations between the SOC (acting as a BMC) and a host processor in a server. This commit adds a driver to control the XDMA engine and adds functions to initialize the hardware and memory and start DMA operations. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-18Merge tag 'driver-core-5.15-rc6' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core fixes from Greg KH: "Here are some small driver core fixes for 5.15-rc6, all of which have been in linux-next for a while with no reported issues. They include: - kernfs negative dentry bugfix - simple pm bus fixes to resolve reported issues" * tag 'driver-core-5.15-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: drivers: bus: Delete CONFIG_SIMPLE_PM_BUS drivers: bus: simple-pm-bus: Add support for probing simple bus only devices driver core: Reject pointless SYNC_STATE_ONLY device links kernfs: don't create a negative dentry if inactive node exists
2021-10-07Merge tag 'omap-for-v5.15/fixes-rc4' of ↵Arnd Bergmann1-12/+15
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes Fixes for omaps for v5.15 Few regression fixes for omaps for the v5.15-rc cycle. There is a fix for boot time hangs that can happen on some am335x devices that started when the pruss devicetree nodes were added. The other fixes are less critical: - Fix compiler warning for sysc_init_soc() that got recently introduced - Fix external abort for am335x pruss as otherwise some am335x will hang - Use CLKDM_NOAUTO quirk also for dra7 dcan1 - Fix older NAND device node regression for omap3-sdp * tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap3430-sdp: Fix NAND device node bus: ti-sysc: Use CLKDM_NOAUTO for dra7 dcan1 for errata i893 soc: ti: omap-prm: Fix external abort for am335x pruss bus: ti-sysc: Add break in switch statement in sysc_init_soc() Link: https://lore.kernel.org/r/pull-1633609552-789682@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-05drivers: bus: Delete CONFIG_SIMPLE_PM_BUSSaravana Kannan1-1/+0
The simple-pm-bus driver is mandatory for CONFIG_OF based platforms to work with fw_devlink. So, always compile it in for CONFIG_OF and delete the config since it's no longer necessary. Tested-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Damien Le Moal <damien.lemoal@wdc.com> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Saravana Kannan <saravanak@google.com> Link: https://lore.kernel.org/r/20210929000735.585237-3-saravanak@google.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-09-30soc: ti: omap-prm: Fix external abort for am335x prussTony Lindgren1-12/+15
Starting with v5.15-rc1, we may now see some am335x beaglebone black device produce the following error on pruss probe: Unhandled fault: external abort on non-linefetch (0x1008) at 0xe0326000 This has started with the enabling of pruss for am335x in the dts files. Turns out the is caused by the PRM reset handling not waiting for the reset bit to clear. To fix the issue, let's always wait for the reset bit to clear, even if there is a separate reset status register. We attempted to fix a similar issue for dra7 iva with a udelay() in commit effe89e40037 ("soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva"). There is no longer a need for the udelay() for dra7 iva reset either with the check added for reset bit clearing. Cc: Drew Fustini <pdp7pdp7@gmail.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Yongqin Liu <yongqin.liu@linaro.org> Fixes: effe89e40037 ("soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva") Reported-by: Matti Vaittinen <mazziesaccount@gmail.com> Tested-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-09-20soc: qcom: mdt_loader: Drop PT_LOAD check on hash segmentShawn Guo1-1/+1
PT_LOAD type denotes that the segment should be loaded into the final firmware memory region. Hash segment is not one such, because it's only needed for PAS init and shouldn't be in the final firmware memory region. That's why mdt_phdr_valid() explicitly reject non PT_LOAD segment and hash segment. This actually makes the hash segment type check in qcom_mdt_read_metadata() unnecessary and redundant. For a hash segment, it won't be loaded into firmware memory region anyway, due to the QCOM_MDT_TYPE_HASH check in mdt_phdr_valid(), even if it has a PT_LOAD type for some reason (misusing or abusing?). Some firmware files on Sony phones are such examples, e.g WCNSS firmware of Sony Xperia M4 Aqua phone. The type of hash segment is just PT_LOAD. Drop the unnecessary hash segment type check in qcom_mdt_read_metadata() to fix firmware loading failure on these phones, while hash segment is still kept away from the final firmware memory region. Fixes: 498b98e93900 ("soc: qcom: mdt_loader: Support loading non-split images") Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210828070202.7033-1-shawn.guo@linaro.org
2021-09-13soc: qcom: socinfo: Fixed argument passed to platform_set_data()Antonio Martorana1-1/+1
Set qcom_socinfo pointer as data being stored instead of pointer to soc_device structure. Aligns with future calls to platform_get_data() which expects qcom_socinfo pointer. Fixes: efb448d0a3fc ("soc: qcom: Add socinfo driver") Signed-off-by: Antonio Martorana <amartora@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1629159879-95777-1-git-send-email-amartora@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-02Merge tag 'drivers-5.15' of ↵Linus Torvalds29-161/+511
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "These are updates for drivers that are tied to a particular SoC, including the correspondig device tree bindings: - A couple of reset controller changes for unisoc, uniphier, renesas and zte platforms - memory controller driver fixes for omap and tegra - Rockchip io domain driver updates - Lots of updates for qualcomm platforms, mostly touching their firmware and power management drivers - Tegra FUSE and firmware driver updateѕ - Support for virtio transports in the SCMI firmware framework - cleanup of ixp4xx drivers, towards enabling multiplatform support and bringing it up to date with modern platforms - Minor updates for keystone, mediatek, omap, renesas" * tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits) reset: simple: remove ZTE details in Kconfig help soc: rockchip: io-domain: Remove unneeded semicolon soc: rockchip: io-domain: add rk3568 support dt-bindings: power: add rk3568-pmu-io-domain support bus: ixp4xx: return on error in ixp4xx_exp_probe() soc: renesas: Prefer memcpy() over strcpy() firmware: tegra: Stop using seq_get_buf() soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 soc/tegra: fuse: Add runtime PM support soc/tegra: fuse: Clear fuse->clk on driver probe failure soc/tegra: pmc: Prevent racing with cpuilde driver soc/tegra: bpmp: Remove unused including <linux/version.h> dt-bindings: soc: ti: pruss: Add dma-coherent property soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs firmware: arm_scmi: Use WARN_ON() to check configured transports firmware: arm_scmi: Fix boolconv.cocci warnings soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing soc: mediatek: mmsys: add MT8365 support ...
2021-09-02Merge tag 'soc-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds3-10/+28
Pull ARM SoC updates from Arnd Bergmann: "There are three noteworthy updates for 32-bit arm platforms this time: - The Microchip SAMA7 family based on Cortex-A7 gets introduced, a new cousin to the older SAM9 (ARM9xx based) and SAMA5 (Cortex-A5 based) SoCs. - The ixp4xx platform (based on Intel XScale) is finally converted to device tree, and all the old board files are getting removed now. - The Cirrus Logic EP93xx platform loses support for the old MaverickCrunch FPU. Support for compiling user space applications was already removed in gcc-4.9, and the kernel support for old applications could not be built with clang ias. After confirming that there are no remaining users, removing this from the kernel seemed better than adding support for unused features to clang. There are minor updates to the aspeed, omap and samsung platforms" * tag 'soc-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits) soc: aspeed-lpc-ctrl: Fix clock cleanup in error path ARM: s3c: delete unneed local variable "delay" soc: aspeed: Re-enable FWH2AHB on AST2600 soc: aspeed: socinfo: Add AST2625 variant soc: aspeed: p2a-ctrl: Fix boundary check for mmap soc: aspeed: lpc-ctrl: Fix boundary check for mmap ARM: ixp4xx: Delete the Freecom FSG-3 boardfiles ARM: ixp4xx: Delete GTWX5715 board files ARM: ixp4xx: Delete Coyote and IXDPG425 boardfiles ARM: ixp4xx: Delete Intel reference design boardfiles ARM: ixp4xx: Delete Avila boardfiles ARM: ixp4xx: Delete the Arcom Vulcan boardfiles ARM: ixp4xx: Delete Gateway WG302v2 boardfiles ARM: ixp4xx: Delete Omicron boardfiles ARM: ixp4xx: Delete the D-Link DSM-G600 boardfiles ARM: ixp4xx: Delete NAS100D boardfiles ARM: ixp4xx: Delete NSLU2 boardfiles arm: omap2: Drop the unused OMAP_PACKAGE_* KConfig entries arm: omap2: Drop obsolete MACH_OMAP3_PANDORA entry ARM: ep93xx: remove MaverickCrunch support ...
2021-09-01Merge tag 'driver-core-5.15-rc1' of ↵Linus Torvalds1-3/+1
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg KH: "Here is the big set of driver core patches for 5.15-rc1. These do change a number of different things across different subsystems, and because of that, there were 2 stable tags created that might have already come into your tree from different pulls that did the following - changed the bus remove callback to return void - sysfs iomem_get_mapping rework Other than those two things, there's only a few small things in here: - kernfs performance improvements for huge numbers of sysfs users at once - tiny api cleanups - other minor changes All of these have been in linux-next for a while with no reported problems, other than the before-mentioned merge issue" * tag 'driver-core-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (33 commits) MAINTAINERS: Add dri-devel for component.[hc] driver core: platform: Remove platform_device_add_properties() ARM: tegra: paz00: Handle device properties with software node API bitmap: extend comment to bitmap_print_bitmask/list_to_buf drivers/base/node.c: use bin_attribute to break the size limitation of cpumap ABI topology: use bin_attribute to break the size limitation of cpumap ABI lib: test_bitmap: add bitmap_print_bitmask/list_to_buf test cases cpumask: introduce cpumap_print_list/bitmask_to_buf to support large bitmask and list sysfs: Rename struct bin_attribute member to f_mapping sysfs: Invoke iomem_get_mapping() from the sysfs open callback debugfs: Return error during {full/open}_proxy_open() on rmmod zorro: Drop useless (and hardly used) .driver member in struct zorro_dev zorro: Simplify remove callback sh: superhyway: Simplify check in remove callback nubus: Simplify check in remove callback nubus: Make struct nubus_driver::remove return void kernfs: dont call d_splice_alias() under kernfs node lock kernfs: use i_lock to protect concurrent inode updates kernfs: switch kernfs to use an rwsem kernfs: use VFS negative dentry caching ...
2021-08-26soc: aspeed-lpc-ctrl: Fix clock cleanup in error pathYang Yingliang1-10/+10
Move syscon_regmap_lookup_by_compatible() above the devm_clk_get() to avoid missing clk_disable_unprepare(). Fixes: 2f9b25fa6682 ("soc: aspeed: Re-enable FWH2AHB on AST2600") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210824085522.1849410-1-yangyingliang@huawei.com Link: https://lore.kernel.org/r/20210825001214.3056193-1-joel@jms.id.au' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26Merge tag 'v5.15-rockchip-driver1' of ↵Arnd Bergmann2-10/+82
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers Yaml conversion of io-domain bindings and addition of rk3568 io domains. * tag 'v5.15-rockchip-driver1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: io-domain: Remove unneeded semicolon soc: rockchip: io-domain: add rk3568 support dt-bindings: power: add rk3568-pmu-io-domain support dt-bindings: soc: rockchip: add rockchip-io-domain.yaml object to grf.yaml dt-bindings: power: convert rockchip-io-domain.txt to YAML soc: rockchip: ROCKCHIP_GRF should not default to y, unconditionally Link: https://lore.kernel.org/r/9718620.EvYhyI6sBW@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-20soc: rockchip: io-domain: Remove unneeded semicolonJiapeng Chong1-1/+1
Fix the following coccicheck warnings: ./drivers/soc/rockchip/io-domain.c:118:2-3: Unneeded semicolon. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://lore.kernel.org/r/1629361749-97977-1-git-send-email-jiapeng.chong@linux.alibaba.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-08-19soc: aspeed: Re-enable FWH2AHB on AST2600Joel Stanley1-6/+23
Recent builds of the vendor u-boot tree disable features of the BMC that may allow unwanted access if not correctly configured. This includes the firmware hub to ahb bridge (FWH2AHB), which is used by this driver. The bit to "un-disable" it is in the SCU. Set it only when the ioctl is called and we are running on the ast2600, as to not open up the 'backdoor' unless there's userspace trying to use it. Fixes: deb50313ba83 ("soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600") Link: https://lore.kernel.org/r/20210629073520.318514-2-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>