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2020-07-27Merge tag 'drivers_soc_for_5.9' of ↵Arnd Bergmann1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers SOC: TI Keystone driver update for v5.9 - TI K3 Ring Accelerator updates - Few non critical warining fixes * tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static firmware: ti_sci: Replace HTTP links with HTTPS ones soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify soc: ti: k3: fix semicolon.cocci warnings soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring' dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair soc: ti: k3-ringacc: separate soc specific initialization soc: ti: k3-ringacc: add request pair of rings api. soc: ti: k3-ringacc: add ring's flags to dump soc: ti: k3-ringacc: Move state tracking variables under a struct dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-25firmware: ti_sci: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-20reset: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-07-20reset: intel: fix a compile warning about REG_OFFSET redefinedDejin Zheng1-12/+12
kernel test robot reports a compile warning about REG_OFFSET redefined in the reset-intel-gw.c after merging commit e44ab4e14d6f4 ("regmap: Simplify implementation of the regmap_read_poll_timeout() macro"). the warning is like that: drivers/reset/reset-intel-gw.c:18:0: warning: "REG_OFFSET" redefined #define REG_OFFSET GENMASK(31, 16) In file included from ./arch/arm/mach-ixp4xx/include/mach/hardware.h:30:0, from ./arch/arm/mach-ixp4xx/include/mach/io.h:15, from ./arch/arm/include/asm/io.h:198, from ./include/linux/io.h:13, from ./include/linux/iopoll.h:14, from ./include/linux/regmap.h:20, from drivers/reset/reset-intel-gw.c:12: ./arch/arm/mach-ixp4xx/include/mach/platform.h:25:0: note: this is the location of the previous definition #define REG_OFFSET 3 Reported-by: kernel test robot <lkp@intel.com> Fixes: c9aef213e38cde ("reset: intel: Add system reset controller driver") Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-06-16reset: simple: Add reset callbackMaxime Ripard1-0/+20
The reset-simple code lacks a reset callback that is still pretty easy to implement. The only real thing to consider is the delay needed for a device to be reset, so let's expose that as part of the reset-simple driver data. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-06-16reset: Move reset-simple header out of drivers/resetMaxime Ripard5-49/+4
The reset-simple code can be useful for drivers outside of drivers/reset that have a few reset controls as part of their features. Let's move it to include/linux/reset. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-06-07Merge tag 'char-misc-5.8-rc1' of ↵Linus Torvalds1-19/+7
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the large set of char/misc driver patches for 5.8-rc1 Included in here are: - habanalabs driver updates, loads - mhi bus driver updates - extcon driver updates - clk driver updates (approved by the clock maintainer) - firmware driver updates - fpga driver updates - gnss driver updates - coresight driver updates - interconnect driver updates - parport driver updates (it's still alive!) - nvmem driver updates - soundwire driver updates - visorbus driver updates - w1 driver updates - various misc driver updates In short, loads of different driver subsystem updates along with the drivers as well. All have been in linux-next for a while with no reported issues" * tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits) habanalabs: correctly cast u64 to void* habanalabs: initialize variable to default value extcon: arizona: Fix runtime PM imbalance on error extcon: max14577: Add proper dt-compatible strings extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()' extcon: remove redundant assignment to variable idx w1: omap-hdq: print dev_err if irq flags are not cleared w1: omap-hdq: fix interrupt handling which did show spurious timeouts w1: omap-hdq: fix return value to be -1 if there is a timeout w1: omap-hdq: cleanup to add missing newline for some dev_dbg /dev/mem: Revoke mappings when a driver claims the region misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages() misc: xilinx-sdfec: cleanup return value in xsdfec_table_write() misc: xilinx-sdfec: improve get_user_pages_fast() error handling nvmem: qfprom: remove incorrect write support habanalabs: handle MMU cache invalidation timeout habanalabs: don't allow hard reset with open processes habanalabs: GAUDI does not support soft-reset habanalabs: add print for soft reset due to event habanalabs: improve MMU cache invalidation code ...
2020-05-06reset: hi6220: Add support for AO reset controllerPeter Griffin1-1/+68
This is required to bring Mali450 gpu out of reset. Cc: Peter Griffin <peter.griffin@linaro.org> Cc: Enrico Weigelt <info@metux.net> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> [jstultz: Added comment, Fix void return build issue Reported-by: kbuild test robot <lkp@intel.com>] Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06reset: imx7: Add support for i.MX8MP SoCAnson Huang1-0/+101
i.MX8MP is a new SoC of i.MX8M family, it has same src IP inside but with different module layout, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-04-28firmware: xilinx: Remove eemi ops for reset_get_statusRajan Vaja1-7/+1
Use direct function call instead of using eemi ops for reset_get_status. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-14-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-28firmware: xilinx: Remove eemi ops for reset_assertRajan Vaja1-12/+6
Use direct function call instead of using eemi ops for reset_assert. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-13-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-02-10reset: intel: add unspecified HAS_IOMEM dependencyBrendan Higgins1-1/+1
Currently CONFIG_RESET_INTEL_GW=y implicitly depends on CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get the following build error: /usr/bin/ld: drivers/reset/reset-intel-gw.o: in function `intel_reset_probe': drivers/reset/reset-intel-gw.c:185: undefined reference to `devm_platform_ioremap_resource' Fix the build error by adding the unspecified dependency. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-02-10reset: brcmstb-rescal: add unspecified HAS_IOMEM dependencyBrendan Higgins1-0/+1
Currently CONFIG_RESET_BRCMSTB_RESCAL=y implicitly depends on CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get the following build error: /usr/bin/ld: drivers/reset/reset-brcmstb-rescal.o: in function `brcm_rescal_reset_probe': drivers/reset/reset-brcmstb-rescal.c:76: undefined reference to `devm_ioremap_resource' Fix the build error by adding the unspecified dependency. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-11Merge tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux into arm/driversOlof Johansson8-23/+714
Reset controller updates for v5.6 This tag adds support for the Nuvoton NPCM, Intel Gatway SoC, and Broadcom BCM7216 RESCAL reset controllers, adds missing SCSSI reset controls for newer Uniphier SoCs, aligns the program flow in the devm_reset_controller_register, __devm_reset_control_get, and devm_reset_control_array_get functions for better consistency, and allows to build the Qcom AOSS reset driver as a module. This is based on v5.5-rc3 because the core patch depends on commit db23808615e2 ("reset: Do not register resource data for missing resets"). * tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux: reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristate reset: Add Broadcom STB RESCAL reset controller dt-bindings: reset: Document BCM7216 RESCAL reset controller reset: intel: Add system reset controller driver dt-bindings: reset: Add YAML schemas for the Intel Reset controller reset: uniphier: Add SCSSI reset control for each channel reset: Align logic and flow in managed helpers reset: npcm: add NPCM reset controller driver dt-bindings: reset: Add binding constants for NPCM7xx reset controller dt-bindings: reset: add NPCM reset controller documentation Link: https://lore.kernel.org/r/dbbb2ca7490a0146d9ba632fd4d9f38063e03e9f.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-08Merge tag 'cpuidle_psci-v5.5-rc4' of ↵Olof Johansson2-12/+4
git://git.linaro.org/people/ulf.hansson/linux-pm into arm/drivers Initial support for hierarchical CPU arrangement, managed by PSCI and its corresponding cpuidle driver. This support is based upon using the generic PM domain, which already supports devices belonging to CPUs. Finally, these is a DTS patch that enables the hierarchical topology to be used for the Qcom 410c Dragonboard, which supports the PSCI OS-initiated mode. * tag 'cpuidle_psci-v5.5-rc4' of git://git.linaro.org/people/ulf.hansson/linux-pm: (611 commits) arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 cpuidle: psci: Add support for PM domains by using genpd PM / Domains: Introduce a genpd OF helper that removes a subdomain cpuidle: psci: Support CPU hotplug for the hierarchical model cpuidle: psci: Manage runtime PM in the idle path cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains cpuidle: psci: Attach CPU devices to their PM domains cpuidle: psci: Add a helper to attach a CPU to its PM domain cpuidle: psci: Support hierarchical CPU idle states cpuidle: psci: Simplify OF parsing of CPU idle state nodes cpuidle: dt: Support hierarchical CPU idle states of: base: Add of_get_cpu_state_node() to get idle states for a CPU node firmware: psci: Export functions to manage the OSI mode dt: psci: Update DT bindings to support hierarchical PSCI states cpuidle: psci: Align psci_power_state count with idle state count Linux 5.5-rc4 locks: print unsigned ino in /proc/locks riscv: export flush_icache_all to modules riscv: reject invalid syscalls below -1 riscv: fix compile failure with EXPORT_SYMBOL() & !MMU ... Link: https://lore.kernel.org/r/20200102160820.3572-1-ulf.hansson@linaro.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-08reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristateJohn Stultz2-2/+3
Allow CONFIG_RESET_QCOM_AOSS to be set as as =m to allow for the driver to be loaded from a modules. Also replaces the builtin_platform_driver() line with module_platform_driver() and adds a MODULE_DEVICE_TABLE() entry. Cc: Todd Kjos <tkjos@google.com> Cc: Alistair Delva <adelva@google.com> Cc: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-06reset: Add Broadcom STB RESCAL reset controllerJim Quinlan3-0/+115
On BCM7216 there is a special purpose reset controller named RESCAL (reset calibration) which is necessary for SATA and PCIe0/1 to operate correctly. This commit adds support for such a reset controller to be available. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-03reset: intel: Add system reset controller driverDilip Kota3-0/+272
Add driver for the reset controller present on Intel Gateway SoCs for performing reset management of the devices present on the SoC. Driver also registers a reset handler to peform the entire device reset. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02reset: uniphier: Add SCSSI reset control for each channelKunihiko Hayashi1-5/+8
SCSSI has reset controls for each channel in the SoCs newer than Pro4, so this adds missing reset controls for channel 1, 2 and 3. And more, this moves MCSSI reset ID after SCSSI. Fixes: 6b39fd590aeb ("reset: uniphier: add reset control support for SPI") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02reset: Align logic and flow in managed helpersGeert Uytterhoeven1-16/+17
__devm_reset_control_get() and devm_reset_control_array_get() are very similar, but they do not look similar, due to inverted logic. Make them more similar, following the "bail out early" paradigm. Adjust the logic and flow in devm_reset_controller_register() to match the two other functions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02reset: npcm: add NPCM reset controller driverTomer Maimon3-0/+299
Add Nuvoton NPCM BMC reset controller driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-12-24reset: reset-scmi: Match scmi device by both name and protocol idSudeep Holla1-1/+1
The scmi bus now has support to match the driver with devices not only based on their protocol id but also based on their device name if one is available. This was added to cater the need to support multiple devices and drivers for the same protocol. Let us add the name "reset" to scmi_device_id table in the driver so that in matches only with device with the same name and protocol id SCMI_PROTOCOL_RESET. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-12-10reset: Do not register resource data for missing resetsGeert Uytterhoeven1-2/+2
When an optional reset is not present, __devm_reset_control_get() and devm_reset_control_array_get() still register resource data to release the non-existing reset on cleanup, which is futile. Fix this by skipping NULL reset control pointers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-12-10reset: Fix {of,devm}_reset_control_array_get kerneldoc return typesGeert Uytterhoeven1-4/+2
of_reset_control_array_get() and devm_reset_control_array_get() return struct reset_control pointers, not internal struct reset_control_array pointers, just like all other reset control API calls. Correct the kerneldoc to match the code. Fixes: 17c82e206d2a3cd8 ("reset: Add APIs to manage array of resets") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-12-10reset: brcmstb: Remove resource checksFlorian Fainelli1-6/+0
The use of IS_ALIGNED() is incorrect, the typical resource we pass looks like this: start: 0x8404318, size: 0x30. When using IS_ALIGNED() we will get the following 0x8404318 & (0x18 - 1) = 0x10 which is definitively not equal to 0, same goes with the size. These two checks would make the driver fail probing. Remove the resource checks, since there should be no constraint on the base addresse or size. Fixes: 77750bc089e4 ("reset: Add Broadcom STB SW_INIT reset controller driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-12-05Merge tag 'armsoc-drivers' of ↵Linus Torvalds7-18/+81
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Olof Johansson: "Various driver updates for platforms: - A larger set of work on Tegra 2/3 around memory controller and regulator features, some fuse cleanups, etc.. - MMP platform drivers, in particular for USB PHY, and other smaller additions. - Samsung Exynos 5422 driver for DMC (dynamic memory configuration), and ASV (adaptive voltage), allowing the platform to run at more optimal operating points. - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas - Clock/reset control driver for TI/OMAP - Meson-A1 reset controller support - Qualcomm sdm845 and sda845 SoC IDs for socinfo" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits) firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT soc: fsl: add RCPM driver dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition memory: tegra: Consolidate registers definition into common header memory: tegra: Ensure timing control debug features are disabled memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Include io.h instead of iopoll.h memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Add gr2d and gr3d to DRM IOMMU group memory: tegra: Set DMA mask based on supported address bits soc: at91: Add Atmel SFR SN (Serial Number) support memory: atmel-ebi: switch to SPDX license identifiers memory: atmel-ebi: move NUM_CS definition inside EBI driver soc: mediatek: Refactor bus protection control soc: mediatek: Refactor sram control ...
2019-10-24reset: improve of_xlate documentationPhilipp Zabel1-2/+4
Mention of_reset_simple_xlate as the default if of_xlate is not set. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-24reset: fix of_reset_control_get_count kerneldoc commentPhilipp Zabel1-1/+2
Add a newline and remove a superfluous kerneldoc marker before the of_reset_control_get_count kerneldoc comment, to fix documentation build warnings: ./drivers/reset/core.c:832: warning: Incorrect use of kernel-doc format: * of_reset_control_get_count - Count number of resets available with a device ./drivers/reset/core.c:840: warning: Function parameter or member 'node' not described in 'of_reset_control_get_count' Fixes: 17c82e206d2a ("reset: Add APIs to manage array of resets") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-24reset: fix of_reset_simple_xlate kerneldoc commentPhilipp Zabel1-1/+0
The flags parameter never made it into the API, but was erroneously included in the kerneldoc comment. Remove it to fix a documentation build warning: ./drivers/reset/core.c:86: warning: Excess function parameter 'flags' description in 'of_reset_simple_xlate' Fixes: 61fc41317666 ("reset: Add reset controller API") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-24reset: simple: Add Realtek RTD1195/RTD1295Andreas Färber1-1/+2
Enable RESET_SIMPLE for ARCH_REALTEK. They can reuse the DesignWare bindings to avoid a new compatible. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-24reset: simple: Keep alphabetical orderAndreas Färber1-2/+2
Restore alphabetical order for Kconfig dependencies and help text. Compatibles got out of order too, but no functional change done here. Goal is to make it obvious where to add new platforms. Fixes: 64c47b624f64 ("reset: Add reset controller support for BM1880 SoC") Fixes: 1d7592f84f92 ("reset: simple: Enable for ASPEED systems") Fixes: 96a2f50305d1 ("reset: build simple reset controller driver for Agilex") Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-22reset: zynqmp: Make reset_control_ops constPhilipp Zabel1-1/+1
The zynqmp_reset_ops structure is never modified. Make it const. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-22reset: hisilicon: hi3660: Make reset_control_ops constPhilipp Zabel1-1/+1
The hi3660_reset_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-22reset: build simple reset controller driver for AgilexDinh Nguyen1-1/+1
The Intel SoCFPGA Agilex platform shares the same reset controller that is on the Stratix10. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-22reset: Fix memory leak in reset_control_array_put()Kishon Vijay Abraham I1-0/+1
Memory allocated for 'struct reset_control_array' in of_reset_control_array_get() is never freed in reset_control_array_put() resulting in kmemleak showing the following backtrace. backtrace: [<00000000c5f17595>] __kmalloc+0x1b0/0x2b0 [<00000000bd499e13>] of_reset_control_array_get+0xa4/0x180 [<000000004cc02754>] 0xffff800008c669e4 [<0000000050a83b24>] platform_drv_probe+0x50/0xa0 [<00000000d3a0b0bc>] really_probe+0x108/0x348 [<000000005aa458ac>] driver_probe_device+0x58/0x100 [<000000008853626c>] device_driver_attach+0x6c/0x90 [<0000000085308d19>] __driver_attach+0x84/0xc8 [<00000000080d35f2>] bus_for_each_dev+0x74/0xc8 [<00000000dd7f015b>] driver_attach+0x20/0x28 [<00000000923ba6e6>] bus_add_driver+0x148/0x1f0 [<0000000061473b66>] driver_register+0x60/0x110 [<00000000c5bec167>] __platform_driver_register+0x40/0x48 [<000000007c764b4f>] 0xffff800008c6c020 [<0000000047ec2e8c>] do_one_initcall+0x5c/0x1b0 [<0000000093d4b50d>] do_init_module+0x54/0x1d0 Fixes: 17c82e206d2a ("reset: Add APIs to manage array of resets") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-08reset: add support for the Meson-A1 SoC Reset ControllerXingyu Chen1-7/+28
The number of RESET registers and offset of RESET_LEVEL register for Meson-A1 are different from previous SoCs, In order to describe these differences, we introduce the struct meson_reset_param. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-03reset: uniphier-glue: Add Pro5 USB3 supportKunihiko Hayashi1-0/+4
Pro5 SoC has same scheme of USB3 reset as Pro4, so the data for Pro5 is equivalent to Pro4. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-03reset: Remove copy'n'paste redundancy in the commentsAndy Shevchenko1-2/+0
It seems the commit bb475230b8e5 ("reset: make optional functions really optional") brought couple of redundant lines in the comments. Drop them here. Cc: Ramiro Oliveira <Ramiro.Oliveira@synopsys.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-10-03reset: meson-audio-arb: add sm1 supportJerome Brunet1-3/+40
Add the new arb reset lines of the SM1 SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-09-30Merge tag 'armsoc-fixes' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "A few fixes that have trickled in through the merge window: - Video fixes for OMAP due to panel-dpi driver removal - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7 - Fixing arch version on ASpeed ast2500 - Two fixes for reset handling on ARM SCMI" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: aspeed: ast2500 is ARMv6K reset: reset-scmi: add missing handle initialisation firmware: arm_scmi: reset: fix reset_state assignment in scmi_domain_reset bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle() ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux ARM: dts: am3517-evm: Fix missing video ARM: dts: logicpd-torpedo-baseboard: Fix missing video ARM: omap2plus_defconfig: Fix missing video bus: ti-sysc: Fix handling of invalid clocks bus: ti-sysc: Fix clock handling for no-idle quirks
2019-09-18reset: reset-scmi: add missing handle initialisationSudeep Holla1-0/+1
scmi_reset_data->handle needs to be initialised at probe, so that it can be later used to access scmi reset protocol APIs using the same. Since it was tested with a module that obtained handle elsewhere, it was missed easily. Add the missing scmi_reset_data->handle initialisation to fix the issue. Fixes: c8ae9c2da1cc ("reset: Add support for resets provided by SCMI") Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reported-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-08-14Merge tag 'scmi-updates-5.4' of ↵Arnd Bergmann3-0/+136
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers ARM SCMI updates/fixes for v5.4 Handful of fixes/updates including: 1. SCMI v2.0(recently released) support for: - Performance protocol fast channels - Reset Management Protocol 2. SCMI infrastructure/core support for recieve(Rx) channels, asynchronous commands and delayed response 3. Usage of asynchronous commands for clock rate setting and sensor reading based on the attributes read from the firmware 4. Miscellaneous cleanups(typos, naming alignment with specification, and SPDX License identifier) 5. Couple of fixes: removal of extra check for invalid length and additional check to ensure platform/firmware has released shared memory before using it in OSPM * tag 'scmi-updates-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: (22 commits) reset: Add support for resets provided by SCMI firmware: arm_scmi: Add RESET protocol in SCMI v2.0 dt-bindings: arm: Extend SCMI to support new reset protocol firmware: arm_scmi: Make use SCMI v2.0 fastchannel for performance protocol firmware: arm_scmi: Add discovery of SCMI v2.0 performance fastchannels firmware: arm_scmi: Use {get,put}_unaligned_le{32,64} accessors firmware: arm_scmi: Use asynchronous CLOCK_RATE_SET when possible firmware: arm_scmi: Drop config flag in clk_ops->rate_set firmware: arm_scmi: Add asynchronous sensor read if it supports firmware: arm_scmi: Drop async flag in sensor_ops->reading_get firmware: arm_scmi: Add support for asynchronous commands and delayed response firmware: arm_scmi: Add mechanism to unpack message headers firmware: arm_scmi: Separate out tx buffer handling and prepare to add rx firmware: arm_scmi: Add receive channel support for notifications firmware: arm_scmi: Segregate tx channel handling and prepare to add rx firmware: arm_scmi: Reorder some functions to avoid forward declarations firmware: arm_scmi: Check if platform has released shmem before using firmware: arm_scmi: Use the term 'message' instead of 'command' firmware: arm_scmi: Fix few trivial typos in comments firmware: arm_scmi: Remove extra check for invalid length message responses ... Link: https://lore.kernel.org/r/20190814172454.26191-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-12reset: Add support for resets provided by SCMISudeep Holla3-0/+136
On some ARM based systems, a separate Cortex-M based System Control Processor(SCP) provides the overall power, clock, reset and system control. System Control and Management Interface(SCMI) Message Protocol is defined for the communication between the Application Cores(AP) and the SCP. Adds support for the resets provided using SCMI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different ARM SCMI device operations provided by the ARM SCMI framework. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-08-06reset: Add DesignWare IP support to simple resetGustavo Pimentel2-1/+4
The reset-simple driver can be now used on DesignWare IPs by default by selecting the following compatible strings: - snps,dw-high-reset for active high resets inputs - snps,dw-low-reset for active low resets inputs Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Luis Oliveira <luis.oliveira@synopsys.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-08-01reset: reset-meson: update with SPDX Licence identifierNeil Armstrong1-50/+1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-08-01dt-bindings: reset: Fix typo in imx8mq resetsGuido Günther1-6/+6
Some of the mipi dsi resets were called IMX8MQ_RESET_MIPI_DIS__ instead of IMX8MQ_RESET_MIPI_DSI__ Since they're DSI related this looks like a typo. This fixes the only in tree user as well to not break bisecting. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-07-20Merge tag 'armsoc-drivers' of ↵Linus Torvalds3-4/+4
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms and a couple of the small driver subsystems we merge through our tree: - A driver for SCU (system control) on NXP i.MX8QXP - Qualcomm Always-on Subsystem messaging driver (AOSS QMP) - Qualcomm PM support for MSM8998 - Support for a newer version of DRAM PHY driver for Broadcom (DPFE) - Reset controller support for Bitmain BM1880 - TI SCI (System Control Interface) support for CPU control on AM654 processors - More TI sysc refactoring and rework" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits) reset: remove redundant null check on pointer dev soc: rockchip: work around clang warning dt-bindings: reset: imx7: Fix the spelling of 'indices' soc: imx: Add i.MX8MN SoC driver support soc: aspeed: lpc-ctrl: Fix probe error handling soc: qcom: geni: Add support for ACPI firmware: ti_sci: Fix gcc unused-but-set-variable warning firmware: ti_sci: Use the correct style for SPDX License Identifier soc: imx8: Use existing of_root directly soc: imx8: Fix potential kernel dump in error path firmware/psci: psci_checker: Park kthreads before stopping them memory: move jedec_ddr.h from include/memory to drivers/memory/ memory: move jedec_ddr_data.c from lib/ to drivers/memory/ MAINTAINERS: Remove myself as qcom maintainer soc: aspeed: lpc-ctrl: make parameter optional soc: qcom: apr: Don't use reg for domain id soc: qcom: fix QCOM_AOSS_QMP dependency and build errors memory: tegra: Fix -Wunused-const-variable firmware: tegra: Early resume BPMP soc/tegra: Select pinctrl for Tegra194 ...
2019-07-04Merge tag 'reset-for-v5.3' of git://git.pengutronix.de/git/pza/linux into ↵Olof Johansson2-1/+4
arm/drivers Reset controller changes for v5.3 This tag adds support for the Bitmain BM1880 reset controller to the reset-simple driver and fixes a spelling mistake in the i.MX7 reset controller binding document. * tag 'reset-for-v5.3' of git://git.pengutronix.de/git/pza/linux: dt-bindings: reset: imx7: Fix the spelling of 'indices' reset: Add reset controller support for BM1880 SoC dt-bindings: reset: Add devicetree binding for BM1880 reset controller Link: https://lore.kernel.org/r/1562236632.6641.14.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-04Merge tag 'reset-fixes-for-v5.2' of git://git.pengutronix.de/git/pza/linux ↵Olof Johansson1-3/+0
into arm/drivers Reset controller fix for v5.2 This tag removes a redundant device pointer NULL check from __reset_control_get_from_lookup to fix a static code checker warning. * tag 'reset-fixes-for-v5.2' of git://git.pengutronix.de/git/pza/linux: reset: remove redundant null check on pointer dev Link: https://lore.kernel.org/r/1562236626.6641.13.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-04reset: remove redundant null check on pointer devColin Ian King1-3/+0
Pointer dev is being dereferenced when passed to the inlined functon dev_name, however, dev is later being null checked so at first this seems like a potential null pointer dereference. In fact, _reset_control_get_from_lookup is only ever called from __reset_control_get, right after checking dev->of_node hence dev can never be null. Clean this up by removing the redundant null check. Thanks to Philipp Zabel for spotting that dev can never be null. Addresses-Coverity: ("Dereference before null check") Fixes: 6691dffab0ab ("reset: add support for non-DT systems") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-26 05:40:21 +0300