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2013-07-25pinctrl: fix a memleak when freeing mapsLinus Walleij1-0/+1
We forgot to free the node itself when free:ing a map. Reported-by: xulinuxkernel <xulinuxkernel@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23pinctrl: pinctrl-single: fix compile warning when no CONFIG_PMJean-Francois Moine1-0/+2
This warning has been introduced by the commit 0f9bc4bcdf4f pinctrl: single: adopt pinctrl sleep mode management Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DTGuennadi Liakhovetski1-0/+1
The PFC pinctrl driver on sh73a0 is also regiatering a VccQ regulator for SDHI0. However, its consumers list only included the platform-data based SDHI device name. When booted with DT SDHI0 couldn't enable VccQ and therefore was unusable. Fix this by adding a consumer with DT-based name. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without ↵Qipan Li1-0/+20
flowctrl this patch adds the lost pin group which supports to let USP0 to simulate a UART without hardware flow control. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22pinctrl: sirf: fix the pin number and mux bit for usp0Qipan Li1-2/+2
we missed a pin and related mux bit for usp pin group, this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-03Merge tag 'pinctrl-for-v3.11-1' of ↵Linus Torvalds37-2683/+11177
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile
2013-07-03Merge tag 'regmap-v3.11' of ↵Linus Torvalds3-0/+1410
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "A small but useful set of regmap updates this time around: - An abstraction for bitfields within a register map contributed by Srinivas Kandagatla, allowing drivers to cope more easily when hardware designers randomly move things about (mainly when talking to things like system controllers). - Changes from Lars-Peter Clausen to allow the MMIO regmap to be used from hard IRQ context. - Small improvements to the cache infrastructure and performance, including a default cache sync operation so now all regmaps can sync easily. There's also a pinctrl driver making use of the new bitfield API, merged here for dependency reasons. There will be a simple add/add conflict with the pinctrl tree as a result." * tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: pinctrl: st: Remove unnecessary use of of_match_ptr macro pinctrl: st: fix return value check pinctrl: st: Add pinctrl and pinconf support. regmap: debugfs: Suppress cache for partial register files regmap: Add regmap_field APIs regmap: core: Cache all registers by default when cache is enabled regmap: Implemented default cache sync operation regmap: Make regmap-mmio usable from atomic contexts regmap: regcache: Fixup locking for custom lock callbacks regmap: debugfs: Fix return from regmap_debugfs_get_dump_start regmap: debugfs: Don't mark lockdep as broken due to debugfs write regmap: rbtree: Use range information to allocate nodes regmap: rbtree: Factor out node allocation regmap: Make regmap_check_range_table() a public API regmap: Add support for discarding parts of the register cache
2013-07-03Merge tag 'late-for-linus' of ↵Linus Torvalds3-0/+121
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late changes from Arnd Bergmann: "These are changes that arrived a little late before the merge window or that have multiple dependencies on previous branches so they did not fit into one of the earlier ones. There are 10 branches merged here, a total of 39 non-merge commits. Contents are a mixed bag for the above reasons: * Two new SoC platforms: ST microelectronics stixxxx and the TI 'Nspire' graphing calculator. These should have been in the 'soc' branch but were a little late * Support for the Exynos 5420 variant in mach-exynos, which is based on the other exynos branches to avoid conflicts. * Various small changes for sh-mobile, ux500 and davinci * Common clk support for MSM" * tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) ARM: ux500: bail out on alien cpus ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: stih41x: Add B2020 board support ARM: stih41x: Add B2000 board support ARM: sti: Add DEBUG_LL console support ARM: sti: Add STiH416 SOC support ARM: sti: Add STiH415 SOC support ARM: msm: Migrate to common clock framework ARM: msm: Make proc_comm clock control into a platform driver ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver ARM: msm: Remove clock-7x30.h include file ARM: msm: Remove custom clk_set_{max,min}_rate() API ARM: msm: Remove custom clk_set_flags() API msm: iommu: Use clk_set_rate() instead of clk_set_min_rate() msm: iommu: Convert to clk_prepare/unprepare msm_sdcc: Convert to clk_prepare/unprepare usb: otg: msm: Convert to clk_prepare/unprepare msm_serial: Use devm_clk_get() and properly return errors msm_serial: Convert to clk_prepare/unprepare ...
2013-07-03Merge tag 'drivers-for-linus' of ↵Linus Torvalds8-26/+1074
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver specific changes from Arnd Bergmann: "These changes are all driver specific and cross over between arm-soc contents and some other subsystem, in these cases cpufreq, crypto, dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have these changes merged through arm-soc. As we proceed to untangle the dependencies between platform code and driver code, the amount of changes in this category is fortunately shrinking, for 3.11 we have 16 branches here and 101 non-merge changesets, the majority of which are for the stedma40 dma engine driver used in the ux500 platform. Cleaning up that code touches multiple subsystems, but gets rid of the dependency in the end. The mailbox code moved out from mach-omap2 to drivers/mailbox is an intermediate step and is still omap specific at the moment. Patches exist to generalize the subsystem and add other drivers with the same API, but those did not make it for 3.11." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits) crypto: ux500: use dmaengine_submit API crypto: ux500: use dmaengine_prep_slave_sg API crypto: ux500: use dmaengine_device_control API crypto: ux500/crypt: add missing __iomem qualifiers crypto: ux500/hash: add missing static qualifiers crypto: ux500/hash: use readl on iomem addresses dmaengine: ste_dma40: Declare memcpy config as static ARM: ux500: Remove mop500_snowball_ethernet_clock_enable() ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO ARM: ux500: Provide a AB8500 GPIO Device Tree node gpio: rcar: fix gpio_rcar_of_table gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections gpio-rcar: Reference core gpio documentation in the DT bindings clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 ARM: dts: Update Samsung I2S documentation ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: add Exynos audio subsystem clock controller node clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: use #include for all device trees for Samsung pinctrl: s3c24xx: use correct header for chained_irq functions ...
2013-07-03Merge tag 'dt-for-linus' of ↵Linus Torvalds1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "These changes from 30 individual branches for the most part update device tree files, but there are also a few source code changes that have crept in this time, usually in order to atomically move over a driver from using hardcoded data to DT probing. A number of platforms change their DT files to use the C preprocessor, which is causing a bit of churn, but that is hopefully only this once" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits) ARM: at91: dt: rm9200ek: add spi support ARM: at91: dt: rm9200: add spi support ARM: at91/DT: at91sam9n12: add SPI DMA client infos ARM: at91/DT: sama5d3: add SPI DMA client infos ARM: at91/DT: fix SPI compatibility string ARM: Kirkwood: Fix the internal register ranges translation ARM: dts: bcm281xx: change comment to C89 style ARM: mmc: bcm281xx SDHCI driver (dt mods) ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support arm: mvebu: enable mini-PCIe connectors on Armada 370 RD ARM: shmobile: irqpin: add a DT property to enable masking on parent ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ...
2013-06-30pinctrl: st: Remove unnecessary use of of_match_ptr macroAxel Lin1-1/+1
This is a DT only driver and st_pctl_of_match is always compiled in. Hence of_match_ptr is unnecessary. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-28pinctrl: st: fix return value checkWei Yongjun1-4/+4
In case of error, the function pinctrl_register() returns NULL not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. The function syscon_regmap_lookup_by_phandle() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-27pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()Wei Yongjun1-3/+1
There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25Merge tag 'soc-exynos5420-2' of ↵Olof Johansson3-0/+121
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late From Kukjin Kim, this adds pinctrl support for Exynos 5420. * tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: exynos: add exynos5420 SoC specific data ARM: dts: add pinctrl support to EXYNOS5420 Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25pinctrl: st: Add pinctrl and pinconf support.Srinivas KANDAGATLA3-0/+1410
This patch add pinctrl support to ST SoCs. About hardware: ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle pin configurations. Each multi-function pin is controlled, driven and routed through the PIO multiplexing block. Each pin supports GPIO functionality (ALT0) and multiple alternate functions(ALT1 - ALTx) that directly connect the pin to different hardware blocks. When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO block. Otherwise the PIO multiplexing block configures these parameters and retiming the signal. About driver: This pinctrl driver manages both PIO and PIO-mux block using pinctrl, pinconf, pinmux, gpio subsystems. All the pinctrl related config information can only come from device trees. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-25pinctrl: remove bindings for pinconf options needing more thoughtHeiko Stübner1-3/+0
Some options currently take arguments in unspecified driver-specific units. As pointed out by Stephen Warren, driver specific values should not be part of generic devicetree bindings describing the hardware. Therefore remove the critical bindings again, before they become part of an official release. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25pinctrl: remove slew-rate parameter from tz1090Heiko Stübner2-10/+0
As the binding for slew-rate is under discussion and seems to need more tought it will get removed for now, so it doesn't get an offical release. Therefore remove it again from the only current user, tz1090. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25pinctrl: set unit for debounce time pinconfig to usecHeiko Stübner1-1/+1
Currently the debounce time pinconfig option uses an unspecified "time units" unit. As pinconfig options should use SI units and a real unit is also necessary for generic dt bindings, change it to usec. Currently no driver is using the generic pinconfig option for this, so the unit change is safe to do. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25pinctrl: rip out the direct pinconf APILinus Walleij1-174/+0
From the inception ot the pin config API there has been the possibility to get a handle at a pin directly and configure its electrical characteristics. For this reason we had: int pin_config_get(const char *dev_name, const char *name, unsigned long *config); int pin_config_set(const char *dev_name, const char *name, unsigned long config); int pin_config_group_get(const char *dev_name, const char *pin_group, unsigned long *config); int pin_config_group_set(const char *dev_name, const char *pin_group, unsigned long config); After the introduction of the pin control states that will control pins associated with devices, and its subsequent introduction to the device core, as well as the introduction of pin control hogs that can set up states on boot and optionally also at sleep, this direct pin control API is a thing of the past. As could be expected, it has zero in-kernel users. Let's delete this API and make our world simpler. Reported-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driverJames Hogan3-0/+1036
Add a pin control driver for the TZ1090's low power pins via the powerdown controller SOC_GPIO_CONTROL registers. These pins have individually controlled pull-up, and group controlled schmitt, slew-rate, drive-strength, and power-on-start (pos). The pdc_gpio0 and pdc_gpio1 pins can also be muxed onto the ir_mod_stable_out and ir_mod_power_out functions respectively. If no function is set they remain in GPIO mode. These muxes can be overridden by requesting them as GPIOs. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-doc@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl-tz1090: add TZ1090 pinctrl driverJames Hogan3-0/+2084
Add a pin control driver for the main pins on the TZ1090 SoC. This doesn't include the low-power pins as they're controlled separately via the Powerdown Controller (PDC) registers. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-doc@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: samsung: Staticize drvdata_listSachin Kamat1-1/+1
'drvdata_list' is used only in this file. Make it static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: rockchip: Add missing irq_gc_unlock() call before return errorAxel Lin1-0/+1
Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: abx500: rework error pathPatrice Chotard1-27/+87
At several places, return value was not tested and error output was missing. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: abx500: suppress hardcoded valuePatrice Chotard1-4/+17
Replace hardcoded value by corresponding #define's. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: abx500: factorize codePatrice Chotard1-17/+15
Factorize code by adding abx500_pullud_supported() which improve code readability. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: abx500: fix abx500_gpio_get()Patrice Chotard1-2/+15
- allow to get output GPIO value - as there is no GPIO0 on ABX500, use correct offset with abx500_gpio_get_bit() Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: abx500: fix abx500_pin_config_set()Patrice Chotard1-6/+25
- Update abx500_pin_config_set() in order to take in account PIN_CONFIG_BIAS_DISABLE state to disable pull up or pull down. - Rework error path. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24pinctrl: abx500: Add device tree supportPatrice Chotard1-0/+184
We use the same way to define pin muxing and pin configuration than for nomadik. So pickup code from pinctrl_nomadik.c to be able to implement pin multiplexing and pin configuration using the device tree. Pin configuration uses generic parsing code. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24sh-pfc: Guard DT parsing with #ifdef CONFIG_OFLaurent Pinchart1-0/+4
Fix a compilation error caused by pinconf_generic_parse_dt_config() not being defined on !CONFIG_OF platforms by guarding the whole DT node parsing code with #ifdef CONFIG_OF. Defining a pinconf_generic_parse_dt_config() on !CONFIG_OF would have been possible as well, but would have resulted in a larger code size on !CONFIG_OF platforms (such as arch/sh). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-21Merge tag 'renesas-pinmux2-for-v3.11' of ↵Arnd Bergmann3-26/+403
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers From Simon Horman: Second Round of Renesas ARM based SoC pinmux and GPIO update for v3.11 tidyup MMC_D1 pin for r8a7778 SoC fix two pin numbers and add HSCIF pin groups to r8a7790 SoC add pinmux data for MMCIF and SDHI interfaces for r8a73a4 SoC * tag 'renesas-pinmux2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh-pfc: r8a7778: tidyup MMC_D1 pin pinctrl: r8a7790: fix two pin numbers sh-pfc: r8a7790: add HSCIF pin groups pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21Merge tag 'renesas-cleanup-for-v3.11' of ↵Arnd Bergmann11-1529/+9944
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late From Simon Horman: Renesas ARM based SoC cleanups for v3.11 __initdata annotations for the r8a7790 SoC by Morimoto-san. * tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits) ARM: shmobile: r8a7790: add __initdata on resource and device data Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21Merge tag 's3c24xx-pinctrl-2' of ↵Arnd Bergmann1-2/+1
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim: based on s3c24xx-pinctrl - use correct header for chained_irq functions for s3c24xx-pinctrl * tag 's3c24xx-pinctrl-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: s3c24xx: use correct header for chained_irq functions Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20Merge tag 'exynos-arch-2' of ↵Arnd Bergmann1-2/+3
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim: arch/arm/mach-exynos update - enable XHCI on exynos5 - enable Pinctrl on exynos4 and exynos5 - calling scu_enable() is only available on Cortex-A9 * tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: call scu_enable() only in case of cortex-A9 processor ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level ARM: EXYNOS: Enable XHCI support on exynos5 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20Merge tag 'nomadik-dt-2' of ↵Arnd Bergmann1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt From Linus Walleij: Nomadik DT and clock work: - Lee Jones' pinctrl compat ontology patches - A real clock driver for the Nomadik, 100% DT-based - Device tree changes for the Nomadik clocks * tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS Conflicts: arch/arm/boot/dts/ste-nomadik-s8815.dts Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20Merge tag 'u300-multiplatform' of ↵Arnd Bergmann2-16/+26
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc From Linus Walleij: Device Tree and Multiplatform support for U300: - Add devicetree support to timer, pinctrl (probe), I2C block, watchdog, DMA controller and clocks. - Piecewise add a device tree containing all peripherals. - Delete the ATAG boot path. - Delete redundant platform data and board files. - Convert to multiplatform. * tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (40 commits) ARM: u300: switch to using syscon regmap for board ARM: u300: Update MMC configs for u300 defconfig spi: pl022: use DMA by default when probing from DT pinctrl: get rid of all platform data for coh901 ARM: u300: convert MMC/SD clock to device tree ARM: u300: move the gated system controller clocks to DT i2c: stu300: do not request a specific clock name clk: move the U300 fixed and fixed-factor to DT ARM: u300: remove register definition file ARM: u300: add syscon node ARM: u300 use module_spi_driver to register driver ARM: u300: delete remnant machine headers ARM: u300: convert to multiplatform ARM: u300: localize <mach/u300-regs.h> ARM: u300: delete <mach/irqs.h> ARM: u300: delete <mach/hardware.h> ARM: u300: push down syscon registers ARM: u300: remove deps from debug macro ARM: u300: move debugmacro to debug includes ARM: u300: delete all static board data ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-19pinctrl: exynos: add exynos5420 SoC specific dataLeela Krishna Amudala3-0/+121
Add Samsung EXYNOS5420 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5420. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by : Sunil Joshi <joshi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip levelDoug Anderson1-2/+3
Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be missing the pincontrol definitions. Move PINCTRL selects to the arch level since we should be enabling the code for all exynos variants. Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not for exynos5440. Also add basic dependencies for the PINCTRL_EXYNOS kernel config. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18pinctrl: s3c24xx: use correct header for chained_irq functionsHeiko Stuebner1-2/+1
chained_irq_enter and chained_irq_exit moved to a real header under linux/pinctrl instead of asm/. Update the pinctrl driver to use the correct header and fix the build error. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>` Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-18pinctrl: add Intel BayTrail GPIO/pinctrl supportMathias Nyman3-0/+556
Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins. Supports gpio interrupts and ACPI gpio events Pins may be muxed to alternate function instead of gpio by firmware. This driver does not touch the pin muxing and expect firmare to set pin muxing and pullup/down properties properly. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18pinctrl: Staticize local symbolsSachin Kamat1-2/+2
Symbols referenced only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18pinctrl: spear/plgpio: Staticize spear310_o2pSachin Kamat1-1/+1
'spear310_o2p' is referenced only in this file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18pinctrl: nomadik: Staticize local symbolsSachin Kamat1-3/+3
Some symbols referenced only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18pinctrl: bcm2835: Staticize bcm2835_gpio_pinsSachin Kamat1-1/+1
'bcm2835_gpio_pins' is used only in this file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18sh-pfc: Add pinconf support to DT bindingsLaurent Pinchart1-12/+97
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18sh-pfc: Add DT supportLaurent Pinchart2-1/+179
Support device instantiation through the device tree. The compatible property is used to select the SoC pinmux information. Set the gpio_chip device field to the PFC device to enable automatic GPIO OF support. Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18sh-pfc: Remove support for platform dataLaurent Pinchart1-2/+1
Platform data isn't used, support can thus be removed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18pinctrl: core: fix missing unlock on error in pinctrl_find_gpio_range_from_pin()Wei Yongjun1-8/+7
Add the missing unlock before return from function pinctrl_find_gpio_range_from_pin() in the error handling case. Introduced by commit 2ff3477efd7086544b9e298fc63afab0645921b4. (pinctrl: add pin list based GPIO ranges) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18sh-pfc: r8a7778: tidyup MMC_D1 pinKuninori Morimoto1-2/+2
MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8) Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17pinctrl: exynos: ack level-triggered interrupts before unmaskingDoug Anderson1-0/+22
A level-triggered interrupt should be acked after the interrupt line becomes inactive and before it is unmasked, or else another interrupt will be immediately triggered. Acking before or after calling the handler is not enough. Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-22 23:08:30 +0300