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path: root/drivers/pinctrl
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2013-10-29pinctrl: imx1 core driverMarkus Pargmann4-0/+732
Core driver for register formats of imx1/imx21/imx27 processors. The pins of those processors are grouped into ports. Each port has 32 pins. The pins mux configuration is controlled by registers with 1 or 2 bit per pin, depending on the specific control register. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23pinctrl: at91: correct a few typosAlexandre Belloni1-4/+4
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23pinctrl: mvebu: remove redundant of_match_ptrSachin Kamat4-4/+4
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23pinctrl: tb10x: use module_platform_driver to simplify the codeWei Yongjun1-11/+1
module_platform_driver() makes the code simpler by eliminating boilerplate code. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-23pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe()Wei Yongjun1-5/+4
This patch fix the error handling in tb10x_pinctrl_probe(): - devm_ioremap_resource() return ERR_PTR() and never return NULL - remove the dev_err call to avoid redundant error message - pinctrl_register() returns NULL not ERR_PTR() Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: emulate both edge triggered interruptsHeiko Stübner1-7/+54
The gpio interrupt controller on Rockchip socs can do edge triggers only for single edges but not both. Nevertheless a lot of gpio users rely on the availability of both-edge triggered interrupts - i.e. gpio-keys. Therefore implement a solution similar to pinctrl-coh901 re-setting the triggering edge depending on the gpio value in the interrupt demuxer. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: add rk3188 specificsHeiko Stübner1-7/+112
Besides the pull registers sitting in a separate place, the rk3188 also has the peculiarity that the pull registers of the first bank are split and the first half is sitting in the register space of the pmu. Therefore this adds a special bank-type for the first bank, to handle the two register sources. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: remove redundant checkHeiko Stübner1-6/+0
The check limiting bias options to supported ones is already done thru rockchip_pinconf_pull_valid. Therefore this check is redundant and can be removed. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: add support for multiple bank typesHeiko Stübner1-3/+14
There are Rockchip SoCs, namely the rk3188, that combine a set of regular banks with banks that need special handling for some settings. Therefore add the possibility for the driver to handle more than one bank type. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: rockchip: separate different sub-types moreHeiko Stübner1-48/+57
Further investigation of the different Rockchip SoCs showed that the differences especially in the pull settings are quite deep. As further patches will show, the register layout for the pulls of the rk3188 is quite strange. Also it is to assume, that later Rockchip SoCs may introduce even more quirks in this regard, making it hard to support all of those using the current generic pull_* variables. Therefore move the driver to hold the type of controller in an enum and do the handling according to it in the necessary places. Also instead of calculating the register in the get and set pull functions move it to a type-specific callback. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: dove: unset twsi option3 for gconfig as wellRoel Kluin1-1/+1
This fixes a typo which left twsi config3 option enabled. Cc: stable@vger.kernel.org Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl: add TB10x pin control driverChristian Ruppert3-0/+891
The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs. Used to control the pinmux and is a prerequisite for the GPIO driver. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-16pinctrl/gpio: non-linear GPIO ranges accesible from gpiolibChristian Ruppert1-0/+14
This patch adds the infrastructure required to register non-linear gpio ranges through gpiolib and the standard GPIO device tree bindings. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-10pincntrl: add support for ams AS3722 pin control driverLaxman Dewangan3-0/+642
The AS3722 is a compact system PMU suitable for mobile phones, tablets etc. Add a driver to support accessing the GPIO, pinmux and pin configuration of 8 GPIO pins found on the ams AS3722 through pin control driver and gpiolib. The driver will register itself as the pincontrol driver and gpio driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-09pinctrl: pinctrl-adi2: disable IRQ when setting valueSonic Zhang1-6/+8
GPIO output value should be set after the GPIO interrupt is disabled. Use BIT macro as well. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> [Edited commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-09pinctrl: pinctrl-adi2: Remove nested lock+irqsave that resue flags.Sonic Zhang1-18/+22
Also avoid use NULL pointer in error message. v2-changes: - use port pinter only after checking Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: palmas: remove pin config BIAS_PULL_PIN_DEFAULT supportLaxman Dewangan1-3/+0
Palmas devices do not support the default bias configuration and hence removing this option from valid pin config parameters. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08Merge tag 'v3.12-rc4' into develLinus Walleij2-8/+9
Linux 3.12-rc4
2013-10-08pinctrl: sirf: add USB1/UART1 pinmux usb/uart shareRong Wang4-6/+116
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1). here we add this pinmux capability. USB1/UART1 mode selection has dedicated control register in RSC module, here we attach the register offset of private data of related pin groups. Signed-off-by: Rong Wang <Rong.Wang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: sirf: add lost USP-based UART pin groups for prima2Qipan Li1-0/+60
USP(Universal Serial Ports) can be UART as commit 5df831117b85a08e7aa, this patch defines the USP-based UART function pin groups for prima2. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: sirf: add lost uart0-no-stream-control pingroup for prima2Qipan Li1-0/+3
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: remove redundant of_match_ptrSachin Kamat11-12/+12
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. This is a squash commit of: pinctrl: at91: Remove redundant of_match_ptr pinctrl: exynos5440: Remove redundant of_match_ptr pinctrl: imx35: Remove redundant of_match_ptr pinctrl: imx51: Remove redundant of_match_ptr pinctrl: imx53: Remove redundant of_match_ptr pinctrl: imx6dl: Remove redundant of_match_ptr pinctrl: imx6q: Remove redundant of_match_ptr pinctrl: samsung: Remove redundant of_match_ptr pinctrl: vf610: Remove redundant of_match_ptr pinctrl: imx6sl: Remove redundant of_match_ptr pinctrl: plgpio: Remove redundant of_match_ptr Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27pinctrl: palmas: do not abort pin configuration for BIAS_DEFAULTLaxman Dewangan1-2/+3
Recent movement of all configurations of pin in the single call of pin_config_set(), it is aborting configuration if BIAS_PULL_PIN_DEFAULT is selected as return of configuration. The original idea was to just avoid any update on register for pull up/down configuration if this option is selected. Fixing this by just bypassing any register update for BIAS_PULL_PIN_DEFAULT and continuing the remaining configuration. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27Merge branch 'pinmux/next' of git://linuxtv.org/pinchartl/fbdev into develLinus Walleij4-5/+239
2013-09-27pinctrl: palmas: remove non-require functionLaxman Dewangan1-17/+0
Palmas pinmux and pin configuration support the single pin level configuration in place of pin group. Hence it is only require to pin_config_{set|get} and do not require pin_config_group_{set|get}. As core framework already check for require APIs availability, it is not require to implement as dummy for non-require ops and so removing it. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27pinctrl: Correct number of pins for s5pv210Mateusz Krawczuk1-6/+6
Values of pins in table s5pv210 bank are incorrect. This patch correct values. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27pinctrl: adi2: Fix dead lock in adi_gpio_direction_outputAxel Lin1-1/+2
Current code hold port->lock spinlock and then try to grab the lock again in adi_gpio_set_value(). Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27pinctrl: adi2: Convert to devm_ioremap_resourceAxel Lin1-32/+6
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27pinctrl: at91: fix sam9x5 debounce/deglitch functionsBoris BREZILLON1-5/+13
Replace at91_mux_get_deglitch with at91_mux_pio3_get_deglitch when using sam9x5 (pio3) IP. at91_mux_get_deglitch only test the activation of the "Input Filter" which may be overloaded by the activation of the "Input Filter Slow Clock" to use the input filter as a debounce filter instead of a deglitch filter. Fix at91_mux_pio3_get_debounce to test the activation of the Input Filter before testing the activation of the debounce filter (Input Filter Slow Clock depends on Input Filter). Fix at91_mux_pio3_set_debounce function to avoid disabling the deglitch filter ("Input Filter") when debounce filter is disabled. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27pinctrl: at91: fix typosBoris BREZILLON1-3/+3
Fix AT91_PINCTRL_DEBOUNCE_VAL dt macro typo. Fix at91_pinctrl_mux_ops callback typos. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-27sh-pfc: r8a7790: add pin definitions for the I2C3 interfaceGuennadi Liakhovetski1-0/+28
There are four I2C interfaces on r8a7790, each of them can be connected to one of the two respective I2C controllers, e.g. interface #0 can be configured to work with I2C0 or with IIC0. Additionally some of those interfaces can also use one of several pin sets. Interface #3 is special, because it can be used in automatic mode for DVFS. It only has one set of pins available and those pins cannot be used for anything else, they also lack the GPIO function. This patch uses the sh-pfc ability to configure pins, not associated with GPIOs and adds support for I2C3 to the r8a7790 PFC set up. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-09-24sh-pfc: r8a7790: Add I2C pin groups and functionsUlrich Hecht1-0/+82
Adds pinmux for i2c bus 1 and 2. (Pins for 0 and 3 are not multiplexed.) Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-09-24sh-pfc: r8a7778: Add SRU/SSI pin supportKuninori Morimoto1-0/+125
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-09-23Merge branch 'devel' into for-nextLinus Walleij6-0/+2392
2013-09-23pinctrl: remove an unnecessary castDan Carpenter1-1/+1
sizeof() is already size_t so there is no need to cast here. Generally, casting inside the min() macro instead of using min_t() is considered bad style. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-23pinctrl: fix pinconf_dbg_config_write return typeVincent Stehlé1-1/+1
Have pinconf_dbg_config_write() return a ssize_t. This fixes the following compilation warning: drivers/pinctrl/pinconf.c:617:2: warning: initialization from incompatible pointer type [enabled by default] drivers/pinctrl/pinconf.c:617:2: warning: (near initialization for ‘pinconf_dbg_pinconfig_fops.write’) [enabled by default] Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-23pinctrl: pinctrl-adi2-bf60x: remove useless and duplicated GPIO definition ↵Sonic Zhang1-2/+1
for PPI2. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-23pinctrl: pinctrl-adi2: Add dependency to arch BLACKFIN in Kconfig.Sonic Zhang1-0/+1
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-19pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.Sonic Zhang6-0/+2392
The new ADI GPIO2 controller was introduced since the BF548 and BF60x processors. It differs a lot from the old one on BF5xx processors. So, create a pinctrl driver under the pinctrl framework. - Define gpio ports and pin interrupt controllers as individual platform devices. - Register a pinctrl driver for the whole GPIO ports and pin interrupt devices. - Probe pint devices before port devices. Put device instances into the global gpio and pint lists. - Define peripheral, irq and gpio reservation bit masks for each gpio port as runtime resources. - Save and restore gpio port and pint status MMRs in syscore PM functions. - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Handle peripheral and gpio requests in pinctrl operation functions. - Demux gpio IRQs via the irq_domain created by each GPIO port. v2-changes: - Remove unlinke() directive. v3-changes: - Rename struct adi_pmx to adi_pinctrl. - Fix the comments of struct gpio_pint. - Remove unused pin_base in struct gpio_port. - Change pint_assign into bool type. - Add comments about the relationship between pint device and port device to the driver header. - Use BIT macro to shift bit. - Remove all bitmap reservation help functions. Inline reservation functions into the actual code. - Remove gpio and offset mutual reference help functions. - Remove all help functions to find gpio_port and adi_pinctrl structs. Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Pass bool type usage variable to port_setup help function. - Separate long bit operations into several lines and add comments. - Use debugfs to output all GPIO request information. - Avoid to set drvdata to NULL - Add explanation to function adi_gpio_init_int() - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Remove the reference to pin control device from the gpio_port struct. Remove the reference list to gpio device from the adi_pinctrl struct. Replace the global adi_pinctrl list with adi_gpio_port_list. Walk through the gpio list to do power suspend and resume operations. - Remove the global GPIO base from struct adi_pinctrl, define pin base in the platform data for each GPIO port device. - Initialize adi_pinctrl_setup in arch_initcall(). - print the status of triggers, whether it is in GPIO mode, if it is flagged to be used as IRQ, etc in adi_pin_dbg_show(). - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. v4-changes: - remove useless system_state checking. - replace dev_err with dev_warn in both irq and gpio pin cases. - comment on relationship between irq type and invert operation. - It is not necessary to check the reservation mode of the requested pin in IRQ chip operation. Remove the reservation map. - Use existing gpio/pinctrl subsystem debugfs files. Remove pinctrl-adi2 driver specific debugfs output. - Add linkport group and function information for bf60x. - Separate uart and ctsrts pins into 2 groups. - Separate APAPI and alternative ATAPI pins into 2 groups. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-19pinctrl: tegra114: Remove MODULE_ALIASThierry Reding1-3/+2
The driver cannot be built as a module, so having a MODULE_ALIAS() isn't useful. While at it, fix a small typo in the file header comment and make the module description string consistent with those for earlier Tegra SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-05Merge tag 'PTR_RET-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux Pull PTR_RET() removal patches from Rusty Russell: "PTR_RET() is a weird name, and led to some confusing usage. We ended up with PTR_ERR_OR_ZERO(), and replacing or fixing all the usages. This has been sitting in linux-next for a whole cycle" [ There are still some PTR_RET users scattered about, with some of them possibly being new, but most of them existing in Rusty's tree too. We have that #define PTR_RET(p) PTR_ERR_OR_ZERO(p) thing in <linux/err.h>, so they continue to work for now - Linus ] * tag 'PTR_RET-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: GFS2: Replace PTR_RET with PTR_ERR_OR_ZERO Btrfs: volume: Replace PTR_RET with PTR_ERR_OR_ZERO drm/cma: Replace PTR_RET with PTR_ERR_OR_ZERO sh_veu: Replace PTR_RET with PTR_ERR_OR_ZERO dma-buf: Replace PTR_RET with PTR_ERR_OR_ZERO drivers/rtc: Replace PTR_RET with PTR_ERR_OR_ZERO mm/oom_kill: remove weird use of ERR_PTR()/PTR_ERR(). staging/zcache: don't use PTR_RET(). remoteproc: don't use PTR_RET(). pinctrl: don't use PTR_RET(). acpi: Replace weird use of PTR_RET. s390: Replace weird use of PTR_RET. PTR_RET is now PTR_ERR_OR_ZERO(): Replace most. PTR_RET is now PTR_ERR_OR_ZERO
2013-08-30pinctrl: sunxi: Fix off-by-one for valid offset range checkingAxel Lin1-1/+1
The valid offset range should be 0 ... chip->ngpio - 1. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-30pinctrl: sunxi: drop lock on error pathLinus Walleij1-1/+3
I forgot to drop the lock for the return inside the loop protected by the spinlock in the pin config routine when merging in -rc7 in commit 6ad30ce046aefbdc3848232c665a728860d7bb68 Reported-by: Sherman Yin <syin@broadcom.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-29pinctrl: pinconf-generic: Remove ti prefix in dev_err messagesAxel Lin1-3/+2
It does not make sense to show ti prefix in pinconf_generic_dt_subnode_to_map() dev_err messages. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-29Merge tag 'v3.11-rc7' into develLinus Walleij6-7/+81
Merged in this to avoid conflicts with the big locking fixes from upstream. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/pinctrl/pinctrl-sunxi.c
2013-08-29pinctrl: rockchip: Implement .request() and .free() callbacksAxel Lin1-0/+12
Implement .request() and .free() callbacks on the GPIO chips to inform pinctrl when a GPIO is requested or freed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: at91: fix get_pullup/down function returnBoris BREZILLON1-2/+2
In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the pullup/down for this pin (pin is represented as a bit position) is disabled. Cc: stable <stable@vger.kernel.org> # 3.8+ Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: sh-pfc: remove unnecessary platform_set_drvdata()Jingoo Han1-2/+0
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: Add s5pv210 support to pinctrl-exynosMateusz Krawczuk4-1/+62
This patch implements pinctrl support and adds device tree bindings for s5pv210. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-28pinctrl: utils: include export.h to avoid warningsLaxman Dewangan1-0/+1
Include "linux/export.h" to avoid following warnings during compilation: /*** pinctrl/pinctrl-utils.c:53:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:53:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:53:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:70:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:70:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:70:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:98:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:98:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:98:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:122:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:122:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:122:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:135:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:135:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:135:1: warning: parameter names (without types) in function declaration [enabled by default] **/ Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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