summaryrefslogtreecommitdiff
path: root/drivers/net/phy/at803x.c
AgeCommit message (Collapse)AuthorFilesLines
2017-12-13net: phy: fix resume handlingRussell King1-4/+0
When a PHY has the BMCR_PDOWN bit set, it may decide to ignore writes to other registers, or reset the registers to power-on defaults. Micrel PHYs do this for their interrupt registers. The current structure of phylib tries to enable interrupts before resuming (and releasing) the BMCR_PDOWN bit. This fails, causing Micrel PHYs to stop working after a suspend/resume sequence if they are using interrupts. Fix this by ensuring that the PHY driver resume methods do not take the phydev->lock mutex themselves, but the callers of phy_resume() take that lock. This then allows us to move the call to phy_resume() before we enable interrupts in phy_start(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-12-05phylib: Add device reset GPIO supportSergei Shtylyov1-15/+3
The PHY devices sometimes do have their reset signal (maybe even power supply?) tied to some GPIO and sometimes it also does happen that a boot loader does not leave it deasserted. So far this issue has been attacked from (as I believe) a wrong angle: by teaching the MAC driver to manipulate the GPIO in question; that solution, when applied to the device trees, led to adding the PHY reset GPIO properties to the MAC device node, with one exception: Cadence MACB driver which could handle the "reset-gpios" prop in a PHY device subnode. I believe that the correct approach is to teach the 'phylib' to get the MDIO device reset GPIO from the device tree node corresponding to this device -- which this patch is doing... Note that I had to modify the AT803x PHY driver as it would stop working otherwise -- it made use of the reset GPIO for its own purposes... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> [geert: Propagate actual errors from fwnode_get_named_gpiod()] [geert: Avoid destroying initial setup] [geert: Consolidate GPIO descriptor acquiring code] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-12-01net: phy: remove generic settings for callbacks config_aneg and read_status ↵Heiner Kallweit1-6/+0
from drivers Remove generic settings for callbacks config_aneg and read_status from drivers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-10-12net: phy: at803x: Change error to EINVAL for invalid MACDan Murphy1-1/+1
Change the return error code to EINVAL if the MAC address is not valid in the set_wol function. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-30Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-26/+39
Mostly simple overlapping changes. For example, David Ahern's adjacency list revamp in 'net-next' conflicted with an adjacency list traversal bug fix in 'net'. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-29net: phy: at803x: Add a definition for PHY ID maskFabio Estevam1-6/+7
Add a definition for PHY ID mask for improving code readability. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-27at803x: double check SGMII side autonegZefir Kurtisi1-0/+39
In SGMII mode, we observed an autonegotiation issue after power-down-up cycles where the copper side reports successful link establishment but the SGMII side's link is down. This happened in a setup where the at8031 is connected over SGMII to a eTSEC (fsl gianfar), but so far could not be reproduced with other Ethernet device / driver combinations. This commit adds a wrapper function for at8031 that in case of operating in SGMII mode double checks SGMII link state when generic aneg_done() succeeds. It prints a warning on failure but intentionally does not try to recover from this state. As a result, if you ever see a warning '803x_aneg_done: SGMII link is not ok' you will end up having an Ethernet link up but won't get any data through. This should not happen, if it does, please contact the module maintainer. Signed-off-by: Zefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-10-27Revert "at803x: fix suspend/resume for SGMII link"Zefir Kurtisi1-26/+0
This reverts commit 98267311fe3b334ae7c107fa0e2413adcf3ba735. Suspending the SGMII alongside the copper side made the at803x inaccessable while powered down, e.g. it can't be re-probed after suspend. Signed-off-by: Zefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-28net: phy: at803x: only the AT8030 needs a hardware reset on link changeTimur Tabi1-22/+18
Commit 13a56b44 ("at803x: Add support for hardware reset") added a work-around for a hardware bug on the AT8030. However, the work-around was being called for all 803x PHYs, even those that don't need it. Function at803x_link_change_notify() checks to make sure that it only resets the PHY on the 8030, but it makes more sense to not call that function at all if it isn't needed. Signed-off-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-23net: phy: at803x: Request 'reset' GPIO only for AT8030 PHYSebastian Frias1-0/+4
This removes the dependency on GPIOLIB for non faulty PHYs. Indeed, without this patch, if GPIOLIB is not selected devm_gpiod_get_optional() will return -ENOSYS and the driver probe call will fail, regardless of the actual PHY hardware. Out of the 3 PHYs supported by this driver (AT8030, AT8031, AT8035), only AT8030 presents the issues that commit 13a56b449325 ("net: phy: at803x: Add support for hardware reset") attempts to work-around by using a 'reset' GPIO line. Hence, only AT8030 should depend on GPIOLIB operating properly. Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset") Signed-off-by: Sebastian Frias <sf84@laposte.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-23at803x: fix reset handlingSergei Shtylyov1-3/+3
The driver of course "knows" that the chip's reset signal is active low, so it drives the GPIO to 0 to reset the PHY and to 1 otherwise; however all this will only work iff the GPIO is specified as active-high in the device tree! I think both the driver and the device trees (if there are any -- I was unable to find them) need to be fixed in this case... Fixes: 13a56b449325 ("net: phy: at803x: Add support for hardware reset") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-03-14at803x: fix suspend/resume for SGMII linkZefir Kurtisi1-0/+26
When operating the at803x in SGMII mode, resuming the chip from power down brings up the copper-side link but leaves the SGMII link in unconnected state (tested with at8031 attached to gianfar). In effect, this caused a permanent link loss once the related interface was put down. This patch ensures that power down handling in supspend() and resume() is also applied to the SGMII link. Signed-off-by: Zefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-18net: phy: at803x: Add the interrupt register bit definitionsMartin Blumenstingl1-9/+23
Also use them instead of a magic value when enabling the interrupts. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-18net: phy: at803x: Clean up duplicate register definitionsMartin Blumenstingl1-8/+11
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-18net: phy: at803x: Allow specifying the RGMII RX clock delay via phy modeMartin Blumenstingl1-9/+54
at803x currently automatically enables the RGMII TX clock delay when the phy interface mode is PHY_INTERFACE_MODE_RGMII_TXID. The same should be done when PHY_INTERFACE_MODE_RGMII_ID is specified. Use a similar logic to enable the RGMII RX clock delay as well. at803x_context_{save,restore} were not touched because these are only used on AR8030 which is a RMII phy (RGMII clock delays are irrelevant). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-18net: phy: at803x: Don't set gbit features for the AR8030 phyMartin Blumenstingl1-1/+1
The 8030 is only a "RMII Fast Ethernet PHY", thus it must not have the SUPPORTED_1000* bits set. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-07phy: Centralize setting driver module ownerAndrew Lunn1-9/+0
Rather than have each driver set the driver owner field, do it once in the core code. This will also help with later changes, when the device structure will move. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-07phy: Add an mdio_device structureAndrew Lunn1-1/+1
Not all devices attached to an MDIO bus are phys. So add an mdio_device structure to represent the generic parts of an mdio device, and place this structure into the phy_device. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-01-07phy: Add phydev_err() and phydev_dbg() macrosAndrew Lunn1-2/+2
In preparation for moving some of the phy_device structure members, add macros for printing errors and debug information. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-16net: phy: at803x: support interrupt on 8030 and 8035Måns Rullgård1-0/+4
Commit 77a993942 "phy/at8031: enable at8031 to work on interrupt mode" added interrupt support for the 8031 PHY but left out the other two chips supported by this driver. This patch sets the .ack_interrupt and .config_intr functions for the 8030 and 8035 drivers as well. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-04-01net: phy: at803x: simplify using devm_gpiod_get_optional and its 4th argumentUwe Kleine-König1-5/+6
Since 39b2bbe3d715 (gpio: add flags argument to gpiod_get*() functions) which appeared in v3.17-rc1, the gpiod_get* functions take an additional parameter that allows to specify direction and initial value for output. Moreover use devm_gpiod_get_optional instead of ignoring all errors returned by devm_gpiod_get and simplify accordingly. The result is more strict error handling which is good. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-12net: phy: replace phy_drivers_register callsJohan Hovold1-13/+1
Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-23net: phy: at803x: fix coccinelle warningsFengguang Wu1-1/+1
drivers/net/phy/at803x.c:196:26-32: ERROR: application of sizeof to pointer sizeof when applied to a pointer typed expression gives the size of the pointer Generated by: scripts/coccinelle/misc/noderef.cocci Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Acked-by: Daniel Mack <zonque@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-22net: phy: at803x: Add support for hardware resetDaniel Mack1-41/+144
The AT8030 will enter a FIFO error mode if a packet is transmitted while the cable is unplugged. This hardware issue is acknowledged by the vendor, and the only proposed solution is to conduct a hardware reset via the external pin each time the link goes down. There is apparantly no way to fix up the state via the register set. This patch adds support for reading a 'reset-gpios' property from the DT node of the PHY. If present, this gpio is used to apply a hardware reset each time a 'link down' condition is detected. All relevant registers are read out before, and written back after the reset cycle. Doing this every time the link goes down might seem like overkill, but there is unfortunately no way of figuring out whether the PHY is in such a lock-up state. Hence, this is the only way of reliably fixing up things. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-22net: phy: at803x: use #defines for supported PHY idsDaniel Mack1-6/+10
This removes magic values from two tables and also allows us to match against specific PHY models at runtime. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-23net/phy: Remove return value for void functionShruti Kanetkar1-2/+1
This was caught when using a spatch (aka. coccinelle) script written by Joe Perches. Cc: Joe Perches <joe@perches.com> Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-21net: phy: at803x: use genphy_config_init()Daniel Mack1-33/+3
Use the generic bits from genphy_config_init() instead of implementing the same functionality again. Signed-off-by: Daniel Mack <zonque@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-30phy/at8031: enable at8031 to work on interrupt modeZhao Qiang1-0/+30
The at8031 can work on polling mode and interrupt mode. Add ack_interrupt and config intr funcs to enable interrupt mode for it. Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-09-28net: phy: at803x: add suspend/resume callbacksDaniel Mack1-0/+45
When WOL is enabled, the chip can't be put into power-down (BMCR_PDOWN) mode, as that will also switch off the MAC, which consequently leads to a link loss. Use BMCR_ISOLATE in that case, which will at least save us some milliamperes in comparison to normal operation mode. Signed-off-by: Daniel Mack <zonque@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-09-28net: phy: at803x: don't pass function pointers with &Daniel Mack1-6/+6
Just a cosmetic cleanup. Signed-off-by: Daniel Mack <zonque@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-07-11drivers: net: phy: at803x: Add missing mdio device idHelmut Schaa1-0/+1
at803x supports Atheros 8030, 8031 and 8035 PHYs. 8031 was missing from the mdio device id table. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-06-05drivers: net: phy: at803x: add support for AT8031Mugunthan V N1-0/+15
This patch adds support for Atheros 8031 phy driver. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-06-05drivers: net: phy: at803x: add interface mode supportMugunthan V N1-0/+16
This patch adds support for RGMII TX delay configuration on Atheros 803X, this can be enabled in debug registers. With this patch, PHY_INTERFACE_MODE_RGMII_TXID modes are now supported. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-06-05drivers: net: phy: at803x: seperate wol specific code to wol standard apisMugunthan V N1-16/+48
WOL is initilized in phy config_init, but there are standard apis (set_wol/get_wol) for WOL in phy frame work. So this patch moves WOL specific code from config_init to wol standard apis. Cc: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-06-05drivers: net: phy: at803x code cleanup on register and unregister driverMugunthan V N1-25/+10
Make use of phy_drivers_register/phy_drivers_unregister to register/unregister multiple phy drivers in a single module. Cc: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-10-18phy: add AT803x driverMatus Ujhelyi1-0/+176
This driver add support for wake over lan on AT803x phys. Signed-off-by: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>