summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)AuthorFilesLines
2014-09-19drm/i915: Remove dead code, i915_gem_verify_gttChris Wilson1-42/+0
The data structure it was supposed to be sanity checking has long gone. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: create intel_update_pipe_size()Gustavo Padovan1-30/+40
Factor out a piece of code from intel_pipe_set_base() that updates the pipe size and adjust fitter. This will help refactor the update primary plane path. v2: use struct intel_crtc as argument to intel_update_pipe_size() v3: use 'crtc' as argument name Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: pin sprite fb only if it changedGustavo Padovan1-15/+19
Optimize code avoiding helding dev mutex if old fb and current fb are the same. v2: take Ville's comments - move comment along with the pin_and_fence call - check for error before calling i915_gem_track_fb - move old_obj != obj to an upper if condition Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: remove !enabled handling from commit primary plane stepGustavo Padovan1-26/+0
The !crtc->enabled case will now be handled by the !visible code, since the handling is basically the same. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Restore resume irq ordering commentDaniel Vetter1-0/+1
This was lost in commit e11aa362308f5de467ce355a2a2471321b15a35c Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Wed Jun 18 09:52:55 2014 -0700 drm/i915: use runtime irq suspend/resume in freeze/thaw which makes the second part of this commen a bit nonsense. Both were originally added in commit 15239099d7a7a9ecdc1ccb5b187ae4cda5488ff9 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Tue Mar 5 09:50:58 2013 +0100 drm/i915: enable irqs earlier when resuming Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Imre Deak <imre.deak@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: split intel_primary_plane_setplane() into check() and commit()Gustavo Padovan1-58/+75
As a preparation for atomic updates we need to split the code to check everything we are going to commit first. This patch starts the work to split intel_primary_plane_setplane() into check() and commit() parts. More work is expected on this to get a better split of the two steps. Ideally the commit() step should never fail. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: split intel_cursor_plane_update() into check() and commit()Gustavo Padovan1-37/+69
Due to the upcoming atomic modesetting feature we need to separate some update functions into a check step that can fail and a commit step that should, ideally, never fail. The commit part can still fail, but that should be solved in another upcoming patch. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: split intel_update_plane into check() and commit()Gustavo Padovan1-92/+141
Due to the upcoming atomic modesetting feature we need to separate some update functions into a check step that can fail and a commit step that should, ideally, never fail. This commit splits intel_update_plane() and its commit part can still fail due to the fb pinning procedure. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: create struct intel_plane_stateGustavo Padovan1-0/+12
This new struct will be the storage of src and dst coordinates between the check and commit stages of a plane update. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: WARN if interrupts aren't on in en/disable_pipestatDaniel Vetter1-0/+2
Now that vlv has runtime pm we kinda should check for that like on the pch split platforms. Looks like this was simply lost in the vlv rpm enabling. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Enable full PPGTT on gen7Michel Thierry1-1/+1
Use full PPGTT as the default option in gen7. Note that aliasing PPGTT is the default option for gen8 (see HAS_PPGTT) since we're still fighting troubles around context switching and execlists. This may well come back to bite me later. Signed-off-by: Michel Thierry <michel.thierry@intel.com> [danvet: Explain that gen8 full ppgtt is blocked on execlists for now.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Use EIO instead of EAGAIN for sink CRC error.Rodrigo Vivi1-3/+3
If something while getting panel CRC this means that probably hw I/O error so hw is busted and try again shouldn't help much. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Extend BIOS stolen mem handling to all platformDaniel Vetter2-2/+19
Based upon a patch from Deepak, but reworked to only apply on gen7+ and with the logic a bit clarified. v2: Fix s/SHIFT/MASK/ fumble that Ville spotted. Cc: Deepak S <deepak.s@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Match GTT space sanity checker with implementationChris Wilson1-9/+11
If we believe that the device can cross cache domains in its prefetcher (i.e. we allow neighbouring pages in different domains), we don't supply a color_adjust callback. Use the presence of this callback to better determine when we should be verifying that the GTT space we just used is valid. v2: Remove the superfluous struct drm_device function param as well. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Also adjust the comment per irc discussion with Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: HSW always use GGTT selector for secure batchesChris Wilson1-2/+3
gen6 and earlier conflate address space selection (ppgtt vs ggtt) with the security bit (i.e. only privileged batches were allowed to run from ggtt). From Haswell only, you are able to select the security bit separate from the address space - and we always requested to use ppgtt. This breaks the golden render state batch execution with full-ppgtt as that is only present in the global GTT and more generally any secure batch that is not colocated in the ppgtt and ggtt. So we need to disable the use of the ppgtt selector bit for secure batches, or else we hang immediately upon boot and thence after every GPU reset... v2: Only HSW differentiates between secure dispatch and ggtt, so simply ignore the differentiation and always use secure==ggtt. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Rectify commit message as noted by Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: add cherryview specfic forcewake in execlists_elsp_writeDeepak S1-4/+25
In chv, we have two power wells Render & Media. We need to use corresponsing forcewake count. If we dont follow this we are getting error "*ERROR*: Timed out waiting for forcewake old ack to clear" due to multiple entry into __vlv_force_wake_get. Signed-off-by: Deepak S <deepak.s@linux.intel.com> Requested-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: fix another use-after-free in i915_gem_evict_everythingMichel Thierry1-2/+2
Also here, i915_gem_evict_vm causes an unbind, which can end up dropping the last ref to the ppgtt. Triggered by igt gem_evict_everything test. Testcase: igt/gem_evict_everything Signed-off-by: Michel Thierry <michel.thierry@intel.com> Reviewed-by: Chris Wilson <chris@cris-wilsonc.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Don't reinit hpd interrupts after gpu resetDaniel Vetter1-2/+0
Somehow I've overlooked this when simplifying the irq reinit scheme on gen4.5+ in commit 78ad455fd229c6f6cc2f390ccbe0d8f1a62d55a9 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu May 22 22:18:21 2014 +0200 drm/i915: Improve irq handling after gpu resets Since display interrups in general survive a gpu reset on those platforms there's also no need to reinit the hotplug settings. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Wrap -EIO send-vblank event for failed pageflip in spinlockChris Wilson1-1/+4
drm_send_vblank_event() demands that we hold the event spinlock whilst calling it, so do so. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Fix the double lock as requested by Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Drop any active reference before unbindingChris Wilson1-0/+3
Before we process the final unbind on an object and move it to the unbound list, it is semantically cleaner if there are no more active references to the object. (An active reference would imply that it was still being accessed by the GPU after it became inaccessible.) The caveat is that all callsites must be prepared for the object to disappeared during the unbind - i.e. they must hold their own reference. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Objects on the unbound list may still have an active referenceChris Wilson3-77/+74
Due to the lazy retirement semantics, even though we have unbound an object, it may still hold onto an active reference. So in the debug code, play safe. v2: Export i915_gem_shrink() rather than opencoding it. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915/edp: use lane count and link rate from DPCD for eDPJani Nikula1-17/+9
eDP panels are generally designed to support only a single clock and lane configuration. commit 56071a207602a451f0c46d3dcc8379b59ef576e2 Author: Jani Nikula <jani.nikula@intel.com> Date: Tue May 6 14:56:52 2014 +0300 drm/i915: use lane count and link rate from VBT as minimums for eDP should have started using the optimal link parameters for eDP panels. Turns out a certain other OS uses DPCD instead of VBT, which means trusting VBT on this may not be so reliable after all. Follow suit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81647 Tested-by: Adam Jirasek <libm3l@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79386 Tested-by: Narthana Epa <narthana.epa+freedesktop@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915/dp: add missing \n in the TPS3 debug messageJani Nikula1-1/+1
This goes back to commit 06ea66b6bb445043dc25a9626254d5c130093199 Author: Todd Previte <tprevite@gmail.com> Date: Mon Jan 20 10:19:39 2014 -0700 drm/i915: Enable 5.4Ghz (HBR2) link rate for Displayport 1.2-capable devices Cc: Todd Previte <tprevite@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> [danvet: Pimp commit message a bit.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915/hdmi, dp: Do not dereference the encoder in the connector destroyChris Wilson2-2/+2
Oops, apparently intel_hdmi/intel_dp is the encoder - an object with a distinct lifetime to the connector, and so we cannot simply reuse the common function to unset and free the edid. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Limit the watermark to at least 8 entries on gen2/3Ville Syrjälä1-0/+11
830 is very unhappy of the watermark value is too low (indicating a very high watermark in fact, ie. memory fetch will occur with an almost full FIFO). Limit the watermark value to at least 8 cache lines. That also matches the burst size we use on most platforms. BSpec seems to indicate we should limit the watermark to 'burst size + 1'. But on gen4 we already use a hardcoded 8 as the watermark value (as the spec says we should), so just use 8 as the limit on gen2/3 as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19drm/i915: Fix DVO 2x clock enable on 830MVille Syrjälä1-4/+49
The spec says: "For the correct operation of the muxed DVO pins (GDEVSELB/ I2Cdata, GIRDBY/I2CClk) and (GFRAMEB/DVI_Data, GTRDYB/DVI_Clk): Bit 31 (DPLL VCO Enable) and Bit 30 (2X Clock Enable) must be set to “1” in both the DPLL A Control Register (06014h-06017h) and DPLL B Control Register (06018h-0601Bh)." The pipe A and B force quirks take care of DPLL_VCO_ENABLE, so we just need a bit of special care to handle DPLL_DVO_2X_MODE. v2: Recompute num_dvo_pipes on the spot, use PIPE_A/PIPE_B instead of pipe/!pipe for the register offsets in disable (Daniel) Add a comment about the ordering in enable and another one about filtering out the DVO 2x bit in state readout Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Thomas Richter <richter@rus.uni-stuttgart.de> (v1) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-19sched, cleanup, treewide: Remove set_current_state(TASK_RUNNING) after ↵Kirill Tkhai1-1/+0
schedule() schedule(), io_schedule() and schedule_timeout() always return with TASK_RUNNING state set, so one more setting is unnecessary. (All places in patch are visible good, only exception is kiblnd_scheduler() from: drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd_cb.c Its schedule() is one line above standard 3 lines of unified diff) No places where set_current_state() is used for mb(). Signed-off-by: Kirill Tkhai <ktkhai@parallels.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: http://lkml.kernel.org/r/1410529254.3569.23.camel@tkhai Cc: Alasdair Kergon <agk@redhat.com> Cc: Anil Belur <askb23@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Dave Kleikamp <shaggy@kernel.org> Cc: David Airlie <airlied@linux.ie> Cc: David Howells <dhowells@redhat.com> Cc: Dmitry Eremin <dmitry.eremin@intel.com> Cc: Frank Blaschka <blaschka@linux.vnet.ibm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Helge Deller <deller@gmx.de> Cc: Isaac Huang <he.huang@intel.com> Cc: James E.J. Bottomley <JBottomley@parallels.com> Cc: James E.J. Bottomley <jejb@parisc-linux.org> Cc: J. Bruce Fields <bfields@fieldses.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Jiri Slaby <jslaby@suse.cz> Cc: Laura Abbott <lauraa@codeaurora.org> Cc: Liang Zhen <liang.zhen@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Masaru Nomura <massa.nomura@gmail.com> Cc: Michael Opdenacker <michael.opdenacker@free-electrons.com> Cc: Mikael Starvik <starvik@axis.com> Cc: Mike Snitzer <snitzer@redhat.com> Cc: Neil Brown <neilb@suse.de> Cc: Oleg Drokin <green@linuxhacker.ru> Cc: Peng Tao <bergwolf@gmail.com> Cc: Richard Weinberger <richard@nod.at> Cc: Robert Love <robert.w.love@intel.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Trond Myklebust <trond.myklebust@primarydata.com> Cc: Ursula Braun <ursula.braun@de.ibm.com> Cc: Zi Shen Lim <zlim.lnx@gmail.com> Cc: devel@driverdev.osuosl.org Cc: dm-devel@redhat.com Cc: dri-devel@lists.freedesktop.org Cc: fcoe-devel@open-fcoe.org Cc: jfs-discussion@lists.sourceforge.net Cc: linux390@de.ibm.com Cc: linux-afs@lists.infradead.org Cc: linux-cris-kernel@axis.com Cc: linux-kernel@vger.kernel.org Cc: linux-nfs@vger.kernel.org Cc: linux-parisc@vger.kernel.org Cc: linux-raid@vger.kernel.org Cc: linux-s390@vger.kernel.org Cc: linux-scsi@vger.kernel.org Cc: qla2xxx-upstream@qlogic.com Cc: user-mode-linux-devel@lists.sourceforge.net Cc: user-mode-linux-user@lists.sourceforge.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-09-19Merge branch 'pci/vga'; commit '6a73336bde29' into for-linusBjorn Helgaas1-9/+37
* pci/vga: vgaarb: Drop obsolete #ifndef vgaarb: Don't default exclusively to first video device with mem+io * commit '6a73336bde29': PCI: Remove "no hotplug settings from platform" warning
2014-09-19drm/radeon: Fix typo 'addr' -> 'entry' in rs400_gart_set_pageMichel Dänzer1-2/+2
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83996 Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-19Merge tag 'drm-intel-fixes-2014-09-18' of ↵Dave Airlie3-2/+11
git://anongit.freedesktop.org/drm-intel into drm-fixes couple of display fixes. * tag 'drm-intel-fixes-2014-09-18' of git://anongit.freedesktop.org/drm-intel: drm/i915: Add limited color range readout for HDMI/DP ports on g4x/vlv/chv drm/i915: Fix SRC_COPY width on 830/845g
2014-09-19Merge branch 'drm-fixes-3.17' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie12-57/+61
into drm-fixes - fix a resume hang on mullins - fix an oops on module unload with vgaswitcheroo (radeon and nouveau) - fix possible hangs DMA engine hangs due to hw bugs * 'drm-fixes-3.17' of git://people.freedesktop.org/~agd5f/linux: drm/nouveau/runpm: fix module unload drm/radeon/px: fix module unload vgaswitcheroo: add vga_switcheroo_fini_domain_pm_ops drm/radeon: don't reset dma on r6xx-evergreen init drm/radeon: don't reset sdma on CIK init drm/radeon: don't reset dma on NI/SI init drm/radeon/dpm: fix resume on mullins drm/radeon: Disable HDP flush before every CS again for < r600 drm/radeon: delete unused PTE_* defines
2014-09-19drm/nouveau/runpm: fix module unloadAlex Deucher1-0/+9
Use the new vga_switcheroo_fini_domain_pm_ops function to unregister the pm ops. Based on a patch from: Pali Rohár <pali.rohar@gmail.com> bug: https://bugzilla.kernel.org/show_bug.cgi?id=84431 Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Cc: Ben Skeggs <bskeggs@redhat.com>
2014-09-19drm/radeon/px: fix module unloadAlex Deucher1-2/+9
Use the new vga_switcheroo_fini_domain_pm_ops function to unregister the pm ops. Based on a patch from: Pali Rohár <pali.rohar@gmail.com> bug: https://bugzilla.kernel.org/show_bug.cgi?id=84431 Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com>
2014-09-19vgaswitcheroo: add vga_switcheroo_fini_domain_pm_opsAlex Deucher1-0/+6
Drivers should call this on unload to unregister pmops. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=84431 Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com>
2014-09-19drm/radeon: don't reset dma on r6xx-evergreen initAlex Deucher1-9/+0
Otherwise we may lose the DMA golden settings which can lead to hangs, etc. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-09-19drm/radeon: don't reset sdma on CIK initAlex Deucher1-7/+0
Otherwise we may lose the DMA golden settings which can lead to hangs, etc. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-09-19drm/radeon: don't reset dma on NI/SI initAlex Deucher1-6/+0
Otherwise we may lose the DMA golden settings which can lead to hangs, etc. bug: https://www.libreoffice.org/bugzilla/show_bug.cgi?id=83500 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-09-19drm/radeon/dpm: fix resume on mullinsAlex Deucher1-7/+21
Need to properly disable nb dpm on dpm disable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-09-19drm/radeon: Disable HDP flush before every CS again for < r600Michel Dänzer4-19/+16
It was causing display corruption with R300 generation GPUs at least. Reported-and-Tested-by: Mikael Pettersson <mikpelinux@gmail.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-19drm/radeon: delete unused PTE_* definesKyle McMartin1-7/+0
They don't appear to be used anywhere... elsewhere uses R*_PTE_*. master@linux:U:.% git grep PTE_ -- drivers/gpu/drm/radeon | grep -v _PTE_ master@linux:U:.% (kyle@redacted:~/linux) ./arch/arm64/include/asm/pgtable.h:27:0: note: this is the location of the previous definition #define PTE_VALID (_AT(pteval_t, 1) << 0) ^ In file included from drivers/gpu/drm/radeon/r600_cs.c:31:0: drivers/gpu/drm/radeon/r600d.h:48:0: warning: "PTE_VALID" redefined [enabled by default] #define PTE_VALID (1 << 0) ^ In file included from ./arch/arm64/include/asm/io.h:29:0, from include/linux/clocksource.h:19, from include/clocksource/arm_arch_timer.h:19, from ./arch/arm64/include/asm/arch_timer.h:27, from ./arch/arm64/include/asm/timex.h:19, from include/linux/timex.h:65, <snip> from include/drm/drmP.h:51, from drivers/gpu/drm/radeon/r600_cs.c:29: ./arch/arm64/include/asm/pgtable.h:27:0: note: this is the location of the previous definition #define PTE_VALID (_AT(pteval_t, 1) << 0) ^ Signed-off-by: Kyle McMartin <kyle@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-19drm/radeon: fix AGP userptr handlingChristian König1-7/+14
AGP mappings are not cache coherent, so userptr support won't work. Additional to that the AGP implementation uses a different ttm_tt container structure so we run into problems if we cast the pointer without checking if it's the right type. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-18Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-nextDave Airlie30-146/+376
Commit "drm/rcar-du: Use struct videomode in platform data" touches board code in arch/arm/mach-shmobile. There is, to the best of my knowledge, no risk of conflict for v3.18. Simon, are you fine with getting those changes merged through Dave's tree (and could you confirm that no conflict should occur) ? Simon acked the merge: Acked-by: Simon Horman <horms+renesas@verge.net.au> * 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev: drm/rcar-du: Add OF support drm/rcar-du: Use struct videomode in platform data video: Add DT bindings for the R-Car Display Unit video: Add THC63LVDM83D DT bindings documentation video: Add ADV7123 DT bindings documentation video: Add DT binding documentation for VGA connector devicetree: Add vendor prefix "thine" to vendor-prefixes.txt devicetree: Add vendor prefix "mitsubishi" to vendor-prefixes.txt drm/shmob: Update copyright notice drm/rcar-du: Update copyright notice
2014-09-18drm/i915: Add limited color range readout for HDMI/DP ports on g4x/vlv/chvVille Syrjälä2-1/+10
The limited color range knob is in the port registers on g4x and vlv/chv for HDMI, and on g4x for DP. Add the relevant code to read out the hardware state into pipe config. On vlv/chv the DP port limited color range knob is in PIPECONF for which we already have readout code. Cc: Chris Clayton <chris2553@googlemail.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Chris Clayton <chris2553@googlemail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-09-17drm/ttm: make sure format string cannot leak inKees Cook1-1/+2
While zone->name is currently hard coded, the call to kobject_init_and_add() should follow the more defensive argument list usage (as already done in other places in ttm_memory.c) where "%s" is used instead of directly passing in a variable as a format string. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-17drm: sti: do not iterate over the info frame arrayBenjamin Gaignard1-1/+0
avi infoframe is a 13 bytes array, do not read after this limite. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-17drm/tilcdc: panel: Add support for enable GPIOEzequiel Garcia1-5/+32
In order to support the "enable GPIO" available in many panel devices, this commit adds a proper devicetree binding. By providing an enable GPIO in the devicetree, the driver can now turn off and on the panel device, and/or the backlight device. Both the backlight and the GPIO are optional properties. Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Johannes Pointner <johannes.pointner@br-automation.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-17drm/tilcdc: panel: Set return value explicitlyEzequiel Garcia1-1/+3
Instead of setting an initial value for the return code, set it explicitly on each error path. This is just a cosmetic cleanup, as preparation for the enable GPIO support. Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Johannes Pointner <johannes.pointner@br-automation.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-17drm/tilcdc: panel: Fix backlight devicetree supportEzequiel Garcia1-5/+18
The current backlight support is broken; the driver expects a backlight-class in the panel devicetree node. Fix this by implementing it properly, getting an optional backlight from a phandle. This shouldn't cause any backward-compatibility DT issue because the current implementation doesn't work and is not even documented. Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Johannes Pointner <johannes.pointner@br-automation.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-17drm/tilcdc: panel: Use devm_kzalloc to simplify the error pathEzequiel Garcia1-3/+1
Using the managed variant to allocate the resource makes the code simpler and less error-prone. Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Johannes Pointner <johannes.pointner@br-automation.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-17drm/tilcdc: panel: Spurious whitespace removalEzequiel Garcia1-1/+0
Just a cosmetic cleanup. Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Johannes Pointner <johannes.pointner@br-automation.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Dave Airlie <airlied@redhat.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-11-02 19:24:56 +0300