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path: root/drivers/gpu/drm
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2015-11-03drm/nouveau/timer: re-introduce nvkm_wait_xsec macrosAlexandre Courbot1-0/+10
Reintroduce macros allowing us to test a register against a certain mask, since this is the most common usage pattern for the more generic nvkm_xsec macros and makes the code more concise and readable. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03drm/nouveau/pmu: do not assume a PMU is presentAlexandre Courbot1-1/+1
Some devices may not have a PMU. Avoid a NULL pointer dereference in such cases by checking whether the pointer given to nvkm_pmu_pgob() is valid. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03drm/nouveau/gem: return only valid domain when there's only oneIlia Mirkin1-2/+3
On nv50+, we restrict the valid domains to just the one where the buffer was originally created. However after the buffer is evicted to system memory, we might move it back to a different domain that was not originally valid. When sharing the buffer and retrieving its GEM_INFO data, we still want the domain that will be valid for this buffer in a pushbuf, not the one where it currently happens to be. This resolves fdo#92504 and several others. These are due to suspend evicting all buffers, making it more likely that they temporarily end up in the wrong place. Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92504 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03drm/exynos/gem: remove DMA-mapping hacks used for constructing page arrayMarek Szyprowski1-25/+33
Exynos GEM objects contains an array of pointers to the pages, which the allocated buffer consists of. Till now the code used some hacks (like relying on DMA-mapping internal structures or using ARM-specific dma_to_pfn helper) to build this array. This patch fixes this by adding proper call to dma_get_sgtable_attrs() and using the acquired scatter-list to construct needed array. This approach is more portable (work also for ARM64) and finally fixes the layering violation that was present in this code. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos: simplify Kconfig component namesAndrzej Hajda1-15/+15
Many Exynos DRM sub-options mentions Exynos DRM in their titles. It is redundant and can be safely shortened. The patch additionally makes some entries more descriptive. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos: re-arrange Kconfig entriesAndrzej Hajda1-16/+22
Exynos DRM driver have quite big number of components and options. The patch re-arranges them into three logical groups: - CRTCs, - Encoders and Bridges, - Sub-drivers. It should make driver options more clear. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos: abstract out common dependencyAndrzej Hajda1-13/+14
All options depends on DRM_EXYNOS so it can be moved to enclosing if clause. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos: separate Mixer and HDMI driversAndrzej Hajda3-3/+12
Latest Exynos SoCs does not have Mixer IP, but they still have HDMI IP. Their drivers should be configurable separately. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/mixer: replace direct cross-driver call with drm mode validationAndrzej Hajda3-27/+4
HDMI driver called directly function from MIXER driver to invalidate modes not supported by MIXER. The patch replaces the hack with proper .atomic_check callback. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos: add atomic_check callback to exynos_crtcAndrzej Hajda2-0/+15
Some CRTCs needs mode validation, this patch adds neccessary callback to Exynos DRM framework. It is called from DRM core via atomic_check helper for drm_crtc. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/decon5433: add support for DECON-TVAndrzej Hajda1-61/+93
DECON-TV IP is responsible for generating video stream which is transferred to HDMI IP. It is almost fully compatible with DECON IP. The patch is based on initial work of Hyungwon Hwang. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/decon5433: remove duplicated initializationAndrzej Hajda1-1/+0
Field .commit is already initialized few lines above. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/decon5433: merge different flag fieldsAndrzej Hajda1-31/+30
Driver uses four different fields for internal flags. They can be merged into one. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/decon5433: add function to set particular register bitsAndrzej Hajda1-50/+19
The driver often sets only particular bits of configuration registers. Using separate function to such action simplifies the code. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/decon5433: fix timing registers writesAndrzej Hajda1-9/+9
All timing registers should contain values decreased by one. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-03drm/exynos/decon5433: add PCLK clockAndrzej Hajda1-10/+11
PCLK clock is used by DECON IP. The patch also replaces magic number with number of clocks in array definition. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-11-02drm/amdgpu: Make amdgpu_mn functions inlineHarry Wentland1-2/+2
Unused amdgpu_mn functions threw warnings for every file that includes amdgpu.h. It makes sense to inline this amdgpu_mn stubs to avoid the warning. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2015-11-02drm/i915: add quirk to enable backlight on Dell Chromebook 11 (2015)Jani Nikula1-0/+3
Reported-by: Keith Webb <khwebb@gmail.com> Suggested-by: Keith Webb <khwebb@gmail.com> Cc: stable@vger.kernel.org Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=106671 Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446209424-28801-1-git-send-email-jani.nikula@intel.com
2015-11-02drm/vmwgfx: Replace iowrite/ioread with volatile memory accessesThomas Hellstrom7-105/+118
Now that we use memremap instead of ioremap, Use WRITE_ONCE / READ_ONCE instead of iowrite / ioread. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2015-11-02drm/vmwgfx: Turn off support for multisample count != 0 v2Thomas Hellstrom2-2/+22
Do this until we know how much MOB memory to allocate for these surfaces. v2: Mask also non-DX multisample. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2015-11-02drm/vmwgfx: switch from ioremap_cache to memremapDan Williams1-4/+10
Per commit 2e586a7e017a "drm/vmwgfx: Map the fifo as cached" the driver expects the fifo registers to be cacheable. In preparation for deprecating ioremap_cache() convert its usage in vmwgfx to memremap(). Cc: David Airlie <airlied@linux.ie> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Sinclair Yeh <syeh@vmware.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2015-11-02drm/i915/skl: Prevent unclaimed register writes on skylake.Maarten Lankhorst1-0/+5
I'm getting unclaimed register writes when checking the WM registers after the crtc is disabled. So I would imagine those are guarded by the crtc power well. Fix this by not reading out wm state when the power well is off. Cc: stable@vger.kernel.org # v4.3 Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181 Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-10-31drm: Correct arguments to list_tail_add in create blob ioctlManeet Singh1-1/+1
Arguments passed to list_add_tail were reversed resulting in deletion of old blob property everytime the new one is added. Fixes commit e2f5d2ea479b9b2619965d43db70939589afe43a Author: Daniel Stone <daniels@collabora.com> Date: Fri May 22 13:34:51 2015 +0100 drm/mode: Add user blob-creation ioctl Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com> [seanpaul tweaked commit subject a little] Signed-off-by: Sean Paul <seanpaul@chromium.org> Cc: stable@kernel.org # v4.2 Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
2015-10-31drm: crtc: integer overflow in drm_property_create_blob()Dan Carpenter1-1/+1
The size here comes from the user via the ioctl, it is a number between 1-u32max so the addition here could overflow on 32 bit systems. Fixes: f453ba046074 ('DRM: add mode setting support') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Cc: stable@kernel.org # v4.2 Signed-off-by: Dave Airlie <airlied@gmail.com>
2015-10-30drm/tegra: dc: Request/free syncpoint at init/exitThierry Reding1-7/+7
syncpoints are resources provided by host1x and their lifetime is tied to the host1x device. They are not properly reference counted either, so removing the host1x device before any of its clients causes a use-after- free error. Adding proper reference counting would be a major enterprise so work around it for now by requesting and freeing the syncpoint at init and exit time, respectively. The host1x device is guaranteed to be around at this point. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-30drm/bridge: ptn3460: Fix coccinelle warningskbuild test robot1-1/+0
The platform_no_drv_owner.cocci coccinelle script generates the following warning: drivers/gpu/drm/bridge/nxp-ptn3460.c:403:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically. Patch generated by scripts/coccinelle/api/platform_no_drv_owner.cocci. Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-30drm/bridge: ps8622: Fix coccinelle warningskbuild test robot1-1/+0
The platform_no_drv_owner.cocci coccinelle script generates the following warning: drivers/gpu/drm/bridge/parade-ps8622.c:671:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically. Patch generated by scripts/coccinelle/api/platform_no_drv_owner.cocci. Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-30drm/imx: hdmi: fix HDMI setup to allow modes larger than FullHDLucas Stach1-4/+12
This worked before the dw-hdmi bridge code was changed to validate the setup data more strictly. Add back support for modes with a pixel clock up to 216MHz. Even higher clocks should work, but we are missing the required setup data for now. Also change the mode validate callbacks to disallow modes with higher pixelclocks, so we don't end up failing the modeset later on. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30drm/imx: enable ARGB4444 16-bit color formatLucas Stach1-0/+2
This patch allows to use the ARGB4444 color format on planes. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30drm/imx: ipuv3-plane: enable support for RGBX8888 and RGBA8888 pixel formatsPhilipp Zabel1-0/+6
This patch allows to use the RGBX and RGBA 8:8:8:8 formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30drm/imx: enable 15-bit RGB with 1-bit alpha formatsPhilipp Zabel1-0/+8
This patch enables the ARGB1555, ABGR1555, RGBA5551, and BGRA5551 formats to be used on planes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-10-30drm/tegra: fb: Remove gratuituous blank lineThierry Reding1-1/+0
This was introduced by mistake in commit 0f7d9052fb70 ("drm/tegra: Use new drm_fb_helper functions"). Remove it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-30drm/amdgpu: remove amdgpu_fence_ref/unrefChristian König4-35/+4
Just move the remaining users to fence_put/get. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30drm/amdgpu: use common fence for syncChristian König2-11/+12
Stop using the driver internal functions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30drm/amdgpu: use the new fence_is_laterChristian König1-17/+13
Instead of coding the check ourself. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30drm/amdgpu: use common fences for VMID management v2Christian König4-18/+21
v2: add missing NULL check. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30drm/amdgpu: move ring_from_fence to common codeChristian König3-21/+27
Going to need that elsewhere as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30drm/amdgpu: switch to common fence_wait_any_timeout v2Christian König3-109/+13
No need to duplicate the functionality any more. v2: fix handling if no fence is available. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
2015-10-30drm/amdgpu: remove unneeded fence functionsChristian König1-12/+1
amdgpu_fence_default_wait isn't needed any more the default wait does the same thing and amdgpu_test_signaled is dead as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30Merge tag 'topic/drm-misc-2015-10-22' of ↵Dave Airlie9-180/+200
git://anongit.freedesktop.org/drm-intel into drm-next Few more drm-misc stragglers for 4.4. Big thing is the generic probe for imx/rockchip/armada (but the variant for msm/rpi/exynos is still missing). Also the hdmi clocking fixes from Ville which was a lot of confusion about which tree it should be applied to ;-) * tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel: drm: correctly check failed allocation vga_switcheroo: Constify vga_switcheroo_handler drm/armada: Convert the probe function to the generic drm_of_component_probe() drm/rockchip: Convert the probe function to the generic drm_of_component_probe() drm/imx: Convert the probe function to the generic drm_of_component_probe() drm: Introduce generic probe function for component based masters. drm/edid: Round to closest when computing the CEA/HDMI alternate clock drm/edid: Fix up clock for CEA/HDMI modes specified via detailed timings
2015-10-30Merge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie36-351/+616
into drm-next More amdgpu and radeon stuff for drm-next. Stoney support is the big change. The rest is just bug fixes and code cleanups. The Stoney stuff is pretty low impact with respect to existing chips. * 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: change VM size default to 64GB drm/amdgpu: add Stoney pci ids drm/amdgpu: update the core VI support for Stoney drm/amdgpu: add VCE support for Stoney (v2) drm/amdgpu: add UVD support for Stoney drm/amdgpu: add GFX support for Stoney (v2) drm/amdgpu: add SDMA support for Stoney (v2) drm/amdgpu: add DCE support for Stoney drm/amdgpu: Update SMC/DPM for Stoney drm/amdgpu: add GMC support for Stoney drm/amdgpu: add Stoney chip family drm/amdgpu: fix the broken vm->mutex V2 drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any() drm/amdgpu: remove the exclusive lock drm/amdgpu: remove old lockup detection infrastructure drm: fix trivial typos drm/amdgpu/dce: simplify suspend/resume drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet drm/radeon: Use rdev->gem.mutex to protect hyperz/cmask owners
2015-10-30Merge tag 'drm-intel-next-fixes-2015-10-22' of ↵Dave Airlie24-639/+791
git://anongit.freedesktop.org/drm-intel into drm-next Bunch of -fixes for 4.4. Well not just, I've left the mmio/register work from Ville in here since it's low-risk but lots of churn all over. * tag 'drm-intel-next-fixes-2015-10-22' of git://anongit.freedesktop.org/drm-intel: (23 commits) drm/i915: Use round to closest when computing the CEA 1.001 pixel clocks drm/i915: Kill the leftover RMW from ivb_sprite_disable() drm/i915: restore ggtt double-bind avoidance drm/i915/skl: Enable pipe gamma for sprite planes. drm/i915/skl+: Enable pipe CSC on cursor planes. (v2) MAINTAINERS: add link to the Intel Graphics for Linux web site drm/i915: Move skl/bxt gt specific workarounds to ring init drm/i915: Drop i915_gem_obj_is_pinned() from set-cache-level drm/i915: revert a few more watermark commits drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE drm/i915: Clean up LVDS register handling drm/i915: Throw out some useless variables drm/i915: Parametrize and fix SWF registers drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc. drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function drm/i915: Fix a few bad hex numbers in register defines drm/i915: Protect register macro arguments drm/i915: Include gpio_mmio_base in GMBUS reg defines drm/i915: Parametrize HSW video DIP data registers drm/i915: Eliminate weird parameter inversion from BXT PPS registers ...
2015-10-29drm/radeon: fix dpms when driver backlight control is disabledAlex Deucher1-4/+14
If driver backlight control is disabled, either by driver parameter or default per-asic setting, revert to the old behavior. Fixes a regression in commit: 4281f46ef839050d2ef60348f661eb463c21cc2e Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-10-29drm/radeon: move bl encoder assignment into bl initAlex Deucher3-1/+2
So that the bl encoder will be null if the GPU does not control the backlight. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-10-29drm/amdgpu: ignore scheduler fences from the same entityChristian König1-0/+6
We are going to submit them before the job anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-10-28drm/amdgpu: add GFX 8.1 register headersAlex Deucher3-0/+30967
Minor differences compared to GFX 8.0 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-28drm/i915: disable CPU PWM also on LPT/SPT backlight disableJani Nikula1-0/+14
Although we don't support or enable CPU PWM with LPT/SPT based systems, it may have been enabled prior to loading the driver. Disable the CPU PWM on LPT/SPT backlight disable to avoid warnings on LCPLL disable. The issue has been present on BDW since BDW enabling, but was recently introduced on HSW with commit 437b15b8017e0d946453c10794b0c5d4591cf180 Author: Jani Nikula <jani.nikula@intel.com> Date: Fri Sep 4 16:55:13 2015 +0300 drm/i915: use pch backlight override on hsw too Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reference: http://mid.gmane.org/87y4frhwsn.fsf@yhuang-dev.intel.com Reported-by: kernel test robot <ying.huang@intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446033429-8006-1-git-send-email-jani.nikula@intel.com
2015-10-28drm/amdgpu: add some additional CZ revisionsAlex Deucher1-0/+7
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-10-28spi: Drop owner assignment from spi_driversAndrew F. Davis2-2/+0
An spi_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-27drm/i915: Fix maxfifo watermark calc on vlv cursor planesThomas Daniel1-1/+1
A typo resulted in the watermarks for cursor planes not being calculated correctly. Fixed the typo. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-03 16:35:29 +0300