summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/tegra/dsi.c
AgeCommit message (Expand)AuthorFilesLines
2017-08-21Merge tag 'drm/tegra/for-4.14-rc1' of git://anongit.freedesktop.org/tegra/lin...Dave Airlie1-4/+10
2017-08-17drm/tegra: dsi: Trace register accessesThierry Reding1-1/+7
2017-08-17drm/tegra: dsi: Use unsigned int for register offsetsThierry Reding1-4/+4
2017-08-08drm: Nuke drm_atomic_helper_connector_dpmsDaniel Vetter1-1/+0
2016-08-24drm/tegra: dsi: Enhance runtime power managementThierry Reding1-7/+36
2016-07-16Merge tag 'drm/tegra/for-4.8-rc1' of git://anongit.freedesktop.org/tegra/linu...Dave Airlie1-106/+141
2016-07-14drm/tegra: dsi: Prepare for generic PM domain supportJon Hunter1-11/+17
2016-07-04drm/tegra: dsi: Implement runtime PMThierry Reding1-103/+132
2016-06-10drm: tegra: Rely on the default ->best_encoder() behaviorBoris Brezillon1-1/+0
2016-05-18drm/tegra: Fix crash caused by reference count imbalanceJon Hunter1-4/+11
2016-01-05drm/tegra: Use __drm_atomic_helper_reset_connector for subclassing connector ...Maarten Lankhorst1-7/+6
2015-12-11drm: Pass 'name' to drm_encoder_init()Ville Syrjälä1-1/+1
2015-08-13drm/tegra: dsi: Restore DPMSThierry Reding1-59/+51
2015-08-13drm/tegra: dsi: Add Tegra210 supportThierry Reding1-0/+5
2015-08-13drm/tegra: dsi: Add Tegra132 supportThierry Reding1-0/+1
2015-08-13drm/tegra: dsi: Add Tegra124 supportThierry Reding1-0/+1
2015-08-13drm/tegra: dsi: Use proper back-porch for non-sync video modeThierry Reding1-2/+7
2015-01-27drm/tegra: dc: Unify enabling the display controllerThierry Reding1-10/+0
2015-01-27drm/tegra: Remove unused ->mode_fixup() callbacksThierry Reding1-87/+0
2015-01-27drm/tegra: dsi: Implement ->atomic_check()Thierry Reding1-73/+196
2015-01-27drm/tegra: Atomic conversion, phase 2Thierry Reding1-0/+2
2015-01-27drm/tegra: Atomic conversion, phase 1Thierry Reding1-0/+2
2015-01-27drm/tegra: Output cleanup functions cannot failThierry Reding1-5/+1
2015-01-27drm/tegra: Remove remnants of the output midlayerThierry Reding1-4/+8
2015-01-27drm/tegra: debugfs cleanup cannot failThierry Reding1-9/+3
2015-01-27drm/tegra: dsi: DemidlayerThierry Reding1-163/+195
2015-01-27drm/tegra: Stop CRTC at CRTC disable timeThierry Reding1-4/+0
2015-01-27drm/tegra: Use tegra_commit_dc() in output driversThierry Reding1-4/+2
2015-01-27drm/tegra: dsi: Reset across ->exit()/->init()Thierry Reding1-13/+14
2015-01-27drm/tegra: dsi: Soft-reset controller on ->disableThierry Reding1-0/+25
2015-01-27drm/tegra: dsi: Registers are 32-bitThierry Reding1-7/+7
2014-11-13drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlierSean Paul1-4/+7
2014-11-13drm/tegra: dsi: Replace 1000000 by USEC_PER_SECThierry Reding1-1/+1
2014-11-13drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SECThierry Reding1-1/+1
2014-11-13drm/tegra: dsi: Implement host transfersThierry Reding1-0/+267
2014-11-13drm/tegra: dsi: Add ganged mode supportThierry Reding1-29/+192
2014-11-13drm/tegra: dsi: Split out tegra_dsi_set_timeout()Thierry Reding1-15/+23
2014-11-13drm/tegra: dsi: Add command mode supportThierry Reding1-19/+63
2014-11-13drm/tegra: dsi: Refactor in preparation for command modeThierry Reding1-19/+81
2014-11-13drm/tegra: dsi: Properly cleanup on probe failureThierry Reding1-15/+37
2014-11-13drm/tegra: dsi: Mark connector hotpluggableThierry Reding1-2/+4
2014-11-13drm/tegra: dsi: Leave parent clock aloneThierry Reding1-7/+0
2014-11-13drm/tegra: dsi: Do not manage clock on enable/disableThierry Reding1-15/+14
2014-11-13drm/tegra: dsi: Make FIFO depths host parametersThierry Reding1-4/+6
2014-08-04drm/tegra: add MODULE_DEVICE_TABLEsStephen Warren1-0/+1
2014-08-04drm/tegra: dsi - Handle non-continuous clock flagAlexandre Courbot1-1/+2
2014-06-06drm/tegra: Remove host1x drm_bus implementationThierry Reding1-3/+3
2014-06-06drm/tegra: dsi - Do not needlessly recompute pclkThierry Reding1-1/+0
2014-06-06drm/tegra: dc - Compute shift clock divider in output driversThierry Reding1-12/+31
2014-06-06drm/tegra: dsi - Reset controller on driver unloadThierry Reding1-0/+1
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-23 19:46:40 +0300