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path: root/drivers/gpu/drm/radeon/rs780_dpm.c
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2013-09-16drm/radeon/dpm/rs780: fix force_performance state for same sclksAlex Deucher1-2/+4
If the low and high sclks within a power state are the same, there no need to enable sclk scaling. Enabling sclk scaling can cause display stability issues on some boards. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-16drm/radeon/dpm/rs780: don't enable sclk scaling if not requiredAlex Deucher1-0/+3
If the low and high sclks are the same, there is no need to enable sclk scaling. This causes display stability issues on certain boards. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=60857 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-16drm/radeon/dpm/rs780: add some sanity checking to sclk scalingAlex Deucher1-0/+6
Since the clock scaling is based on fb divider adjustments, make sure the other pll parameters are the same. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-16drm/radeon/dpm/rs780: use drm_mode_vrefresh()Alex Deucher1-3/+1
Rather than open coding it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-11drm/radeon/dpm: fix fallback for empty UVD clocksAlex Deucher1-3/+7
Some older 6xx-7xx boards didn't always fill in the UVD clocks properly in the UVD power states. This leads to the driver trying to set a 0 clock which results in slow or broken UVD playback. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=69120 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-09-11drm/radeon/dpm: implement force performance levels for rs780 (v2)Anthoine Bourgeois1-15/+74
Allows you to limit the selected power levels via sysfs. Force the feedback divider to select a power level. v2: fix checking in rs780_force_fbdiv, drop a duplicate divider structure in rs780_dpm_force_performance_level, Force the voltage level too. Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-18drm/radeon/dpm: add debugfs support for RS780/RS880 (v3)Alex Deucher1-0/+25
This allows you to look at the current DPM state via debugfs. Due to the way the hardware works on these asics, there's no way to look up exactly what power state we are in, so we make the best guess we can based on the current sclk. v2: Anthoine's version v3: fix ref div Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon/dpm: add support for setting UVD clock on rs780Alex Deucher1-0/+38
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon/dpm/rs780: properly catch errors in dpm setupAlex Deucher1-4/+11
We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28drm/radeon/dpm/rs780: restructure codeAlex Deucher1-20/+32
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/kms: add dpm support for rv6xx (v3)Alex Deucher1-0/+12
This adds dpm support for rv6xx asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching Set radeon.dpm=1 to enable. v2: remove duplicate line v3: fix thermal interrupt check noticed by Jerome Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-06-27drm/radeon/kms: add dpm support for rs780/rs880Alex Deucher1-0/+894
This adds dpm support for rs780/rs880 asics. This includes: - clockgating - dynamic engine clock scaling - dynamic voltage scaling set radeon.dpm=1 to enable it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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