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path: root/drivers/gpu/drm/i915/intel_pm.c
AgeCommit message (Expand)AuthorFilesLines
2014-08-08drm/i915: Introduce FBC False Color for debug purposes.Rodrigo Vivi1-0/+3
2014-08-08drm/i915: Split a few long debug printsVille Syrjälä1-2/+4
2014-08-08drm/i915: Add chv port D TX wellsVille Syrjälä1-0/+23
2014-08-08drm/i915: Add chv port B and C TX wellsVille Syrjälä1-0/+30
2014-08-08drm/i915: Add per-pipe power wells for chvVille Syrjälä1-0/+126
2014-08-08drm/i915: Add disp2d power well for chvVille Syrjälä1-0/+8
2014-08-08drm/i915: Add chv cmnlane power wellsVille Syrjälä1-0/+89
2014-08-08drm/i915: Add chv_power_wells[]Ville Syrjälä1-0/+11
2014-08-08Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-218/+679
2014-08-07drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL valuesVille Syrjälä1-5/+4
2014-08-07drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang1-6/+6
2014-08-07drm/i915: Tune down MCH_SSKPD values warningDaniel Vetter1-5/+3
2014-08-07drm/i915: Tune done rc6 enabling outputDaniel Vetter1-6/+6
2014-07-24drm: i915: Use nsec based interfacesThomas Gleixner1-7/+5
2014-07-23drm/i915: add helper for checking whether IRQs are enabledJesse Barnes1-3/+3
2014-07-23drm/i915: extract and improve gen8_irq_power_well_post_enablePaulo Zanoni1-16/+2
2014-07-23drm/i915: Use genX_ prefix for gt irq enable/disable functionsDaniel Vetter1-2/+2
2014-07-23drm/i915: Also give the sprite width for WM computationDamien Lespiau1-6/+11
2014-07-23drm/i915/chv: Drop WaGsvBringDownFreqInRc6Deepak S1-1/+3
2014-07-23drm/i915: Force GPU Freq to lowest while suspending.Deepak S1-0/+3
2014-07-12drm/i915: byt_gpu_freq() can be staticFengguang Wu1-4/+4
2014-07-11drm/i915: Add RP1 render P state thresholds in CHVDeepak S1-0/+15
2014-07-11drm/i915/chv: Add basic PM interrupt support for CHVDeepak S1-0/+4
2014-07-11drm/i915: CHV GPU frequency to opcode functionsDeepak S1-2/+76
2014-07-11drm/i915: populate mem_freq/cz_clock for chvDeepak S1-0/+29
2014-07-11drm/i915: Read guaranteed freq for valleyviewDeepak S1-0/+16
2014-07-11drm/i915: Use the cached min/min/rpe values in the vlv debugfs codeVille Syrjälä1-4/+4
2014-07-11drm/i915: Make the RPS interrupt generation mask handle the vlv waChris Wilson1-5/+5
2014-07-11drm/i915: add POWER_DOMAIN_PLLSPaulo Zanoni1-0/+1
2014-07-09drm/i915: Make use of intel_fb_obj() (v2)Matt Roper1-15/+9
2014-07-08drm/i915/vlv: WA for Turbo and RC6 to work together.Deepak S1-3/+9
2014-07-07drm/i915/bdw: 3D_CHICKEN3 has write mask bitsMichel Thierry1-1/+1
2014-07-07drm/i915: gmch: set SR WMs to valid values before enabling themImre Deak1-3/+18
2014-07-07drm/i915: gmch: factor out intel_set_memory_cxsrImre Deak1-38/+38
2014-07-07drm/i915: Move VLV cmnlane workaround to intel_power_domains_init_hw()Ville Syrjälä1-10/+57
2014-07-07drm/i915: Pull the cmnlane tricks into its own power well opsVille Syrjälä1-37/+55
2014-07-07drm/i915: Kill duplicated cdclk readout code from i2cVille Syrjälä1-4/+0
2014-07-07drm/i915: Move vlv cdclk code to .get_display_clock_speed()Ville Syrjälä1-1/+1
2014-07-07drm/i915: Change vlv cdclk to use kHz unitsVille Syrjälä1-1/+1
2014-07-07Merge tag 'v3.16-rc4' into drm-intel-next-queuedDaniel Vetter1-30/+53
2014-07-06Merge tag 'drm-intel-fixes-2014-07-03' of git://anongit.freedesktop.org/drm-i...Dave Airlie1-0/+8
2014-07-04Merge tag 'sound-3.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/t...Linus Torvalds1-0/+21
2014-07-04drm/i915: provide interface for audio driver to query cdclkJani Nikula1-0/+21
2014-07-03drm/i915: Try harder to get FBCBen Widawsky1-3/+27
2014-07-02drm/i915/bdw: Use timeout mode for RC6 on bdwTom O'Rourke1-4/+12
2014-07-01drm/i915: Drop early VLV WA to fix Voltage not getting dropped to VminDeepak S1-0/+8
2014-06-23drm/i915: cache hw power well enabled stateImre Deak1-22/+15
2014-06-20Merge tag 'sound-3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/t...Linus Torvalds1-6/+8
2014-06-19drm/i915: use runtime irq suspend/resume in freeze/thawJesse Barnes1-2/+2
2014-06-18Merge branch 'topic/soix' into drm-intel-next-queuedDaniel Vetter1-3/+21
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