summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_sysfs.c
AgeCommit message (Expand)AuthorFilesLines
2014-10-24drm/i915: Do not export RC6p and RC6pp if they don't existRodrigo Vivi1-3/+19
2014-09-03drm/i915: Differentiate between LLC or snooped for the userChris Wilson1-1/+1
2014-07-12drm/i915/chv: calculate rc6 residency correctlyMika Kuoppala1-8/+31
2014-07-11drm/i915: Add RP0/RP1/RPn render P state thresholds in VLV sysfsDeepak S1-3/+15
2014-05-23drm/i915: s/i915_hw_context/intel_contextOscar Mateo1-1/+1
2014-05-05drm/i915: get a runtime PM ref for debugfs entries where neededImre Deak1-0/+4
2014-03-20drm/i915: remove rps local variablesBen Widawsky1-24/+12
2014-03-20drm/i915: Remove extraneous MMIO for RPSBen Widawsky1-12/+9
2014-03-20drm/i915: Rename and comment all the RPS *stuff*Ben Widawsky1-16/+16
2014-03-20drm/i915: Fix coding style for RPSBen Widawsky1-10/+10
2014-02-07drm/i915: Update rps interrupt limitsJeff McGee1-0/+10
2013-12-11drm/i915: add some runtime PM get/put callsPaulo Zanoni1-2/+12
2013-11-15Merge branch 'backlight-rework' into drm-intel-next-queuedDaniel Vetter1-27/+29
2013-11-07drm/i915: Initialise min/max frequencies before updating RPS registersChris Wilson1-8/+8
2013-11-07drm/i915: Require HW contexts (when possible)Ben Widawsky1-3/+3
2013-11-06drm/i915: Pass dev_priv to vlv_gpu_freq() and vlv_freq_opcode()Ville Syrjälä1-7/+6
2013-10-25Merge tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet...Dave Airlie1-0/+10
2013-10-22drm/sysfs: sort out minor and connector device object lifetimes.Dave Airlie1-14/+14
2013-10-15drm/i915: abstract the conversion of device->minor out to a macroDave Airlie1-15/+17
2013-10-10drm/i915: Finish enabling rps before use by sysfs or debugfsTom O'Rourke1-0/+10
2013-10-01drm/i915/vlv: use correct units for rc6 residency v2Jesse Barnes1-2/+20
2013-09-21drm/i915: cleanup a min_t() castDan Carpenter1-1/+1
2013-09-20drm/i915/vlv: disable rc6p and rc6pp residency reporting on BYTJesse Barnes1-0/+4
2013-09-19drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPFBen Widawsky1-2/+2
2013-09-19drm/i915: Do remaps for all contextsBen Widawsky1-23/+14
2013-09-19drm/i915: Make l3 remapping use the ringBen Widawsky1-1/+2
2013-09-19drm/i915: Add second slice l3 remappingBen Widawsky1-7/+27
2013-09-19drm/i915: Fix HSW parity testBen Widawsky1-1/+13
2013-09-13drm/i915: Fix l3 parity user buffer offsetBen Widawsky1-6/+6
2013-09-13drm/i915: Round l3 parity reads downBen Widawsky1-0/+2
2013-09-03drm/i915: Adjust available RPS information through sysfs for vlvChris Wilson1-5/+31
2013-07-01drm/i915: add error_state sysfs entryMika Kuoppala1-0/+71
2013-05-24drm/i915: change VLV IOSF sideband accessors to not return error codeJani Nikula1-1/+1
2013-05-24drm/i915: rename VLV IOSF sideband functions logicallyJani Nikula1-1/+1
2013-05-10drm/i915: read current freq from Punit on VLVJesse Barnes1-3/+6
2013-04-18drm/i915: turbo & RC6 support for VLV v7Jesse Barnes1-19/+52
2013-04-18drm/i915: Return stored value from max freq sysfs entryMika Kuoppala1-1/+1
2013-04-18drm/i915: Better overclock supportBen Widawsky1-4/+9
2013-02-20drm/i915: add \n to the end of sysfs attributesJani Nikula1-8/+8
2012-12-05drm/i915: fixup l3 parity sysfs access checkDaniel Vetter1-1/+1
2012-11-12drm/i915: protect RPS/RC6 related accesses (including PCU) with a new mutexJesse Barnes1-25/+12
2012-11-12drm/i915: extract l3_parity substruct from dev_privDaniel Vetter1-3/+3
2012-09-20drm/i915: Fix !CONFIG_PM sysfs for real this timeBen Widawsky1-0/+2
2012-09-20drm/i915: Show render P state thresholds in sysfsBen Widawsky1-0/+36
2012-09-20drm/i915: Add setters for min/max frequencyBen Widawsky1-2/+81
2012-09-20drm/i915: Add current/max/min GPU freq to sysfsBen Widawsky1-0/+70
2012-09-20drm/i915: variable renamesBen Widawsky1-8/+8
2012-09-06drm/i915: Enable some sysfs stuff without CONFIG_PMBen Widawsky1-12/+3
2012-08-17Merge tag 'v3.6-rc2' into drm-intel-nextDaniel Vetter1-0/+12
2012-08-06drm/i915: make rc6 in sysfs functions conditionalHunt Xu1-0/+12
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-01 15:32:02 +0300