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path: root/drivers/gpu/drm/amd/amdgpu/soc15.c
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2017-03-30drm/amdgpu/soc15: bypass pp block for vfXiangliang Yu1-2/+3
Disable pp block if device is vf. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu/soc15: drop support for reading some registersAlex Deucher1-3/+0
The RB harvest registers are not necessary, the driver already exposes this info via the info ioctl. GB_BACKEND_MAP has been deprecated since SI and is not relevant to the RB mapping. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu/soc15: return cached values for some registers (v2)Alex Deucher1-8/+22
Required for SR-IOV and saves MMIO transactions. v2: drop cached RB harvest registers Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu:no cg for soc15 of SRIOVMonk Liu1-0/+3
no CG for SRIOV on SOC15 Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu:virt_init_setting invoke is missed!Monk Liu1-0/+4
this must be invoked during early init Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu: add get_clockgating callback for soc15 (v3)Huang Rui1-0/+37
v2: squash register typo fix from Ray v3: fix spelling Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu: disable uvd for sriovXiangliang Yu1-1/+2
disable uvd for sriov temporarily. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu:vega10: enable virtual display if set via module optionAlex Deucher1-1/+1
Enable virtual displays if the user has enabled them via the kernel command line. Useful in virtual or headless environments. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu/soc15: enable virtual dce for vfXiangliang Yu1-0/+3
VF need virtual dce, enable it if device is vf. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu/soc15: init virt ops for vfXiangliang Yu1-0/+4
If gpu device is vf, set virt ops so that guest can talk with GPU hypervisor. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu/soc15: bypass PSP for VFXiangliang Yu1-1/+2
Bypass PSP block for VF device. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu: impl sriov detection for vega10Xiangliang Yu1-0/+2
Read vega10 hw register to detect if sriov is enabled, and call it before IP blocks setting. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu: soc15 enable (v3)Ken Wang1-0/+806
Add soc15 support and enable all the IPs for vega10. v2: squash in xclk fix v3: disable HDP MGCG Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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