Age | Commit message (Collapse) | Author | Files | Lines | |
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2017-12-22 | clk: sprd: add adjustable pll support | Chunyan Zhang | 1 | -0/+266 | |
Introduced a common adjustable pll clock driver for Spreadtrum SoCs. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |