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path: root/arch/sparc/kernel/leon_kernel.c
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2012-11-10sparc32, leon: Check for existent irq_map entry in leon_handle_ext_irqAndreas Larsson1-2/+4
If an irq is being unlinked concurrently with leon_handle_ext_irq, irq_map[eirq] might be null in leon_handle_ext_irq. Make sure that this is not dereferenced. Signed-off-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-07-27sparc32,leon: drop leon_init()Sam Ravnborg1-16/+0
This function was only used to set of_pdt_build_more to leon_node_init(). But the leon_node_init() was a nop as prom_amba_init was never assigned. Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-28sparc32,leon: clean up leon.hSam Ravnborg1-0/+1
- Drop unused stuff accumulated over time - Drop non-leon stuff - Include almost all of the header unconditionally Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Konrad Eisele <konrad@gaisler.com>
2012-05-15sparc32: remove remaining users of btfixupSam Ravnborg1-8/+5
Use sparc_config to hold the last two function pointers. There was no point generating dedicated _ops structures only for these. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-15sparc32: move smp ipi to method opsSam Ravnborg1-16/+3
I ended up renaming set_cpu_int to send_ipi to be consistent all way around. send_ipi was moved to the *_smp.c files so we could call the relevant method direct, without any _ops indirection. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-14sparc32: Move cache and TLB flushes over to method ops.David S. Miller1-1/+1
This eliminated most of the remaining users of btfixup. There are some complications because of the special cases we have for sun4d, leon, and some flavors of viking. It was found that there are no cases where a flush_page_for_dma method was not hooked up to something, so the "noflush" iommu methods were removed. Add some documentation to the viking_sun4d_smp_ops to describe exactly the hardware bug which causes us to need special TLB flushing on sun4d. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-13sparc32: drop unused clear_cpu_intSam Ravnborg1-8/+0
Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-05-13sparc32: drop unused set_irq_udtSam Ravnborg1-5/+0
Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-15sparc32: generic clockevent supportTkhai Kirill1-4/+45
The kernel uses l14 timers as clockevents. l10 timer is used as clocksource if platform master_l10_counter isn't constantly zero. The clocksource is continuous, so it's possible to use high resolution timers. l10 timer is also used as clockevent on UP configurations. This realization is for sun4m, sun4d, sun4c, microsparc-IIep and LEON platforms. The appropriate LEON changes was made by Konrad Eisele. In case of sun4m's oneshot mode, profile irq is zeroed in smp4m_percpu_timer_interrupt(). It is maybe needless (double, triple etc overflow does nothing). sun4d is able to have oneshot mode too, but I haven't any way to test it. So code of its percpu timer handler is made as much equal to the current code as possible. The patch is tested on sun4m box in SMP mode by me, and tested by Konrad on leon in up mode (leon smp is broken atm - due to other reasons). Signed-off-by: Tkhai Kirill <tkhai@yandex.ru> Tested-by: Konrad Eisele <konrad@gaisler.com> [leon up] [sam: revised patch to provide generic support for leon] Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-15sparc32: rename sparc_irq_config to sparc_configSam Ravnborg1-2/+2
This struct holds platform specific config and is thus not limited to irq stuff. Do not let the name confuse us to think this is irq only. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-29remove references to cpu_*_map in arch/Rusty Russell1-3/+3
This has been obsolescent for a while; time for the final push. In adjacent context, replaced old cpus_* with cpumask_*. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: David S. Miller <davem@davemloft.net> (arch/sparc) Acked-by: Chris Metcalf <cmetcalf@tilera.com> (arch/tile) Cc: user-mode-linux-devel@lists.sourceforge.net Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: Richard Kuo <rkuo@codeaurora.org> Cc: linux-hexagon@vger.kernel.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Helge Deller <deller@gmx.de> Cc: sparclinux@vger.kernel.org
2011-11-01sparc: remove several unnecessary module.h include instancesPaul Gortmaker1-1/+0
Building an allyesconfig doesn't reveal a hidden need for any of these. Since module.h brings in the whole kitchen sink, it just needlessly adds 30k+ lines to the cpp burden. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2011-06-10sparc32, leon: bugfix in LEON SMP interrupt initDaniel Hellstrom1-0/+16
During converting per-cpu ticker to genirq layer some IRQ initialization code was removed by commit 2cf9530420e446bb61f665d02afeb81070106900 ("sparc32,leon: per-cpu ticker use genirq per-cpu handler"). This patch reintroduces the code at the same place it was removed from. IRQ12 - IRQ14 will crash on LEON SMP without this patch because it will run the SUN4M IRQ trap handler. Reported-by: Jan Andersson <jan@gaisler.com> Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-06-03sparc32,leon: add GRPCI2 PCI Host driverDaniel Hellstrom1-0/+15
The DMA region must be accessible in order for PCI peripheral drivers to work, the sparc32 has DMA in the normal memory zone which requires the GRPCI2 to PCI target BARs so that all kernel low mem (192MB) can be mapped 1:1 to PCI address space. The GRPCI2 has resizeable target BARs, by default the first is made 256MB and all other BARs are disabled. I/O space are always located on 0x1000-0x10000, but accessed through the GRPCI2 PCI I/O Window memory mapped to virtual address space. Configuration space is accessed through the 64KB GRPCI2 PCI CFG Window using LDA bypassing the MMU. The GRPCI2 has a single PCI Window for prefetchable and non- prefetchable address space, it is up to the AHB master requesting PCI data to determine access type. Memory space is mapped 1:1. The GRPCI2 core can be configured in 4 different IRQ modes, where PCI Interrupt, Error Interrupt and DMA Interrupt are shared on a single IRQ line or at most 5 IRQs are used. The GRPCI2 can mask/unmask PCI interrupts, Err and DMA in the control and check status bits which tells us which IRQ really happended. The GENIRQ layer is used to unmask/mask each individual IRQ source by creating virtual IRQs and implementing a IRQ chip. The optional DMA functionality of the GRPCI2 is not supported by this patch. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32,leon: don't rely on bootloader to mask IRQsDaniel Hellstrom1-0/+3
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32,leon: operate on boot-cpu IRQ controller registersDaniel Hellstrom1-9/+9
* proper initialization of boot_cpu_id (no hardcoding to 0) * use boot_cpu_id index to address into the IRQ controller where appropriate Each CPU has a separate set of IRQ controller registers, this patch makes sure that the boot-cpu registers are used instead of CPU0's. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32,leon: implement genirq CPU affinityDaniel Hellstrom1-10/+54
A simple implementation of CPU affinity, the first CPU in the affinity CPU mask always takes the IRQ. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32, leon: code cleanup of timer/IRQ controller initializationDaniel Hellstrom1-84/+72
Cleaned up leon_init_timers() by removing unnecessary double checking and one indentation level. Changed LEON_IMASK to LEON_IMASK(cpu). Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32,leon: cleaned away code from the LEON2 daysDaniel Hellstrom1-1/+1
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32,leon: per-cpu ticker use genirq per-cpu handlerDaniel Hellstrom1-25/+14
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32,leon: add support for extended interrupt controllerDaniel Hellstrom1-24/+71
The extended IRQ controller gives the LEON 16 more IRQs. The patch installs a custom handler for the exetended controller IRQ, where a register is read and the "real" IRQ causing IRQ is determined. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-22sparc32, leon: must protect IRQ controller register with spinlockDaniel Hellstrom1-7/+7
The LEON interrupt controller has one single mask register for all IRQs per CPU, even though the genirq layer protects us from accessing the same IRQ at the same time other IRQs share the same mask register and may thus interfere. Some other IRQ controllers has a mask register or similar per IRQ instead which makes spinlocks unncessary. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-04-20sparc32: genirq supportSam Ravnborg1-14/+56
The conversion of sparc32 to genirq is based on original work done by David S. Miller. Daniel Hellstrom has helped in the conversion and implemented the shutdowm functionality. Marcel van Nies <morcles@gmail.com> has tested this on Sparc Station 20 Test status: sun4c - not tested sun4m,pci - not tested sun4m,sbus - tested (Sparc Classic, Sparc Station 5, Sparc Station 20) sun4d - not tested leon - tested on various combinations of leon boards, including SMP variants generic Introduce use of GENERIC_HARDIRQS and GENERIC_IRQ_SHOW Allocate 64 IRQs - which is enough even for SS2000 Use a table of irq_bucket to maintain uses IRQs irq_bucket is also used to chain several irq's that must be called when the same intrrupt is asserted Use irq_link to link a interrupt source to the irq All plafforms must now supply their own build_device_irq method handler_irq rewriten to use generic irq support floppy Read FLOPPY_IRQ from platform device Use generic request_irq to register the floppy interrupt Rewrote sparc_floppy_irq to use the generic irq support pcic: Introduce irq_chip Store mask in chip_data for use in mask/unmask functions Add build_device_irq for pcic Use pcic_build_device_irq in pci_time_init allocate virtual irqs in pcic_fill_irq sun4c: Introduce irq_chip Store mask in chip_data for use in mask/unmask functions Add build_device_irq for sun4c Use sun4c_build_device_irq in sun4c_init_timers sun4m: Introduce irq_chip Introduce dedicated mask/unmask methods Introduce sun4m_handler_data that allow easy access to necessary data in the mask/unmask functions Add a helper method to enable profile_timer (used from smp) Added sun4m_build_device_irq Use sun4m_build_device_irq in sun4m_init_timers TODO: There is no replacement for smp_rotate that always scheduled next CPU as interrupt target upon an interrupt sun4d: Introduce irq_chip Introduce dedicated mask/unmask methods Introduce sun4d_handler_data that allow easy access to necessary data in mask/unmask fuctions Rewrote sun4d_handler_irq to use generic irq support TODO: The original implmentation of enable/disable had: if (irq < NR_IRQS) return; The new implmentation does not distingush between SBUS and cpu interrupts. I am no sure what is right here. I assume we need to do something for the cpu interrupts. I have not succeeded booting my sun4d box (with or without this patch) and my understanding of this platfrom is limited. So I would be a bit suprised if this works. leon: Introduce irq_chip Store mask in chip_data for use in mask/unmask functions Add build_device_irq for leon Use leon_build_device_irq in leon_init_timers Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Daniel Hellstrom <daniel@gaisler.com> Tested-by: Daniel Hellstrom <daniel@gaisler.com> Tested-by: Marcel van Nies <morcles@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-03-17sparc32: introduce sparc_irq_configSam Ravnborg1-1/+1
sparc_irq_config is used to hold the platform specific irq setup. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-03-17SPARC/LEON: power down instruction different of different LEONsDaniel Hellstrom1-1/+8
The way a LEON is powered down is implemented differently depending on CHIP type. The AMBA Plug&Play system ID tells revision of GRLIB and CHIP. This is for example needed by the GR-LEON4-ITX board and the UT699. Previously the power down support for LEON was limited to SMP, now both SMP and UP systems use the instruction. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04SPARC/LEON: added support for selecting Timer Core and Timer within coreDaniel Hellstrom1-26/+54
The ability to select Timer Core and Timer instance for system clock makes it possible for multiple AMP systems to coexist. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04LEON: added raw AMBA vendor/device number to find TIMER, IRQCTRLDaniel Hellstrom1-4/+10
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04SPARC/LEON: added support for IRQAMP IRQ ControllerDaniel Hellstrom1-0/+14
Needed for LEON AMP systems where different CPUs are routed to different IRQ controllers. This patch selects the IRQ Controller which has been routed to the boot CPU, it is up to the boot loader to configure the IRQ controller. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04SPARC/LEON: find IRQCTRL and Timer via OF-Tree, instead of hardcoded.Daniel Hellstrom1-6/+38
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-10-30SPARC/LEON: removed constant timer initialization as if HZ=100, now it ↵Daniel Hellstrom1-2/+2
reflects the value of HZ Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-10-13of/promtree: add of_pdt namespace to pdt codeAndres Salomon1-1/+1
For symbols still lacking namespace qualifiers, add an of_pdt_ prefix. Signed-off-by: Andres Salomon <dilinger@queued.net> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-03-30include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo1-1/+0
implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-02-12sparc: remove trailing space in messagesFrans Pop1-1/+1
Also fixes a typo in one message. Signed-off-by: Frans Pop <elendil@planet.nl> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-02sparc,leon: Sparc-Leon SMP supportKonrad Eisele1-0/+84
Support SMP for a Sparc-Leon multiprocessor system. Add Leon specific SMP code to arch/sparc/kernel/leon_smp.c. Signed-off-by: Konrad Eisele <konrad@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-08-18sparc,leon: CONFIG_SPARC_LEON option and leon specific files.Konrad Eisele1-0/+203
The macro CONFIG_SPARC_LEON will shield, if undefined, the sun-sparc code from LEON specific code. In particular include/asm/leon.h will get empty through #ifdef and leon_kernel.c and leon_mm.c will not be compiled. Signed-off-by: Konrad Eisele <konrad@gaisler.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>