summaryrefslogtreecommitdiff
path: root/arch/sh/include/cpu-sh3/cpu
AgeCommit message (Expand)AuthorFilesLines
2010-10-06sh: Fix up the SH-3 build.Paul Mundt1-0/+1
2010-03-02dmaengine: shdma: separate DMA headers.Guennadi Liakhovetski2-27/+41
2010-02-08Merge branch 'sh/dmaengine'Paul Mundt1-8/+12
2010-02-08sh: fix Transfer Size calculation in both DMA driversGuennadi Liakhovetski1-8/+12
2010-01-26sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt1-6/+6
2010-01-05sh: Kill off dead UBC headers.Paul Mundt1-42/+0
2009-08-15sh: Convert SH7705 extended mode to new cacheflush interface.Paul Mundt1-35/+0
2009-08-15sh: Kill off unused flush_icache_user_range().Paul Mundt1-1/+0
2009-08-15sh: consolidate flush_dcache_mmap_lock/unlock() definitions.Paul Mundt1-3/+0
2009-08-15sh: Centralize the CPU cache initialization routines.Paul Mundt1-2/+0
2009-08-15sh: rework nommu for generic cache.c use.Paul Mundt1-2/+0
2009-07-22sh: Migrate from PG_mapped to PG_dcache_dirty.Paul Mundt1-4/+1
2009-05-12sh: remove old TMU driverMagnus Damm1-67/+0
2009-03-10sh: dma-sh updates for multi IRQ and new SH-4A CPUs.Nobuhiro Iwamatsu1-11/+6
2008-12-22sh: Add platform-specific constants for SH7709Steve Glendinning1-0/+14
2008-10-20sh: Move the CPU definition headers from asm/ to cpu/.Paul Mundt1-0/+174
2008-08-11fix SH7705_CACHE_32KB compilationAdrian Bunk1-0/+10
2008-07-29sh: Allow SH-3 and SH-5 to use common headers.Paul Mundt4-79/+1
2008-07-29sh: migrate to arch/sh/include/Paul Mundt14-0/+549
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-28 20:22:48 +0300