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path: root/arch/powerpc/boot/dts/mpc8544ds.dts
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2009-03-24powerpc/85xx: Move gianfar mdio nodes under the ethernet nodesAnton Vorontsov1-38/+43
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep. Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-07powerpc/85xx: Fix PCIe error interruptsKumar Gala1-2/+2
The PCIe interrupts for 8544ds and 8572ds were incorrect. The 8572 case was found by Liu Yu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-12-17gianfar: Convert gianfar to an of_platform_driverAndy Fleming1-0/+20
Does the same for the accompanying MDIO driver, and then modifies the TBI configuration method. The old way used fields in einfo, which no longer exists. The new way is to create an MDIO device-tree node for each instance of gianfar, and create a tbi-handle property to associate ethernet controllers with the TBI PHYs they are connected to. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-07-30powerpc/fsl: proliferate simple-bus compatibility to soc nodesKim Phillips1-0/+1
add simple-bus compatible property to soc nodes for 83xx/85xx platforms that were missing them. Add same to platform probe code. This fixes SoC device drivers (such as talitos) to succeed in matching devices present in the soc node. also update mpc836x_rdk dts to new SEC bindings (overlooked in commit 3fd4473: powerpc/fsl: update crypto node definition and device tree instances). Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/fsl: update crypto node definition and device tree instancesKim Phillips1-0/+11
delete obsolete device-type property, delete model property (use compatible property instead), prepend "fsl," to Freescale specific properties. Add nodes to device trees that are missing them, and fix broken property values in other trees. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] 85xx: Add next-level-cache propertyKumar Gala1-1/+2
Added next-level-cache to the L1 and a reference to the new L2 label. This is per the ePAPR 0.94 spec. Since we are't really dependent on this today we aren't supporting the "legacy" l2-cache phandle that is specified in the PPC v2.1 OF Binding spec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] Cleanup mpic nodes in .dtsKumar Gala1-2/+0
Removed clock-frequency, big-endian, and built-in props as they aren't specified anywhere. Also added compatible = "chrp,open-pic" in the places it was missing. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] 85xx: Enable MSI support for 85xxds boardJason Jin1-0/+16
This patch enabled MSI on 8544ds and 8572ds board. So far only one MSI interrupt can generate on 8544 board. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17[POWERPC] 85xx: minor .dts cleanupsKumar Gala1-1/+0
* remove #cpus from mpc8544ds.dts (not used anywhere else) * remove memreserve from mpc8568mds.dts (not needed) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17[POWERPC] 85xx: Convert dts to v1 syntaxKumar Gala1-139/+140
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17[POWERPC] 85xx: Enable DMA engine on the MPC8544 DSSebastian Siewior1-0/+41
Add the device tree node for the DMA engine on 8544, publish the device and enable the driver in the defconfig. Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-24[POWERPC] Fix incorrect interrupt map on FSL reference boardsKumar Gala1-3/+3
The ULI based boards had the interrupt maps for USB on the ULI incorrectly set. Also, the MPC8572DS was missing the interrupt-map-mask for the 3rd PCIe controller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12[POWERPC] FSL: Added aliases node to device treesKumar Gala1-7/+23
Added aliases nodes for kurobox, 83xx, 85xx, and 86xx platforms. This included added labels and cell-index properties for serial and pci nodes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12[POWERPC] FSL: enet device tree cleanupsKumar Gala1-8/+6
* Removed address fields in ethernet nodes * Removed #address-cells, #size-cells from gianfar nodes * Added cell-index to gianfar and ucc ethernet nodes * Added enet[0..3] labels * Renamed compatible node for gianfar mdio to "fsl,gianfar-mdio" * Removed device_type = "mdio" The matching for gianfar mdio still supports the old "mdio"/"gianfar" combo but it is now considered deprecated. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12[POWERPC] FSL: I2C device tree cleanupsKumar Gala1-1/+14
* Removed device_type = "i2c" * Added missing second I2C controller on MPC8548 CDS, MPC8544 DS * Added #address-cells, #size-cells, and cell-index where missing Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-11-20[POWERPC] Fix device tree interrupt map for Freescale ULI1575 boardsKumar Gala1-10/+10
The interrupt map for the PCI PHB that had the ULI1575 was not correct on the boards that have it. * 8544 DS: - Fix interrupt mask - Be explicit about use of INTA for on chip peripherals * 8572 DS/8641 HPCN: - Fix interrupt mask - Expand interrupt map for PCI slots to cover all functions - Be explicit about use of INTA for on chip peripherals Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14[POWERPC] Move PCI nodes to be sibilings with SOC nodesKumar Gala1-176/+196
Updated the device trees to have the PCI nodes be at the same level as the SOC node. This is to make it so that the SOC nodes children address space is just on chip registers and not other bus memory as well. Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge that exists in the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14[POWERPC] DTS cleanupKumar Gala1-5/+0
Removed the following cruft from .dts files: * 32-bit in cpu node -- doesn't exist in any spec and not used by kernel * removed built-in (chrp legacy) * Removed #interrupt-cells in places they don't need to be set * Fixed ranges on lite5200* * Removed clock-frequency from i8259 pic node, not sure where this came from * Removed big-endian from i8259 pic nodes, this was just bogus Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-17[POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boardsKumar Gala1-50/+38
The interrupt routing in the device trees for the ULI M1575 was inproperly using the interrupt line field as pci function. Fixed up the device tree's to actual conform for to specification and changed the interrupt mapping code so it just uses a static mapping setup as follows: PIRQA - IRQ9 PIRQB - IRQ10 PIRQC - IRQ11 PIRQD - IRQ12 USB 1.1 OCHI (1c.0) - IRQ12 USB 1.1 OCHI (1c.1) - IRQ9 USB 1.1 OCHI (1c.2) - IRQ10 USB 1.1 ECHI (1c.3) - IRQ11 LAN (1b.0) - IRQ6 AC97 (1d.0) - IRQ6 Modem (1d.1) - IRQ6 HD Audio (1d.2) - IRQ6 SATA (1f.1) - IRQ5 SMB (1e.1) - IRQ7 PMU (1e.2) - IRQ7 PATA (1f.0) - IRQ14/15 Took the oppurtunity to refactor the code into a single file so we don't have to duplicate these fixes on the two current boards in the tree and several forth coming boards that will also need the code. Fixed RTC support that requires a dummy memory read on the P2P bridge to unlock the RTC and setup the default of the RTC alarm registers to match with a basic x86 style CMOS RTC. Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure the PCI IO space has been setup properly before we start poking ISA registers at random locations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26[POWERPC] Fix the ability to reset on MPC8544 DS and MPC8568 MDS boardsRoy Zang1-0/+6
Add global-utilities node with has-rstcr on MPC8544 DS and MPC8568 MDS boards so they are able to reset properly. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26[POWERPC] Fix ethernet PHY support on MPC8544 DSKumar Gala1-0/+2
The MPC8544 dts needed to set the new phy-connection-type to rgmii-id for the Vitesse PHY on the board to work properly. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24[POWERPC] Add basic PCI/PCI Express support for 8544DS boardRoy Zang1-0/+211
Add basic support for the PCIe PHB and enable the ULI bridge. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-03[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chipsKumar Gala1-9/+9
Make the interrupt numbers match the OpenPIC spec intead of the Freescale docs which distinguish between internal and external interrupts. Now we can use the interrupt number directly to find the register offset associated with it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-05-17[POWERPC] 85xx: Add device nodes for error reporting devices used by EDACKumar Gala1-0/+16
Adding memory-controller and l2-cache-controller entries to be used by EDAC as of_devices for MPC8541 CDS, MPC8544 DS, MPC8555 CDS, and MPC8568 MDS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-30[POWERPC] 85xx: Add initial MPC8544 DS platform files.Jon Loeliger1-0/+136
This patch provides the basic MPC8544 DS platform code and config. Follow-up patches will add peripherals such as PCI and SATA. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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