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2007-07-10[MIPS] Remove Momenco Ocelot C supportFranck Bui-Huu59-2511/+0
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/configs/ocelot_c_defconfig delete mode 100644 arch/mips/momentum/ocelot_c/Makefile delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_c/irq.c delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h delete mode 100644 arch/mips/momentum/ocelot_c/platform.c delete mode 100644 arch/mips/momentum/ocelot_c/prom.c delete mode 100644 arch/mips/momentum/ocelot_c/reset.c delete mode 100644 arch/mips/momentum/ocelot_c/setup.c delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c delete mode 100644 arch/mips/pci/fixup-ocelot-c.c delete mode 100644 arch/mips/pci/pci-ocelot-c.c
2007-07-10[MIPS] IP32: Remove experimental tag from kconfig.Ralf Baechle1-2/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] PCI: Make dev pointer argument of pcibios_map_irq const.Ralf Baechle27-27/+28
This is to break the code of people who think they are supposed to scribble into the pci device structure - it's off limits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] EV64120: Remove supportYoichi Yuasa56-1621/+2
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] DECstation: Optimised early printk()Maciej W. Rozycki3-7/+29
This is an optimised implementation of early printk() for the DECstation. After the recent conversion to a MIPS-specific generic routine using a character-by-character output the performance dropped significantly. This change reverts to the previous speed -- even at 9600 bps of the serial console the difference is visible with a naked eye; I presume for a framebuffer it is even worse (it may depend on exactly which one is used though). Additionally the change includes a fix for a problem that the old implementation had -- the format used would not actually limit the length of the string output. This new implementation uses a local buffer to deal with it -- even with this additional copying it is much faster than the generic function. Plus this driver is registered much earlier than the generic one, allowing one to see critical messages, such as one about an incorrect CPU setting used, that are produced beforehand. :-) Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] No I/O ports on the DECstationMaciej W. Rozycki1-0/+4
There are no I/O ports on the DECstation whatsoever in any configuration as neither the CPU nor the peripheral buses used have a concept of such. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}Atsushi Nemoto7-131/+0
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] update cobalt_defconfigYoichi Yuasa1-270/+228
Enable Cobalt button support and change ATA driver from BLK_DEV_VIA82CXXX to PATA_VIA.. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Remove unused dump_tlb functionsAtsushi Nemoto3-265/+2
Remove unused dump_tlb functions and cleanup some includes. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Unify dump_tlbAtsushi Nemoto6-294/+60
Unify lib-{32,64}/dump_tlb.c into lib/dump_tlb.c and move lib-32/r3k_dump_tlb.c to lib directory. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.Ralf Baechle12-33/+125
It shares no code at all. While at it also fix up the beginning bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Hook for platforms to define cachability of /dev/mem regionsRalf Baechle1-0/+10
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Transform old-style macros to newer "__noreturn"Robert P. J. Day7-16/+16
Convert old/obsolete NORET_TYPE and ATTRIB_NORET macros to use the newer standard of "__noreturn" as defined in compiler-gcc.h. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Add generic GPIO to Au1x00Florian Fainelli2-43/+82
This patch adds support for the generic GPIO API to Au1x00 boards. It requires the generic GPIO patch for MIPS boards by Yoichi Yuasa. Now there is a MIPS target using it, can you queue these patchset for 2.6.22 ? Thank you very much in advance. Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Add generic GPIO supportYoichi Yuasa1-0/+3
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Simplify missing-syscalls for N32 and O32Atsushi Nemoto1-22/+10
Use standard missing-syscalls with EXTRA_CFLAGS instead of duplicating the command. And move the archprepare rule before the archclean rule. Suggested by Franck Bui-Huu. Also add "echo" to show the target ABI. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] Remove unused config entriesYoichi Yuasa1-11/+0
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-09sched: zap the migration init / cache-hot balancing codeIngo Molnar1-11/+0
the SMP load-balancer uses the boot-time migration-cost estimation code to attempt to improve the quality of balancing. The reason for this code is that the discrete priority queues do not preserve the order of scheduling accurately, so the load-balancer skips tasks that were running on a CPU 'recently'. this code is fundamental fragile: the boot-time migration cost detector doesnt really work on systems that had large L3 caches, it caused boot delays on large systems and the whole cache-hot concept made the balancing code pretty undeterministic as well. (and hey, i wrote most of it, so i can say it out loud that it sucks ;-) under CFS the same purpose of cache affinity can be achieved without any special cache-hot special-case: tasks are sorted in the 'timeline' tree and the SMP balancer picks tasks from the left side of the tree, thus the most cache-cold task is balanced automatically. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-07-06[MIPS] Fix scheduling latency issue on 24K, 34K and 74K coresRalf Baechle1-2/+13
The idle loop goes to sleep using the WAIT instruction if !need_resched(). This has is suffering from from a race condition that if if just after need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but we've just completed the test so go to sleep anyway. This would be trivial to fix by just disabling interrupts during that sequence as in: local_irq_disable(); if (!need_resched()) __asm__("wait"); local_irq_enable(); but the processor architecture leaves it undefined if a processor calling WAIT with interrupts disabled will ever restart its pipeline and indeed some processors have made use of the freedom provided by the architecture definition. This has been resolved and the Config7.WII bit indicates that the use of WAIT is safe on 24K, 24KE and 34K cores. It also is safe on 74K starting revision 2.1.0 so enable the use of WAIT with interrupts disabled for 74K based on a c0_prid of at least that. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06[MIPS] SMTC: Fix cut'n'paste bug in Kconfig.debugRalf Baechle1-1/+1
This effectivly turned the SMTC_IDLE_HOOK_DEBUG debug option into a no-op. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06[MIPS] Change libgcc-style functions from lib-y to obj-yRalf Baechle1-1/+1
Reported by Eugene Surovegin <ebs@ebshome.net>. If only modules were users of these functions they did not get linked into the kernel proper, so later module loads would fail as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06[MIPS] Fix timer/performance interrupt detectionChris Dearman1-4/+4
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06[MIPS] AP/SP: Avoid triggering the 34K E125 performance issueRalf Baechle1-4/+0
C0_status doesn't need to be initialized at this point anyway; the register will be initialized later. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-04[MIPS] VSMP: Fix initialization ordering bug.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-28mips-jazz: correct flags for timer io resourceAlexey Dobriyan1-1/+1
arch/mips/jazz/setup.c:55:4: error: Initializer entry defined twice Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-26[MIPS] Count timer interrupts correctly.Chris Dearman1-1/+1
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work.Ralf Baechle1-2/+1
Neither rtc_mips_get_time nor rtc_mips_set_time are being initialized by the EMMA2RH setup code, so genrtc at best was a RTC dummy avoiding a few error messages but not providing actual functionality. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] use compat_siginfo in rt_sigframe_n32Pavel Kiryukhin2-65/+3
Signed-off-by: Pavel Kiryukhin <vksavl@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] 20K: Handle WAIT related bugs according to errata informationRalf Baechle1-1/+11
We used to avoid the WAIT entirely on the 20K but really only need to do this on early revs of the 20K. Without this a 20K was a bit of a power hog. Well, in the lower power power hog category ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] AP/SP requires shadow registers, auto enable support.Ralf Baechle1-0/+1
Noticed by Chris Dearman (chris@mips.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] Fix pb1500 reg B accessYoichi Yuasa1-1/+1
au_readl() is correct here. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] Alchemy: Fix wrong castYoichi Yuasa1-1/+1
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] remove "support for" from system type entryYoichi Yuasa1-2/+2
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] add io_map_base to pci_controller on CobaltYoichi Yuasa1-0/+1
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26[MIPS] __ucmpdi2 arguments are unsigned long long.Ralf Baechle1-1/+1
Reported by Eugene Surovegin <ebs@ebshome.net>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-21[MIPS] Don't drag a platform specific header into generic arch code.Ralf Baechle10-62/+63
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Fix builds where MSC01E_xxx is undefined.Chris Dearman1-1/+4
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Separate performance counter interruptsChris Dearman4-46/+135
Support for performance counter overflow interrupt that is on a separate interrupt from the timer. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14[MIPS] Malta: Fix for SOCitSC based MaltasChris Dearman4-61/+67
And an attempt to tidy up the core/controller differences. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] Fix IP27 buildAtsushi Nemoto1-1/+1
IP27 does no longer have ZONE_DMA. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] Fix modpost warnings by making start_secondary __cpuinitRalf Baechle1-1/+1
WARNING: arch/mips/kernel/built-in.o(.text+0x9a58): Section mismatch: reference to .init.text:cpu_report (between 'start_secondary' and 'smp_prepare_boot_cpu') WARNING: arch/mips/kernel/built-in.o(.text+0x9a60): Section mismatch: reference to .init.text:per_cpu_trap_init (between 'start_secondary' and 'smp_prepare_boot_cpu') WARNING: arch/mips/kernel/built-in.o(.text+0x9adc): Section mismatch: reference to .init.text:cpu_probe (between 'start_secondary' and 'smp_prepare_boot_cpu') mipsel-linux-objcopy -S -O srec --remove-section=.reginfo --remove-section=.mdebug --remove-section=.comment --remove-section=.note --remove-section=.pdr --remove-section=.options --remove-section=.MIPS.options vmlinux arch/mips/boot/vmlinux.srec Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] SMTC: Fix build error caused by nonsense code.Chris Dearman1-14/+2
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.Ralf Baechle1-0/+7
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.Ralf Baechle1-2/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] SMTC: Fix warning.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] Wire up utimensat, signalfd, timerfd, eventfdAtsushi Nemoto4-1/+17
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] Atlas: Fix build.Ralf Baechle1-3/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] Always install the DSP exception handler.Chris Dearman1-2/+1
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they are actually expected to produce a reserved instruction exception. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11[MIPS] SMTC: Don't set and restore irqregs ptr from self_ipi.Ralf Baechle1-3/+0
This did corrupt register s0 which the caller of self_ipi expects to be unchanged. This is a kernel bug which will only be triggered with the compilers which compile __smtc_ipi_replay to use s0 across the invocation of self_ipi. Gcc 4.1.2 does this, for example. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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