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path: root/arch/mips/kernel/traps.c
AgeCommit message (Expand)AuthorFilesLines
2016-05-13MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mipsPaul Burton1-1/+1
2016-05-13MIPS: traps: remove unused variableTony Wu1-1/+0
2016-05-13MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen1-1/+2
2016-05-13MIPS: Add and use CAUSEF_WP definitionJames Hogan1-4/+1
2016-05-13MIPS: Add P6600 cases to CPU switch statementsPaul Burton1-0/+1
2016-05-13MIPS: traps: Make sure secondary cores have a sane ebase registerMarkos Chandras1-0/+7
2016-05-13MIPS: panic immediately when panic_on_oopsAaro Koskinen1-4/+1
2016-05-09MIPS: Avoid using unwind_stack() with usermodeJames Hogan1-1/+1
2016-04-04MIPS: traps.c: Verify the ISA for microMIPS RDHWR emulationMaciej W. Rozycki1-13/+13
2016-04-03MIPS: traps: Correct the SIGTRAP debug ABI in `do_watch' and `do_trap_or_bp'Maciej W. Rozycki1-5/+13
2016-04-03MIPS: Fix misspellings in comments.Adam Buchbinder1-1/+1
2016-03-05MIPS: traps: Fix SIGFPE information leak from `do_ov' and `do_trap_or_bp'Maciej W. Rozycki1-7/+6
2016-02-02MIPS: traps.c: Correct microMIPS RDHWR emulationMaciej W. Rozycki1-4/+5
2016-02-02MIPS: traps.c: Don't emulate RDHWR in the CpU #0 exception handlerMaciej W. Rozycki1-15/+1
2016-01-24MIPS: Use EXCCODE_ constants with set_except_vector()James Hogan1-26/+26
2015-11-12Merge branch '4.3-fixes' into mips-for-linux-nextRalf Baechle1-0/+2
2015-11-09MIPS: add nmi_enter() + nmi_exit() to nmi_exception_handler()Petri Gynther1-0/+2
2015-10-26MIPS: traps: tidy up ebase calculationPaul Burton1-6/+3
2015-09-03MIPS: Add uprobes support.Ralf Baechle1-0/+12
2015-09-03MIPS: Set trap_no field in thread_struct on exception.Ralf Baechle1-14/+14
2015-09-03MIPS: Refactor dumping of TLB registers for r3k/r4kJames Hogan1-14/+2
2015-08-26MIPS: Add cases for CPU_I6400Markos Chandras1-0/+1
2015-08-03MIPS: show_stack: Fix stack trace with EVAJames Hogan1-0/+7
2015-08-03MIPS: do_mcheck: Fix kernel code dump with EVAJames Hogan1-0/+6
2015-07-09MIPS: kernel: traps: Fix broken indentationMarkos Chandras1-4/+4
2015-06-21MIPS: Get rid of 'kgdb_early_setup' cruft.Sergei Shtylyov1-5/+0
2015-06-21MIPS: traps: print Exception Code in __show_regs()Petri Gynther1-3/+4
2015-05-13MIPS: traps: remove extra Tainted: line from __show_regs() outputPetri Gynther1-1/+0
2015-04-20Merge tag 'cpumask-next-for-linus' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds1-3/+3
2015-04-17Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-116/+160
2015-04-08MIPS: Set `si_code' for SIGFPE signals sent from emulation tooMaciej W. Rozycki1-67/+83
2015-04-08MIPS: Always clear FCSR cause bits after emulationMaciej W. Rozycki1-1/+14
2015-04-08MIPS: Respect the FCSR exception mask for `si_code'Maciej W. Rozycki1-1/+10
2015-04-08MIPS: Correct FP ISA requirementsMaciej W. Rozycki1-12/+11
2015-04-08MIPS: Fix BREAK code interpretation heuristicsMaciej W. Rozycki1-1/+1
2015-04-08MIPS: BREAK instruction interpretation correctionsMaciej W. Rozycki1-18/+18
2015-04-08MIPS: Correct MIPS16 BREAK code interpretationMaciej W. Rozycki1-1/+1
2015-04-08MIPS: Normalise code flow in the CpU exception handlerMaciej W. Rozycki1-8/+7
2015-04-08MIPS: Reindent R6 RI exception emulationMaciej W. Rozycki1-16/+15
2015-04-08MIPS: Correct the comment for FPU emulator trapsMaciej W. Rozycki1-3/+3
2015-03-31MIPS: Read CPU IRQ line that FDC to routed toJames Hogan1-0/+12
2015-03-31MIPS: Allow shared IRQ for timer & perf counterJames Hogan1-2/+0
2015-03-28MIPS: Clear [MSA]FPE CSR.Cause after notify_die()James Hogan1-1/+15
2015-03-27MIPS: Ensure FCSR cause bits are clear after invoking FPU emulatorPaul Burton1-8/+9
2015-03-05mips: fix up obsolete cpu function usage.Rusty Russell1-3/+3
2015-02-22Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-6/+54
2015-02-17MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras1-0/+2
2015-02-17MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin1-1/+27
2015-02-17MIPS: kernel: traps: Add MIPS R6 related definitionsLeonid Yegoshin1-5/+5
2015-02-16MIPS: Add cases for CPU_QEMU_GENERICLeonid Yegoshin1-0/+1
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