| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-03-14 | arm64: Invalidate the TLB corresponding to intermediate page table levels | Catalin Marinas | 1 | -0/+13 |
| 2015-02-26 | arm64: mm: remove unused functions and variable protoypes | Yingjoe Chen | 1 | -5/+0 |
| 2014-07-24 | arm64: fix soft lockup due to large tlb flush range | Mark Salter | 1 | -3/+26 |
| 2014-07-24 | arm64: Fix barriers used for page table modifications | Catalin Marinas | 1 | -2/+3 |
| 2014-05-09 | arm64: barriers: make use of barrier options with explicit barriers | Will Deacon | 1 | -7/+7 |
| 2014-05-09 | arm64: mm: Optimise tlb flush logic where we have >4K granule | Steve Capper | 1 | -5/+25 |
| 2013-06-14 | ARM64: mm: THP support. | Steve Capper | 1 | -0/+2 |
| 2012-09-17 | arm64: TLB maintenance functionality | Catalin Marinas | 1 | -0/+122 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |