index
:
BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
arm
/
mm
/
cache-v6.S
Age
Commit message (
Expand
)
Author
Files
Lines
2010-12-15
ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
Valentine Barshak
1
-8
/
+20
2010-10-04
ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Tony Lindgren
1
-11
/
+19
2010-07-01
ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance wo...
Catalin Marinas
1
-3
/
+12
2010-07-01
ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
Catalin Marinas
1
-1
/
+2
2010-05-08
ARM: 6111/1: Implement read/write for ownership in the ARMv6 DMA cache ops
Catalin Marinas
1
-4
/
+13
2010-02-15
ARM: dma-mapping: fix for speculative prefetching
Russell King
1
-4
/
+6
2010-02-15
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
Russell King
1
-4
/
+2
2010-02-15
ARM: dma-mapping: provide per-cpu type map/unmap functions
Russell King
1
-0
/
+26
2009-12-14
ARM: add size argument to __cpuc_flush_dcache_page
Russell King
1
-5
/
+6
2009-10-07
ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range
Catalin Marinas
1
-2
/
+18
2009-04-30
[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can...
Catalin Marinas
1
-0
/
+33
2006-03-11
[ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem
Catalin Marinas
1
-3
/
+4
2006-02-01
[ARM] 3294/1: don't invalidate individual BTB entries on ARMv6
Nicolas Pitre
1
-12
/
+6
2005-09-30
[ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S
Gen FUKATSU
1
-1
/
+8
2005-04-17
Linux-2.6.12-rc2
v2.6.12-rc2
Linus Torvalds
1
-0
/
+227