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2009-06-23OMAP3: RX51: Use OneNAND sync read / writeAdrian Hunter1-0/+1
Use OneNAND sync read / write Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-06-23OMAP2/3: gpmc-onenand: correct use of async timingsAdrian Hunter1-2/+19
Use async timings when sync timings are not requested. Also ensure that OneNAND is in async mode when async timings are used. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-06-23OMAP2/3: Add omap_type() for determining GP/EMU/HSKevin Hilman1-0/+22
The omap_type() function is added and returns the DEVICETYPE field of the CONTROL_STATUS register. The result can be used for conditional code based on whether device is GP (general purpose), EMU or HS (high security). Also move the type defines so omap1 code compile does not require ifdefs for sections using these defines. This code is needed for the following fix to set the SRAM size correctly for HS omaps. Also at least PM and watchdog code will need this function. Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-06-23OMAP2/3: omap mailbox: platform_get_irq() error ignoredRoel Kluin1-3/+3
platform_get_irq may return -ENXIO. but struct omap_mbox mbox_dsp_info.irq is unsigned, so the error was not noticed. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-06-23OMAP2/3: mmc-twl4030: use correct controller in twl_mmc23_set_powerGrazvydas Ignotas1-1/+12
twl_mmc23_set_power() has MMC2 twl_mmc_controller hardcoded in it, which breaks MMC3. Find the right controller to use instead. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-06-20Merge branch 'omap-clock-for-next' of git://git.pwsan.com/linux-2.6 into develRussell King5-57/+154
2009-06-20OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisonsRoel Kluin2-2/+2
with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1 after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley1-0/+12
Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2-9/+8
Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
2009-06-20OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley1-15/+38
Convert omap3_sram_configure_core_dpll() to use macros rather than magic numbers. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley1-21/+24
Clean up comments and copyrights on the CORE DPLL3 M2 divider change code. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2-3/+9
Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2-13/+37
When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3 clock: initialize SDRC timings at kernel startPaul Walmsley2-3/+36
On the OMAP3, initialize SDRC timings when the kernel boots. This ensures that the kernel is running with known, optimized SDRC timings, rather than whatever was configured by the bootloader. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-20OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizePaul Walmsley1-3/+0
The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-06-09ARM: OMAP4: SMP: Enable SMP support for OMAP4430Santosh Shilimkar1-0/+4
This patch enables SMP on OMAP4430 SDP platform. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2009-06-09ARM: OMAP4: SMP: Add mpu timer support for OMAP4430Santosh Shilimkar2-0/+38
This patch adds SMP platform specific parts for local(mpu) timer support for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the MPU domain. These timers are not in wakeup domain. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2009-06-09ARM: OMAP4: SMP: Add OMAP4430 SMP board filesSantosh Shilimkar2-0/+224
This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2009-05-29Merge branch 'for-next' of ↵Russell King48-806/+4973
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel Conflicts: arch/arm/Makefile
2009-05-29Merge branch 'for-next' of ↵Russell King6-21/+23
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci into devel
2009-05-29Merge branch 'omap4' into for-nextTony Lindgren8-6/+179
2009-05-29Merge branch 'omap3-boards' into for-nextTony Lindgren11-200/+1100
2009-05-29Merge branch 'omap3-upstream' into for-nextTony Lindgren8-26/+348
Conflicts: arch/arm/mach-omap2/serial.c
2009-05-29Merge branch 'omap-upstream' into for-nextTony Lindgren6-250/+677
Conflicts: arch/arm/mach-omap2/Makefile
2009-05-29ARM: OMAP4: Add support for 4430 SDPSantosh Shilimkar3-1/+102
This patch updates the Makefile and Kconfig entries for OMAP4. The OMAP4430 SDP board file supports only minimal set of drivers. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP4: Add minimal support for omap4Santosh Shilimkar5-5/+77
This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: pandora: add support for mode devicesGrazvydas Ignotas1-0/+149
Add support for keypad, GPIO keys and LEDs. Also enable hardware debounce feature for GPIO keys. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: Add omap3 EVM supportSyed Mohammed Khasim3-0/+335
Add omap3 EVM support Signed-off-by: Syed Mohammed Khasim <khasim@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: Add support for OMAP3 Zoom2 boardVikram Pandita4-1/+277
This patch creates the minimal OMAP3 Zoom2 board support. Signed-off-by: Mikkel Christensen <mlc@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: RX51: Connect VAUX3 to MMC2Adrian Hunter1-3/+27
Connect VAUX3 to MMC2 Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: pandora: setup regulator framework for MMCGrazvydas Ignotas1-0/+45
Setup regulators for MMC1 and MMC2 to get those SD slots working again. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> CC: David Brownell <david-b@pacbell.net> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: Initialize regulators for Beagle and OveroDavid Brownell2-28/+152
Initialize regulators for Beagle and Overo. Patch is based on earlier patches posted to linux-omap mailing list. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: mmc-twl4030 uses regulator frameworkDavid Brownell2-168/+115
Decouple the HSMMC glue from the twl4030 as the only regulator provider, using the regulator framework instead. This makes the glue's "mmc-twl4030" name become a complete misnomer ... this code could probably all migrate into the HSMMC driver now. Tested on 3430SDP (SD and low-voltage MMC) and Beagle (SD), plus some other boards (including Overo) after they were converted to set up MMC regulators properly. Eventually all boards should just associate a regulator with each MMC controller they use. In some cases (Overo MMC2 and Pandora MMC3, at least) that would be a fixed-voltage regulator with no real software control. As a temporary hack (pending regulator-next updates to make the "fixed.c" regulator become usable) there's a new ocr_mask field for those boards. Patch updated with a fix for disabling vcc_aux by Adrian Hunter <adrian.hunter@nokia.com> Cc: Pierre Ossman <drzeus-list@drzeus.cx> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: Initialize more devices for LDPTony Lindgren1-1/+203
Based on an earlier patches by Stanley.Miao <stanley.miao@windriver.com> and Nishant Kamat <nskamat@ti.com>. Note that at the ads7846 support still needs support for vaux_control for the touchscreen to work. Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: ZOOM MDK: Add FB support to board fileImre Deak1-4/+15
Based on an earlier patch by Stanley.Miao <stanley.miao@windriver.com> with board-*.c changes split to avoid conflicts with other device updates. Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: SDRC: add timing data for Qimonda HYB18M512160AF-6Paul Walmsley2-1/+56
Add timing data for the Qimonda HYB18M512160AF-6 SDRAM chip, used on the OMAP3430SDP boards. Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chip used on 3430SDP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP3: SDRC: add timing data for Micron MT46H32M32LF-6, v2Paul Walmsley4-3/+62
Add timing data for the Micron MT46H32M32LF-6 SDRAM chip, used on the OMAP3 Beagle and EVM boards. Original timing data is from the Micron datasheet PDF downloaded from: http://download.micron.com/pdf/datasheets/dram/mobile/1gb_ddr_mobile_sdram_t48m.pdf Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chips used on Beagle & OMAP3EVM. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP2/3: Serial: Remove arch_initcall dependencyVikram Pandita1-13/+9
Move platform_device_register() for serial device to omap_serial_init() There is no need to have arch_initcall() dependency in serial as already board files call the function omap_serial_init() Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP2: 2430SDP: Add FB support to board fileImre Deak1-0/+19
Based on an earlier patch by Hunyue Yau <hyau@mvista.com> with board-*.c changes split to avoid conflicts with other device updates. Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Hunyue Yau <hyau@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP2/3: Add generic smc91x support when connected to GPMCTony Lindgren5-254/+271
Convert the board-rx51 smc91x code to be generic and make the boards to use it. This allows future recalculation of the timings when the source clock gets scaled. Also correct the rx51 interrupt to be IORESOURCE_IRQ_HIGHLEVEL. Thanks to Paul Walmsley <paul@pwsan.com> for better GPMC timing calculations. Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-29ARM: OMAP2/3: Add generic onenand support when connected to GPMCJuha Yrjola3-0/+391
Add generic onenand support when connected to GPMC and make the boards to use it. The patch has been modified to make it more generic to support all the boards with GPMC. The patch also remove unused prototype for omap2_onenand_rephase(void). Note that board-apollon.c is currently using the MTD_ONENAND_GENERIC and setting the GPMC timings in the bootloader. Setting the GPMC timings in the bootloader will not allow supporting frequency scaling for the onenand source clock. Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-05-28OMAP3: PM: prevent module wakeups from waking IVA2Kevin Hilman2-0/+8
By default, prevent functional wakeups from inside a module from waking up the IVA2. Let DSP Bridge code handle this when loaded. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: Clear pending PRCM reset flags on initKevin Hilman1-0/+9
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: Ensure PRCM interrupts are cleared at bootKevin Hilman1-0/+3
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: Ensure MUSB block can idle when driver not loadedPeter 'p2' De Schrijver2-2/+20
Otherwise, bootloaders may leave MUSB in a state which prevents retention. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: D2D clockdomain supports SW supervised transitionsKevin Hilman1-1/+1
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: Add D2D clocks and auto-idle setup to PRCM initKevin Hilman4-4/+71
Add D2D clocks (modem_fck, sad2d_ick, mad2d_ick) to clock framework and ensure that auto-idle bits are set for these clocks during PRCM init. Also add omap3_d2d_idle() function called durint PRCM setup which ensures D2D pins are MUX'd correctly to enable retention for standalone (no-modem) devices. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP: UART: Add sysfs interface for adjusting UART sleep timeoutJouni Hogander1-4/+51
This patch makes it possible to change uart sleep timeout. New sysfs entry is added (/sys/devices/platform/serial8250.<uart>/sleep_timeout) Writing zero will disable the timeout feature and prevent UART clocks from being disabled. Also default timeout is increased to 5 second to make serial console more usable. Original patch was written by Tero Kristo. Cc: Tero Kristo <Tero.Kristo@nokia.com> Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: UART: disable clocks when idle and off-mode supportKevin Hilman3-25/+396
This patch allows the UART clocks to be disabled when the OMAP UARTs are inactive, thus permitting the chip to hit retention in idle. After the expiration of an activity timer, each UART is allowed to disable its clocks so the system can enter retention. The activity timer is (re)activated on any UART interrupt, UART wake event or any IO pad wakeup. The actual disable of the UART clocks is done in the 'prepare_idle' hook called from the OMAP idle loop. While the activity timer is active, the smart-idle mode of the UART is also disabled. This is due to a "feature" of the UART module that after a UART wakeup, the smart-idle mode may be entered before the UART has communicated the interrupt, or upon TX, an idle mode may be entered before the TX FIFOs are emptied. Upon suspend, the 'prepare_suspend' hook cancels any pending activity timers and allows the clocks to be disabled immediately. In addition, upon disabling clocks the UART state is saved in case of an off-mode transition while clocks are off. Special thanks to Tero Kristo for the initial ideas and first versions of UART idle support, and to Jouni Hogander for extra testing and bugfixes. Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810) Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-28OMAP3: PM: Force IVA2 into idle during bootupKevin Hilman1-0/+50
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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