BMC/Intel-BMC/linux.git - Intel OpenBMC Linux kernel source tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2010-09-28	omap3: Prevent SDRC deadlock when L3 is changing frequency	Jon Hunter	1	-1/+5
2009-12-12	OMAP3: SDRC: Place SDRC AC timing and MR changes in CORE DVFS SRAM code behin...	Paul Walmsley	1	-2/+17
2009-07-25	OMAP3 SDRC: Move the clk stabilization delay to the right place	Rajendra Nayak	1	-2/+2
2009-07-25	OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83Mhz	Rajendra Nayak	1	-1/+1
2009-07-25	OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on boot	Paul Walmsley	1	-2/+0
2009-07-25	OMAP3 SDRC: add support for 2 SDRAM chip selects	Jean Pihet	1	-30/+107
2009-06-20	OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL	Paul Walmsley	1	-0/+12
2009-06-20	OMAP3: Add support for DPLL3 divisor values higher than 2	Tero Kristo	1	-3/+5
2009-06-20	OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers	Paul Walmsley	1	-15/+38
2009-06-20	OMAP3 SRAM: add more comments on the SRAM code	Paul Walmsley	1	-21/+24
2009-06-20	OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change	Paul Walmsley	1	-1/+7
2009-06-20	OMAP3 clock: add a short delay when lowering CORE clk rate	Paul Walmsley	1	-11/+9
2009-06-20	OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize	Paul Walmsley	1	-3/+0
2009-05-13	OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHz	Paul Walmsley	1	-6/+7
2009-05-13	OMAP3 SRAM: renumber registers to make space for argument passing	Paul Walmsley	1	-57/+57
2009-05-13	OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change	Paul Walmsley	1	-3/+4
2009-05-13	OMAP3 clock: add interconnect barriers to CORE DPLL M2 change	Paul Walmsley	1	-3/+6
2009-05-13	OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll	Paul Walmsley	1	-2/+2
2008-10-09	ARM: OMAP3: Add minimal omap3430 support	Syed Mohammed, Khasim	1	-0/+179