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2019-06-25Merge tag 'qcom-dts-for-5.3' of ↵Olof Johansson3-5/+293
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm Device Tree Changes for v5.3 * Add display support to MSM8974 * Add display, backlight, and touchscreen support to MSM8974 Hammerhead * Update coresight bindings for MSM8974 and APQ8064 * tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: msm8974-hammerhead: add support for display ARM: dts: msm8974: add display support ARM: dts: qcom: msm8974-hammerhead: add support for backlight ARM: dts: qcom: msm8974-hammerhead: add touchscreen support ARM: dts: qcom-msm8974: Update coresight DT bindings ARM: dts: qcom-apq8064: Update coresight DT bindings Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'hisi-arm32-dt-for-5.3' of git://github.com/hisilicon/linux-hisi ↵Olof Johansson1-9/+9
into arm/dt ARM: DT: Hisilicon ARM32 SoCs updates for v5.3 - Updated CoreSight funnel and replicator using new bindings to fix warning for the hip04. * tag 'hisi-arm32-dt-for-5.3' of git://github.com/hisilicon/linux-hisi: ARM: dts: hip04: Update coresight DT bindings Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'imx-fixes-5.2-3' of ↵Olof Johansson1-4/+4
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.2, round 3: - A recent testing by Sébastien discovers that the PWM interrupts of i.MX6UL were wrongly coded in device tree. It's a fix for it. * tag 'imx-fixes-5.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6ul: fix PWM[1-4] interrupts Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'amlogic-fixes' of ↵Olof Johansson2-9/+7
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/fixes ARM: dts: Amlogic fixes for v5.2-rc - fix GPU interrupts and operating voltage * tag 'amlogic-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: fix the operating voltage of the Mali GPU ARM: dts: meson8b: drop undocumented property from the Mali GPU node ARM: dts: meson8: fix GPU interrupts and drop an undocumented property Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'arm-soc/for-5.3/devicetree-v2' of ↵Olof Johansson64-152/+104
https://github.com/Broadcom/stblinux into arm/dt This pull request contain Broadcom ARM-based SoCs Device Tree changes for 5.3 please pull the following: - Lukas enables DMA support for the BCM2835 (Raspberry Pi) SPI controller - Florian fixes a number of dtc W=1 warnings in the Broadcom DTS files and provides a fix for devices failing to boot after the removal of skelton.dtsi (that commit has been submitted as a separate fix) * tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: Fix most DTC W=1 warnings ARM: dts: NSP: Fix the bulk of W=1 DTC warnings ARM: dts: BCM63xx: Fix DTC W=1 warnings ARM: dts: BCM53573: Fix DTC W=1 warnings ARM: dts: bcm-mobile: Fix most DTC W=1 warnings ARM: dts: Cygnus: Fix most DTC W=1 warnings ARM: dts: Fix BCM7445 DTC warnings ARM: bcm283x: Enable DMA support for SPI controller ARM: dts: bcm: Add missing device_type = "memory" property Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-24ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4Krzysztof Kozlowski10-0/+114
Add nodes for GPU (Mali 400) to Exynos4210 and Exynos4412. Describe the GPU as much as possible however still few elements are missing: 1. Exynos4210 bus clock is not described in hardware manual therefore the IP gate clock was provided, 2. Exynos4412: Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused), 3. Regulator supplies on Trats board. Limited testing on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Add GPU/Mali 400 node to Exynos3250Krzysztof Kozlowski4-0/+48
Add nodes for GPU (Mali 400) to Exynos3250. This is still limited and not tested: 1. No dynamic voltage and frequency scaling, 2. Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Use proper regulator for eMMC memory on Arndale OctaKrzysztof Kozlowski1-1/+1
The eMMC memory is supplied by LDO18 (PVDD_EMMC_1V8) and buck10 (PVDD_EMMCF_2V8), not by LDO10. The LDO10 (PVDD_PRE_1V8) supplies instead VDDP_MMC pin of eMMC host interface and it is already marked as always on. This change only properly models the hardware and reflects in usage of regulators. There is no functional change because: 1. LDO18 cannot be turned off (e.g. by lack of consumers) because in off mode it is controlled by LDO18EN pin, which is pulled up by always-on regulator LDO2 (PVDD_APIO_1V8). 2. LDO10 is marked as always on so removing its consumer will not have effect. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Add regulator suspend configuration to Odroid XU3/XU4/HC1 ↵Krzysztof Kozlowski1-0/+96
family Add the PMIC regulator suspend configuration to entire Odroid XU3/XU4/HC1 family of boards to reduce power usage during suspend. The configuration is based on vendor (Hardkernel) reference kernel with additional buck9 suspend configuration (for USB hub suspend and proper reset). Energy consumption measurements from Marek Szyprowski during suspend to RAM: - all at 5 V power supply, - before: next-20190620, - after: next-20190620 + this patch + suspend configuration for s2mps11 regulator driver, Board | before [mA] | after [mA] | Odroid HC1 | 120 | 7-10 | Odroid XU4, sdcard | 88 | 6-9 | Odroid XU4, eMMC | 100 | 6-9 | Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
2019-06-24ARM: dts: exynos: Add regulator suspend configuration to Arndale Octa boardKrzysztof Kozlowski1-0/+80
Add the PMIC regulator suspend configuration to Arndale Octa board to reduce power usage during suspend and keep necessary regulators on. The configuration is based on vendor (Insignal) reference kernel and the board datasheet. Comparing to vendor kernel, additionally turn off in suspend all regulators controlled by external pin (LDO3, LDO7, LDO18 and buck10). This is purely for hardware description because board does not support Suspend to RAM and the S2MPS11 driver does not support "regulator-on-in-suspend" property. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Disable unused buck10 regulator on Odroid HC1 boardKrzysztof Kozlowski2-2/+6
The eMMC memory on Odroid XU3/XU4 boards is supplied by two regulators LDO18 and buck10 (and LDO13 for the host interface). However the Odroid HC1 board does not have eMMC connector so this regulator does not have to be always on. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: imx7ulp-evk: enable USBOTG1 supportPeter Chen1-0/+35
Enable USBOTG1 support for evk board, it is dual-role function port. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx7ulp: add imx7ulp USBOTG1 supportPeter Chen1-0/+28
Add imx7ulp USBOTG1 support. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM SupportMichael Grzeschik3-0/+442
The patch adds the following interfaces according the SMARC Spec 1.1 [1] and provided schematics: - SMARC SPI0/1 Note: Since Kontron still uses silicon revisions below 1.3 they have add a spi-nor to implement Workaround #1 of erratum ERR006282. - SMARC SDIO - SMARC LCD - SMARC HDMI - SMARC Management pins Note: Kontron don't route all of these pins to the i.MX6, some are routed to the SoM CPLD. - SMARC GPIO - SMARC CSI Camera Note: As specified in [1] the data lanes are shared to cover the csi and the parallel case. The case depends on the baseboard so muxing the data lanes is not part of this patch. - SMARC I2S - SMARC Watchdog Note: The watchdog output pin is routed to the CPLD and the SMARC header. The CPLD performs a reset after a 30s timeout so we need to enable the watchdog per default. - SMARC module eeprom Due to the lack of hardware not all of these interfaces are tesetd. [1] https://sget.org/standards/smarc Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx6ul: fix PWM[1-4] interruptsSébastien Szymanski1-4/+4
According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt summary", the interrupts for the PWM[1-4] go from 83 to 86. Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes") Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: pxa300-raumfeld-speaker-one: add channel output mapping for STA320Daniel Mack1-0/+3
These settings are needed to make the hardware operable. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-common: fix comments in gpio_keys pinctrl nodeDaniel Mack1-3/+3
Careless oversight. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-controller: add pinctrl for charger pinsDaniel Mack1-0/+10
The PEN2 line needs to be pulled up for the charger to enter high-current mode. Do this with a static pull on the GPIO. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-controller: fix 'dock detect' GPIO keyDaniel Mack1-1/+10
The dock detection input key is active low. Also add a pinmux for it. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa3xx: dts: Add defines for pinctrl-single,bias-pull{up,down}Daniel Mack1-0/+8
This allows users of the pinctrl driver to specify either pinctrl-single,bias-pullup = MPF_PULL_UP; or pinctrl-single,bias-pulldown = MPF_PULL_DOWN; To activate the pull bits in the MFP registers. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i modulePriit Laes1-0/+421
SMARC-sAMX6i is a SMARC (Smart Mobility Architecture) compliant module. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-23ARM: dts: BCM5301X: Fix most DTC W=1 warningsFlorian Fainelli28-84/+30
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: dts: NSP: Fix the bulk of W=1 DTC warningsFlorian Fainelli9-14/+11
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: dts: BCM63xx: Fix DTC W=1 warningsFlorian Fainelli2-7/+4
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: dts: BCM53573: Fix DTC W=1 warningsFlorian Fainelli5-13/+5
Fix the the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property warnings. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: dts: bcm-mobile: Fix most DTC W=1 warningsFlorian Fainelli6-18/+18
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: dts: Cygnus: Fix most DTC W=1 warningsFlorian Fainelli3-11/+9
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: dts: Fix BCM7445 DTC warningsFlorian Fainelli2-5/+5
Fixes a number of unit_address_vs_reg warnings: DTC arch/arm/boot/dts/bcm7445-bcm97445svmb.dtb arch/arm/boot/dts/bcm7445.dtsi:66.6-225.4: Warning (unit_address_vs_reg): /rdb: node has a reg or ranges property, but no unit name arch/arm/boot/dts/bcm7445.dtsi:227.21-298.4: Warning (unit_address_vs_reg): /memory_controllers: node has a reg or ranges property, but no unit name arch/arm/boot/dts/bcm7445-bcm97445svmb.dts:9.9-14.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name arch/arm/boot/dts/bcm7445.dtsi:255.10-275.5: Warning (simple_bus_reg): /memory_controllers/memc@1: simple-bus unit address format error, expected "80000" arch/arm/boot/dts/bcm7445.dtsi:277.10-297.5: Warning (simple_bus_reg): /memory_controllers/memc@2: simple-bus unit address format error, expected "100000" Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-23ARM: bcm283x: Enable DMA support for SPI controllerLukas Wunner1-0/+2
Without this, the driver for the BCM2835 SPI controller uses interrupt mode instead of DMA mode, incurring a significant performance penalty. The Foundation's device tree has had these attributes for years, but for some reason they were never upstreamed. They were originally contributed by Noralf Trønnes and Martin Sperl: https://github.com/raspberrypi/linux/commit/25f3e064afc8 https://github.com/raspberrypi/linux/commit/e0edb52b47e6 The DREQ numbers 6 and 7 are documented in section 4.2.1.3 of: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Noralf Trønnes <noralf@tronnes.org>
2019-06-21Merge tag 'spdx-5.2-rc6' of ↵Linus Torvalds239-994/+239
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx Pull still more SPDX updates from Greg KH: "Another round of SPDX updates for 5.2-rc6 Here is what I am guessing is going to be the last "big" SPDX update for 5.2. It contains all of the remaining GPLv2 and GPLv2+ updates that were "easy" to determine by pattern matching. The ones after this are going to be a bit more difficult and the people on the spdx list will be discussing them on a case-by-case basis now. Another 5000+ files are fixed up, so our overall totals are: Files checked: 64545 Files with SPDX: 45529 Compared to the 5.1 kernel which was: Files checked: 63848 Files with SPDX: 22576 This is a huge improvement. Also, we deleted another 20000 lines of boilerplate license crud, always nice to see in a diffstat" * tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (65 commits) treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 507 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 506 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 505 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 504 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 503 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 502 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 501 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 498 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 497 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 496 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 495 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 491 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 490 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 489 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 488 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 487 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 486 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 485 ...
2019-06-21ARM: dts: exynos: Fix language typo and indentationKrzysztof Kozlowski1-4/+4
Correct language typo and wrong indentation. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-21ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boardsChristophe Roullier2-2/+2
On disco and eval board, Tx and Rx delay are applied (pull-up of 4.7k put on VDD) so which correspond to RGMII-ID mode with internal RX and TX delays provided by the PHY, the MAC should not add the RX or TX delays in this case Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157AManivannan Sadhasivam2-0/+322
Add devicetree support for Avenger96 board based on STM32MP157A MPU from ST Micro. This board is one of the 96Boards Consumer Edition board from Arrow Electronics and has the following features: SoC: STM32MP157AAC PMIC: STPMIC1A RAM: 1024 Mbyte @ 533MHz Storage: eMMC v4.51: 8 Gbyte microSD Socket: UHS-1 v3.01 Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac Bluetooth®v4.2 (BR/EDR/BLE) USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4 LED: 4x User LED, 1x WiFi LED, 1x BT LED More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157Manivannan Sadhasivam1-0/+75
Add missing pinctrl definitions for STM32MP157 MPU. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: add sai id registers to stm32mp157cOlivier Moysan1-4/+4
Add identification registers to address range of SAI DT parent node, for stm32mp157c. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: add power supply of rm68200 on stm32mp157c-ev1Yannick Fertré1-0/+1
This patch adds a new property (power-supply) to panel rm68200 (raydium) on stm32mp157c-ev1. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: r8a7792: Add CMT0 and CMT1 to r8a7792Magnus Damm1-0/+34
Add CMT0 and CMT1 to the R-Car Gen2 V2H (r8a7792) SoC. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-21ARM: dts: iwg23s-sbc: Fix SDHI2 VccQ regulatorFabrizio Castro1-1/+1
SDR50 isn't working anymore because the GPIO regulator driver is using descriptors since commit d6cd33ad7102 ("regulator: gpio: Convert to use descriptors") which in turn causes the system to use the polarity of the GPIOs (as specified in the DT) for selecting the states, but the polarity specified in the DT is wrong. This patch fixes the regulator DT definition, and that fixes SDR50. Fixes: 9eb36b945b5c ("ARM: dts: iwg23s-sbc: Add uSD and eMMC support") Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-21ARM: dts: iwg20d-q7-common: Fix SDHI1 VccQ regularorFabrizio Castro1-1/+1
SDR50 isn't working anymore because the GPIO regulator driver is using descriptors since commit d6cd33ad7102 ("regulator: gpio: Convert to use descriptors") which in turn causes the system to use the polarity of the GPIOs (as specified in the DT) for selecting the states, but the polarity specified in the DT is wrong. This patch fixes the regulator DT definition, and that fixes SDR50. Fixes: 029efb3a03c5 ("ARM: dts: iwg20d-q7: Add SDHI1 support") Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-21ARM: dts: rza2mevb: Add input switchChris Brandt1-0/+20
Add support for input switch SW3 on the Renesas RZ/A2M EVB development board. Note that this uses the IRQ interrupt, as the RZ/A2 GPIO controller does not include interrupt support Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-21ARM: dts: r7s9210: Add IRQC device nodeChris Brandt1-0/+19
Enable support for the IRQC on RZ/A2M, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-21ARM: dts: rza2mevb: sort nodes of rza2mevb boardYoshihiro Kaneko1-52/+52
This patch sorts the nodes of arch/arm/boot/dts/r7s9210-rza2mevb.dts. * Sort subnodes of root ("/") node alphabetically * Sort following top-level nodes alphabetically * Sort subnodes of pinctrl alphabetically Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> [simon: rebase and sort new ehci nodes] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-21ARM: dts: renesas: Use ip=on for bootargsMagnus Damm20-20/+20
Convert bootargs from ip=dhcp to ip=on Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-20ARM: dts: meson: switch to the generic Ethernet PHY reset bindingsMartin Blumenstingl4-16/+19
The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace snps,reset-gpio from the &ethmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property. snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell. Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - RTL8211F PHY on the Odroid-C1 and MXIII-Plus needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register"). The old settings used 10ms for assert and 1000ms for deassert. - IP101GR PHY on the EC-100 and MXQ needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a 10ms deassert delay as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms")). The old settings used 10ms for assert and 1000ms for deassert. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-06-20ARM: dts: aspeed: Enable video engine on romulus and wtherspoonEddie James2-0/+24
Enable the video engine and add it's optional reserved memory region. Use 32MB for the reserved memory since the video engine could need up to two 1920x1200@32bpp source buffers. Source buffers: 2 * 1920 * 1200 * 4 = 18432000 bytes In addition, the V4L2 subsystem will allocate any number of compression buffers, each at most 1/8th the size of the source buffer. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-06-20ARM: dts: aspeed: Add Inspur fp5280g2 BMC machineJohn Wang2-0/+847
The fp5280g2 is an OpenPower server platform with an ASPEED AST2500 BMC. Signed-off-by: John Wang <wangzqbj@inspur.com> Reviewed-by: Lei YU <mine260309@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-06-19ARM: dts: exynos: Add PMU interrupt affinity to Exynos4 boardsKrzysztof Kozlowski3-1/+9
Move SoC-specific PMU properties from exynos4.dtsi to respective SoC (4210 or 4412) so common DTSI would have only common properties. Define there also interrupt affinity to remove the boot warning message: hw perfevents: no interrupt-affinity property for /pmu, guessing. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-19ARM: dts: exynos: Add flash support to Galaxy S3 boardsSimon Shields1-0/+32
The Galaxy S3 boards use an aat1290 to control the flash LED. Add the relevant device tree configuration to use it. Signed-off-by: Simon Shields <simon@lineageos.org> Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org> [rebase] Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-19Merge tag 'socfpga_dts_updates_for_v5.3' of ↵Olof Johansson2-10/+30
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.3 - Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on Arria10/Stratix10 - Add the ltc2497 i2c entry on the Arria10 devkit - Add the EMAC OCP reset property on the Arria10 * tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: arria10: Add EMAC OCP reset property ARM: dts: socfpga: add ltc2497 on arria10 devkit arm64: dts: stratix10: use the "altr,socfpga-stmmac-a10-s10" binding ARM: dts: socfpga: use the "altr,socfpga-stmmac-a10-s10" binding Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19ARM: dts: hip04: Update coresight DT bindingsLeo Yan1-9/+9
CoreSight DT bindings have been updated, thus the old compatible strings are obsolete and the drivers will report warning if DTS uses these obsolete strings. This patch switches to the new bindings for CoreSight dynamic funnel and static replicator, so can dismiss warning during initialisation. Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-14 12:23:16 +0300