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path: root/arch/arm/boot/dts/ls1021a-twr.dts
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2016-09-08ARM: dts: ls1021a: Add of_graph dt nodes to describe the panelMeng Yi1-1/+12
add of_graph dt nodes to describe the panel, and removed "fsl,panel" property Signed-off-by: Meng Yi <meng.yi@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-12-22ARM: dts: ls1021a: add sata node to dtsTang Yuantian1-0/+4
Added sata node to ls1021aqds and ls1021atwr board to support sata function. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-12-22ARM: dts: ls1021a: Add a TFT LCD panel.Meng Yi1-0/+9
Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by: Meng Yi <b56799@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19ARM: dts: Add node for ina220 on LS1021ATWRYuan Yao1-0/+13
The INA220 monitors both shunt drop and supply voltage. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWRClaudiu Manoil1-0/+20
This enables the available eTSEC ethernet ports for the ls1021aqds and ls1021atwr boards. For the QDS, SGMII connections (via riser cards) are assumed for the eTSEC0 and eTSEC1 ports as default configuration. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11ARM: dts: ls1021a: Add dts nodes for audio on LS1021AAlison Wang1-0/+61
This patch adds dts nodes for audio on LS1021A. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2014-11-23ARM: dts: Add initial LS1021A TWR board dts supportJingchang Lu1-0/+127
The LS1021A TWR is a low cost, high-performance evaluation, development and test platform supporting the LS1021A processor. It is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. For more detail information about the LS1021A TWR board, please refer to LS1021A QorIQ Tower System Reference Manual. Signed-off-by: Chao Fu <B44548@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>