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2018-02-28ARM: dts: bcm283x: Move arm-pmu out of soc nodeStefan Wahren1-3/+3
The ARM PMU doesn't have a reg address, so fix the following DTC warning (requires W=1): Node /soc/arm-pmu missing or empty reg/ranges property Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-05-16ARM: dts: bcm283x: Add CPU thermal zone with 1 trip pointStefan Wahren1-0/+4
As suggested by Eduardo Valentin this adds the thermal zone for the bcm2835 SoC with its single thermal sensor. We start with the criticial trip point and leave the cooling devices empty since we don't have any at the moment. Since the coefficients could vary depending on the SoC we need to define them separate. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Eduardo Valentin <edubezval@gmail.com>
2016-11-11ARM: bcm2835: dts: add thermal node to device-tree of bcm283xMartin Sperl1-0/+6
Add the node for the thermal sensor of the bcm2835-soc to the device tree. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Changelog: V1 -> V5: generic settings is shared in bcm283x.dtsi, but disabled moved the compatible string to the SOC specific dtsi for arm and arm64 V5 -> V6: fix remove 0x prefix from thermal@0x7e212000 Note: there is no arm/boot/dts/bcm2837.dtsi as of now, so the 32-bit rpi3 dt is not modified. Signed-off-by: Eric Anholt <eric@anholt.net>
2016-04-20ARM: bcm2835: add CPU node for ARM coreStefan Wahren1-0/+11
This patch adds the CPU node of the BCM2835 into the DT. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Eric Anholt <eric@anholt.net>
2015-12-31ARM: bcm2835: Split the DT for peripherals from the DT for the CPUEric Anholt1-193/+1
The set of peripherals remained constant across bcm2835 (Raspberry Pi 1) and bcm2836 (Raspberry Pi 2), but the CPU was swapped out. Split the files so that we can include just peripheral setup in 2836. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23ARM: bcm2835: Add the DDC I2C controller to the device tree.Eric Anholt1-0/+10
We need to use it for getting video modes over HDMI. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-10-23ARM: bcm2835: Switch to using the new clock driver support.Eric Anholt1-24/+28
This will give us the ability to set the pixel and HDMI state machine clocks for the VC4 KMS driver, change the CPU frequency, and potentially gate clocks in the future (once we also write a power domain driver). It also gives the uart an explicit clock reference, so that we don't need to change the physical addresses of the old fixed clk_bcm2835.c clocks for Raspberry Pi 2 port. Two clocks get their frequencies updated as a result of this. One is uart's apb_pclk, which was previously accidentally grabbing the fixed uart0_pclk due to the apb_pclk not having clk_register_clkdev() called. The uart doesn't seem to do anything with apb_pclk other than make sure it's on, so that appears safe (also, as far as I can see, the apb clock is actually the same as the VPU clock). The other is EMMC, which according to the docs was supposed to be in the 50-100Mhz range, but it turns out the firmware needed to change to running it at the 250Mhz core clock speed to avoid a bug in clock domain crossing. Additionally, anything using BCM2835_CLOCK_VPU will now have a correct clock rate if the user configures the boot-time core clock speed using config.txt. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-10-15ARM: bcm2835: add label for uart0Stefan Wahren1-1/+1
This patch adds a label for uart0 to allow changing of uart0 pins. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2015-05-14ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.Eric Anholt1-0/+1
There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top 2 bits. The bits in the bus address mean: From the VideoCore processor: 0x0... L1 and L2 cache allocating and coherent 0x4... L1 non-allocating, but coherent. L2 allocating and coherent 0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent From the GPU peripherals (note: all peripherals bypass the L1 cache. The ARM will see this view once through the VC MMU): 0x0... Do not use 0x4... L1 non-allocating, and incoherent. L2 allocating and coherent. 0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent 0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent The 2835 firmware always configures the MMU to turn ARM physical addresses with 0x0 top bits to 0x4, meaning present in L2 but incoherent with L1. However, any bus addresses we were generating in the kernel to be passed to a device had 0x0 bits. That would be a reserved (possibly totally incoherent) value if sent to a GPU peripheral like USB, or L1 allocating if sent to the VC (like a firmware property request). By setting dma-ranges, all of the devices below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and friends return addresses with 0x4 bits and avoid cache incoherency. This matches the behavior in the downstream 2708 kernel (see BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h). Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Add the mailbox to the device treeEric Anholt1-0/+7
Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Fix i2c0 node nameBaruch Siach1-1/+1
Device tree node names should contain the node's reg property address value. The i2c0 node was apparently forgotten in commit 25b2f1bd0b7e0 (ARM: bcm2835: node name unit address cleanup). Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-05-14ARM: bcm2835: dt: Use pinctrl headerStefan Wahren1-1/+2
This patch converts all bcm2835 dts and dtsi files to use the pinctrl header file. Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-09-26ARM: bcm2835: add I2S pinctrl to device treeMark Brown1-0/+1
Signed-off-by: Florian Meier <florian.meier@koalo.de> [Tweaked slightly to disable by default -- broonie] Signed-off-by: Mark Brown <broonie@linaro.org> [swarren, removed duplicate i2s node] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-02-25ARM: bcm2835: fix clock DT node namesStephen Warren1-3/+6
DT nodes should be named according to the type of object that they represent rather than the identity. DT nodes that contain a reg property should include a unit address in their name. Fix these issues. Add clock-output-names properties to the nodes so that the clocks get named something meaningful. This works around the fact that the fixed clock driver names clocks after the short node name, i.e. not including the unit address. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-02-21ARM: bcm2835: node name unit address cleanupStephen Warren1-10/+10
DT nodes that contain a reg property should include a unit address in their name. Add the missing unit addresses. The unit address in a node name must match the value in the reg property. Fix the cases where they don't match. Don't fix the /clocks/* node names yet; that causes problems the clock driver to attempt to register multiple clocks with the same name, which fails. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-02-12ARM: bcm2835: fix DT node sort orderStephen Warren1-16/+16
Re-order all the DT nodes so that they're ordered by their reg address. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-02-12ARM: bcm2835: add I2S driver to device treeFlorian Meier1-0/+10
This adds the definitions for the BCM2835 I2S driver to the device tree. Some GPIO settings are needed for the correct pin functions. Signed-off-by: Florian Meier <florian.meier@koalo.de> [swarren: fixed DT node sort order, simplified DT label name, removed RPI .dts file changs, since use of I2S is a user-added option.] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-02-12ARM: bcm2835: add dmaengine driver to device treeFlorian Meier1-0/+21
This adds the definitions for the BCM2835 dmaengine driver to the device tree. The dma-channel-mask is currently fixed. Later it should be set via the firmware. Signed-off-by: Florian Meier <florian.meier@koalo.de> [swarren, fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-02-12ARM: bcm2835: perf_event support for Raspberry-PiVince Weaver1-0/+4
The following patch enables performance counter support on Raspberry-Pi. We have this working on the 2708 based rasp-pi kernels by manually putting the device registration in the platform files. This change does things properly in a device tree. The boot messages look proper, but my rasp-pi hangs somewhere in USB enabling when running a stock 3.13-rc6 kernel so I have been unable to fully test this change. I also understand that the rasp-pi 1176 pmu support is missing the overflow interrupt. I'm not sure if that's true of all 2835 implementations. If not, then this patch will need to be changed a bit. Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> [swarren, fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-01-03ARM: bcm2835: add USB controller to device treeStephen Warren1-0/+6
The BCM2835 SoC contains a DWC2 USB controller. Add this to the DT. Set up the pin controller to fully enable the USB controller on the Raspberry Pi. The GPIO setup works because the default output value for GPIO 6 (LAN_RUN/n_reset) just happens to be 1, which enables the USB/LAN chip. Note that you'll need a U-Boot which enables power to the USB controller; search for U-Boot patch "ARM: rpi_b: power on SDHCI and USB HW modules". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-11-26ARM: bcm2835: add missing #xxx-cells to I2C nodesStephen Warren1-0/+4
The I2C controller node needs #address-cells and #size-cells properties, but these are currently missing. Add them. This allows child nodes to be parsed correctly. Cc: stable@vger.kernel.org Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-02ARM: bcm2835: override the HW UART periphidJongsung Kim1-0/+1
Stephen Warren reported the recent commit 78506f2 (add support for extended FIFO-size of PL011-r1p5) breaks the serial port on the BCM2835 ARM SoC. A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs. The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for this compatibility issue, this patch overrides the HW UART periphid register values with the actually compatible UART periphid 0x00241011 (r1p3 or r1p4). Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jongsung Kim <neidhard.kim@lge.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-08Merge tag 'bcm2835-for-3.10-dt' of ↵Arnd Bergmann1-0/+22
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt From Stephen Warren <swarren@wwwdotorg.org>: ARM: bcm2835: device tree updates This branch adds two devices to the BCM2835 SoC device tree: the SPI controller and the HW random number generator. The SPI controller isn't actually instantiated in the Raspberry Pi device tree, since there are no on-board SPI devices; it's up to the end-user to modify their own device-tree to describe whatever they have attached. * tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi: ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree ARM: bcm2835: add SPI device to DT Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-03ARM: bcm2835: add Broadcom BCM2835 RNG to the device treeLubomir Rintel1-0/+5
This adds a device tree binding for random number generator present on Broadcom BCM2835 SoC, used in Raspberry Pi and Roku 2 devices. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-03-12ARM: bcm2835: add SPI device to DTStephen Warren1-0/+17
The BCM2835 has a single instance of the "SPI0"-type SPI master controller. Instantiate it in the SoC .dtsi file, Don't enable it in the Raspberry Pi board .dts file, since we have no idea what is actually connected, and hence no idea what to set the bus clock rate to. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-03-05ARM: bcm2835: fix I2C module clock rateStephen Warren1-1/+1
BCM2835-ARM-Peripherals.pdf states that the I2C module's input clock is nominally 150MHz, and that value is currently reflected in bcm2835.dtsi. However, practical measurements show that the rate is actually 250MHz, and this agrees with various downstream kernels. Switch the I2C clock's frequency to 250MHz so that the generated bus clock rate is accurate. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-15ARM: bcm2835: fix clock node aliasing in device treeStephen Warren1-9/+17
Both clock nodes in the current device tree are named "clock" and hence end up being the same node. Rename the nodes to different names to avoid this. In fact, fixed-clock uses the node name as the clock name, so name the nodes after the clock they represent. Move the clocks into a "clocks" sub-node to group them and avoid any possible naming conflicts with other nodes also named after the device type. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-15ARM: bcm2835: add I2C controllers to DTStephen Warren1-0/+22
The BCM2835 has 3 identical I2C controllers. Instantiate them all in the SoC .dtsi file, and enable the relevant two in the Raspberry Pi board .dts file. Note that on the Raspberry Pi Model B revision 1, I2C0 is connected to the general-purpose expansion header, and I2C1 is connected to the camera connector. Revision 2 of the board swaps these assignments:-( Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-15ARM: bcm2835: add SDHCI node to DTStephen Warren1-0/+14
Add the SDHCI device node to the SoC DT file. Add a dummy fixed-clock to satisfy the SDHCI driver's clock lookup; eventually this should be replaced by a real clock implementation. Add board specific properties to the Raspberry Pi board file. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-10-26ARM: bcm2835: enable GPIO/pinctrlStephen Warren1-0/+23
Enable GPIO and pinctrl in Kconfig. Add required <mach/gpio.h> for gpiolib. Instantiate the BCM2835 GPIO module in bcm2835.dtsi. Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the board's required pinmux configuration. GPIO aren't specified; that's left to gpio_request(). Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-26ARM: bcm2835: implement machine restart hookStephen Warren1-0/+5
Implement the machine restart hook using the SoC's watchdog timer module. To support this, define a DT binding for the watchdog module, and add it to the device tree. The downstream rpi-split branch contains a full watchdog timer driver implementation, which also implements the restart hook. However, the restart function is largely separate from the watchdog driver, so for simplicity, the restart hook is implemented here directly in the main machine source file. Overall structure (separate setup/restart) functions derived from the picoxcell ARM support. Watchdog register IO sequence taken from code by Simon Arlott. Note that the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-09-20ARM: bcm2835: instantiate console UARTSimon Arlott1-1/+8
This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Modified UART DT node to use a unit-address to create unique UART node names, rather than using non-type names "uart0" and "uart1". Note that UART 1 (the Broadcom "mini UART") is not yet present, but I'm naming the DT node in anticipation that it will be added. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-20ARM: bcm2835: add system timerSimon Arlott1-0/+7
The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values, and generates an interrupt. Timer 3 is used as the Linux timer. The BCM2835 also contains an SP804-based timer module. However, it apparently has significant differences from the standard SP804 IP block, and Broadcom's documentation recommends using the system timer instead. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved to drivers/clocksource/. This looks like the desired location for such code now. * Added DT binding docs. * Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more. * Simplified bcm2835_time_init() to find one matching node and operate on it, rather than looping over all matching nodes. This seems more consistent with other clocksource code. * Simplified bcm2835_time_init() using of_iomap(). * Renamed struct bcm2835_timer.index to match_mask to better represent its purpose. * s/printk(PR_INFO/pr_info(/ Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-20ARM: bcm2835: add interrupt controller driverSimon Arlott1-0/+8
The BCM2835 contains a custom interrupt controller, which supports 72 interrupt sources using a 2-level register scheme. The interrupt controller, or the HW block containing it, is referred to occasionally as "armctrl" in the SoC documentation, hence the symbol naming in the code. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved implementation to drivers/irchip/. * Added devicetree documentation, and hence removed list of IRQs from bcm2835.dtsi. * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce the size of the hwirq space, and pass the total size of the hwirq space to irq_domain_add_linear(), rather than just the number of valid hwirqs; the two are different due to the hwirq space being sparse. * Added the interrupt controller DT node to the top-level of the DT, rather than nesting it inside a /axi node. Hence, changed the reg value since /axi had a ranges property. This seems simpler to me, but I'm not sure if everyone will like this change or not. * Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence removing the need to patch include/linux/irqdomain.h or kernel/irq/irqdomain.c. * Simplified armctrl_of_init() using of_iomap(). * Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros. * Renamed armctrl_handle_irq() to prevent possible symbol clashes. * Made armctrl_of_init() static. * Removed comment "Each bank is registered as a separate interrupt controller" since this is no longer true. * Removed FSF address from license header. * Added my name to copyright header. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-20ARM: add infra-structure for BCM2835 and Raspberry PiSimon Arlott1-0/+17
The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>