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2018-12-03drm/i915/icl: Allocate DSI encoder/connectorMadhav Chauhan1-8/+109
2018-12-03drm/i915/icl: Calculate DPLL params for DSIMadhav Chauhan2-2/+5
2018-12-03drm/i915/icl: Sanitize DDI port clock gating for DSI portsImre Deak2-17/+53
2018-12-03drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooksJani Nikula3-62/+34
2018-12-03drm/i915/selftests: Terminate hangcheck sanitycheck forciblyChris Wilson1-3/+9
2018-12-03drm/i915/ringbuffer: Clear semaphore sync registers on ring initChris Wilson1-0/+7
2018-11-30drm/i915/psr: Get pipe id following atomic guidelinesJosé Roberto de Souza2-15/+5
2018-11-30drm/i915/selftests: Fix live_workarounds to actually do resetsTvrtko Ursulin1-12/+53
2018-11-30drm/i915/selftests: Extract spinner codeTvrtko Ursulin4-250/+290
2018-11-30drm/i915/icl: Remove Wa_1604302699Tvrtko Ursulin1-5/+0
2018-11-30drm/i915: Remove whitelist application from ringbuffer backendTvrtko Ursulin1-2/+0
2018-11-30drm/i915: Fixup stub definitions for intel_opregion_suspend|resumeChris Wilson1-3/+3
2018-11-29drm/i915/fec: Disable FEC state.Anusha Srivatsa1-4/+24
2018-11-29i915/dp/fec: Configure the Forward Error Correction bits.Anusha Srivatsa2-0/+25
2018-11-29drm/i915/fec: Set FEC_READY in FEC_CONFIGURATIONAnusha Srivatsa1-0/+11
2018-11-29i915/dp/fec: Add fec_enable to the crtc state.Anusha Srivatsa2-5/+26
2018-11-29drm/i915/dsc: Enable and disable appropriate power wells for VDSCManasi Navare3-0/+34
2018-11-29drm/i915/dp: Disable DSC in source by disabling DSS CTL bitsManasi Navare3-0/+34
2018-11-29drm/i915/dp: Configure Display stream splitter registers during DSC enableManasi Navare1-0/+22
2018-11-29drm/i915/dp: Populate DSC PPS SDP and send PPS infoframesManasi Navare1-0/+21
2018-11-29drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPsManasi Navare2-2/+20
2018-11-29drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enablingManasi Navare3-0/+413
2018-11-29drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSIManasi Navare2-1/+4
2018-11-29drm/i915/dp: Enable/Disable DSC in DP SinkGaurav K Singh3-0/+24
2018-11-29drm/i915/dsc: Compute Rate Control parameters for DSCGaurav K Singh1-1/+124
2018-11-29drm/i915/dsc: Define & Compute VESA DSC paramsGaurav K Singh4-1/+469
2018-11-29drm/i915/dp: Do not enable PSR2 if DSC is enabledManasi Navare1-0/+14
2018-11-29drm/i915/dp: Compute DSC pipe config in atomic checkManasi Navare3-25/+172
2018-11-29drm/i915/dp: Add DSC params and DSC config to intel_crtc_stateManasi Navare2-0/+10
2018-11-29drm/i915: Decouple SKL stride units from intel_fb_stride_alignment()Ville Syrjälä1-11/+17
2018-11-29drm/i915: Make sure fb gtt offsets stay within 32bitsVille Syrjälä2-5/+24
2018-11-28drm/i915: Pass the plane to icl_program_input_csc_coeff()Ville Syrjälä1-8/+6
2018-11-28drm/i915: Rename the confusing 'plane_id' to 'color_plane'Ville Syrjälä1-4/+4
2018-11-28drm/i915: Commit skl+ planes in an order that avoids ddb overlapsVille Syrjälä3-18/+93
2018-11-28drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+Ville Syrjälä7-207/+260
2018-11-28drm/i915: Don't pass dev_priv around so muchVille Syrjälä1-14/+13
2018-11-28drm/i915: Clean up skl+ vs. icl+ watermark computationVille Syrjälä1-77/+92
2018-11-28drm/i915: Pass the entire skl_plane_wm to skl_compute_transition_wm()Ville Syrjälä1-9/+7
2018-11-28drm/i915: Remove some useless zeroing on skl+ wm calculationsVille Syrjälä1-12/+4
2018-11-28drm/i915: Fix latency==0 handling for level 0 watermark on skl+Ville Syrjälä1-2/+4
2018-11-28drm/i915: Pass the new crtc_state to ->disable_plane()Ville Syrjälä5-21/+42
2018-11-28drm/i915: Introduce crtc_state->update_planes bitmaskVille Syrjälä4-5/+12
2018-11-28drm/i915: Move single buffered plane register writes to the endVille Syrjälä1-2/+2
2018-11-28drm/i915: Reorganize plane register writes to make them more atomicVille Syrjälä2-62/+86
2018-11-28drm/i915: Mark up early pre-production KabylakesChris Wilson3-17/+1
2018-11-28drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constantsManasi Navare1-0/+3
2018-11-28drm/dsc: Add helpers for DSC picture parameter set infoframesManasi Navare4-1/+262
2018-11-28drm/dsc: Define Rate Control values that do not change over configurationsSrivatsa, Anusha1-0/+6
2018-11-28drm/dsc: Define VESA Display Stream Compression CapabilitiesManasi Navare1-1/+114
2018-11-28drm/dsc: Define Display Stream Compression PPS infoframeManasi Navare1-0/+342
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