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2022-04-29i2c: mux: Add mux deselect support on timeoutArun P. Mohanan2-5/+11
Add support to deselect the mux when there is a timeout. The mux idle_state settings will be configured on startup. In case of MCTP it is MUX_IDLE_DISCONNECT. But when there is a timeout, mux ends up in connected position and the devices behind the mux will appear under different muxes connected to the same bus. This change fix the same. Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com>
2022-04-19i3c: master: dw: Update read transfer lengthIwona Winiarska1-0/+7
Currently, the read transfer length is not updated with the actual number of read bytes, which means that the caller won't have this information and won't be able to distinguish real data obtained during transfer. For every successful read transfer, update its length. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-04-15ARM: configs: Add Intel BMC defconfigIwona Winiarska1-0/+314
Add defconfig that provides configuration for Intel BMC. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-04-15peci: mctp: Add DomainId support for peci-mctpKrzysztof Richert2-23/+55
Get DomainId from peci subsystem message to send message to requested EID. Required EID is taken from aspeed-mctp based on the discovery performed by user-space application. For each particular agent behind master, information about its BDF/DomainId is sufficient to get its EID. Signed-off-by: Krzysztof Richert <krzysztof.richert@intel.com>
2022-04-15soc: aspeed: mctp: Extend internal aspeed-mctp driver APIKrzysztof Richert2-0/+36
New API allows to read DomainId information by internal kernel clients (for example peci-mctp). Signed-off-by: Krzysztof Richert <krzysztof.richert@intel.com>
2022-04-15soc: aspeed: mctp: Add IOCTLs for extended EID informationKrzysztof Richert2-20/+74
For PECI over MCTP purposes, aspeed-mctp driver needs to be extended that allows to set Domain ID information. Signed-off-by: Krzysztof Richert <krzysztof.richert@intel.com>
2022-04-13i3c: hub: core: I3C HUB driver implementationZbigniew Lukwinski3-0/+713
Initial I3C HUB driver implementation. Implementation is able to parse DT entry and configure basic set of registers. Driver is loaded when I3C device with matching DCR is detected on the bus. Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2022-04-13i3c: Add new DCR value for I3C HUBZbigniew Lukwinski1-0/+2
Adding DCR for I3C HUB. Value taken from https://www.mipi.org/MIPI_I3C_device_characteristics_register Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2022-04-13i3c: master: Do not add device for HUBZbigniew Lukwinski1-4/+6
Current implementation tries to add device for each DT entry. In case I3C HUB we do not want add device 'manually', using DT. I3C HUB shall be discovered dynamically. But DT entry for I3C HUB is required. Thus master driver shall not add device for HUB entry in DT. Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2022-04-12i3c: master: dw: Implement I3C target functionsIwona Winiarska1-35/+271
Add support for Synopsys DesignWare I3C Target functionality. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-04-12i3c: Add I3C target supportIwona Winiarska6-7/+326
Extend the existing core implementation with I3C target support. Add missing I3C target driver API. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-04-12dt-bindings: i3c: Add initial-role, pid and dcr propertiesIwona Winiarska1-0/+18
Add initial-role property to allow configuring given I3C device as Primary Controller, Secondary Controller or Target. Add Target Provisioned ID and Device Characteristic Register value properties for I3C Target Device configuration. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-03-31ARM: dts: aspeed: Correct eSPI regiser rangeVikash Chandola1-1/+0
eSPI slave needs only first 0x200 register range. Correct address range to use only required address range. Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-03-31soc: aspeed: pack espi_oob_msg espi_comm_hdrVikash Chandola1-2/+2
Initial bytes of espi_oob_msg espi_comm_hdr should follow the same memory layout since both are used interchangeably. Pack both structures to enforce same layout for both structures. Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-03-31soc: aspeed: Correct mutex trylock checkVikash Chandola1-1/+1
Correct mutex_trylock to proceed if there is no contention otherwise return otherwise EBUSY. Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-03-31i3c: i3cdev: fix module bindingOleksandr Shulzhenko1-0/+1
I3C bus listener should take into account the case when I3C master driver is unbound. Otherwise, on I3C master driver unbind happens the following: Device driver is unbound -> i3cdev is bound -> Master driver is unbound. As a result various device entities (including /dev descriptor) remain in memory. The solution is to detach i3cdev on BUS_NOTIFY_REMOVED_DEVICE as well. Signed-off-by: Oleksandr Shulzhenko <oleksandr.shulzhenko.viktorovych@intel.com>
2022-03-24i3c: mctp: add MCTP I3C driverOleksandr Shulzhenko5-0/+360
The driver was implemented in order to provide userspace with fops functions needed to process MCTP packets over I3C. Signed-off-by: Oleksandr Shulzhenko <oleksandr.shulzhenko.viktorovych@intel.com>
2022-03-23soc: aspeed: Add support for eSPI Virtual WireAnkita Prasad4-1/+123
The Aspeed eSPI controller is a slave device to communicate with the master through the Enhanced Serial Peripheral Interface (eSPI). It supports all eSPI channels including the Virtual Wire that is used to transmit the sideband signal information to/from Management Controller (e.g. BMC). Add support for the Virtual Wire channel. Add IOCTL handler to support reading and writing GPIO value over the Virtual Wire channel. Signed-off-by: Ankita Prasad <ankita.prasad@intel.com>
2022-03-16hwmon: (pmbus) Add Renesas RAA229126 VR driverZhikui Ren3-0/+102
Added pmbus driver for the new device Renesas raa229126 voltage regulator. Signed-off-by: Zhikui Ren <zhikui.ren@intel.com>
2022-03-14ARM: dts: aspeed-g4: Fix compilation errorIwona Winiarska1-1/+0
The last merge commit caused kernel builds to start failing due to property name duplication in arch/arm/boot/dts/aspeed-g4.dtsi Fixes: 875e0c507c6d ("Merge commit '2befcc6bb0bb1e0a4a31391a359adcab3925b6e4' of https://github.com/openbmc/linux into openbmc/linux_5.15.24_bump") Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-03-14dt-bindings: i3c: flexible I3C timingsZbigniew Lukwinski1-0/+15
Description for properties to controls SCL timings added. Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2022-03-14i3c: dw: master: flexible I3C timing controlZbigniew Lukwinski1-10/+361
Enabling mechanism which allows user to control I3C timings with details. It is done over DT. The following options are possible: * 'i3c-od-scl-low-ns' - to control SCL low period I3C Open Drain mode, example: i3c-od-scl-low-ns = <250>; * 'i3c-od-scl-high-ns' - to control SCL high period I3C Open Drain mode, example: i3c-od-scl-high-ns = <40>; * 'i3c-pp-scl-low-ns' - to control SCL low period I3C Push-Pull mode, example: i3c-pp-scl-low-ns = <100>; * 'i3c-pp-scl-high-ns' - to control SCL high period I3C Push-Pull mode, example: i3c-pp-scl-low-ns = <200>; * 'sda-tx-hold-ns' - to control hold time of the transmit data (SDA) with respect to the SCL edge, example: sda-tx-hold-ns = <15>; All values shall be provided in nanoseconds. Driver does necessary validation against limits documented in I3C MIPI specification. Driver also does the calculation in case only low, only high period or none of them are provided. DT SCL clock value parameters ('i2c-scl-hz', 'i3c-scl-hz') are also taken into account during the calculation. For instance if user provides 'i3c-od-scl-low-ns' and 'i2c-scl-hz', driver calculates SCL high period or reports an error if it is not possible. If user provides only 'i2c-scl-hz', driver calculates SCL low and high periods. If user provides all of these parameters, driver does the validation and reports an error in case parameters values does not match. Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2022-03-14i3c: dw: master: revert timing related changesZbigniew Lukwinski1-66/+14
Reverting previous SCL timing configuration which is not in upstream. commit 5562262f4e5d ("Update I3C drivers") Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2022-03-12ARM: dts: aspeed: Enable eSPI OOB channelVikash Chandola1-0/+4
Enable slave eSPI OOB channel in DMA mode. Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-03-12soc: aspeed: Add support for eSPI OOB channelVikash Chandola7-11/+819
Add eSPI OOB channel slave. Add new device file to transact eSPI OOB messages with eSPI master in PCH. Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-03-12soc: aspeed: Refactor aspeed espi slaveVikash Chandola2-96/+334
Move ASPEED_ESPI macro definitions to a aspeed-espi-ctrl header file. Fix the compilation warning: drivers/soc/aspeed/aspeed-espi-slave.c: In function 'aspeed_espi_pltrstn_open': drivers/soc/aspeed/aspeed-espi-slave.c:286:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] 286 | struct aspeed_espi *priv = to_aspeed_espi(filp); | ^~~~~~ Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-03-11Merge commit '2befcc6bb0bb1e0a4a31391a359adcab3925b6e4' of ↵Sujoy Ray3323-19580/+42314
https://github.com/openbmc/linux into openbmc/linux_5.15.24_bump Signed-off-by: Sujoy Ray <sujoy.ray@intel.com>
2022-03-11peci: add domain ID to peci_command() callsJason M. Bills3-0/+7
Since the new struct that includes domain ID will be used within the kernel, calls to peci_command() will use the value provided. This sets domain ID to 0 for all current peci_command() calls. Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
2022-03-11peci: add domain ID support to the PECI commandsJason M. Bills1-43/+120
It's possible that a PECI command can be sent in the old format without a domain ID. This uses the IOCTL size as a message length and compares it to the size of the new struct with the domain ID. If the sizes match, then the domain ID is provided; otherwise, it is set to 0. Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
2022-03-11peci: add domain_id to the PECI command stucturesJason M. Bills1-0/+35
This adds an additional field to the PECI command structures to support passing the domain ID parameter as part of the command. Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
2022-03-11peci: add msg_len to peci_commandJason M. Bills6-20/+20
To support the new domain ID, we need to include an extra byte from userspace. This adds a length to the peci_command function so we can detect when the domain ID is sent from userspace. Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
2022-03-10hwmon: (pmbus) auto detect pmbus fan pwm modeZhikui Ren2-2/+64
PMBus device with fan controls have two possible control modes RPM and PWM. RPM mode is assumed and FANx_TARGET sensor is always created to provide read and write access of fan speed control. PWM only devices have been able to use the FANx_TARGET sensor to read commanded fan speed correctly because the pmbus core driver caches the write value and return it when the TARGET sensor is read. Recent pmbus_core driver change clears the cached value once the write to FANx_TARGET completes. Read FANx_TARGET sensor now reads from actual PMBus register. As a result, RPM mode only device, FANx_TARGET sensor always read 0. Add detection of current fan control mode during pmbus_identify and set flag PMBUS_HAVE_PWM12 and/or PMBUS_HAVE_PWM34 if PWM mode is detected. PWMx and PWMx_ENABLE sensors will be created based on these flags. Fixes: 1ae5aaf5d1c5 ("hwmon: (pmbus) Clear sensor data after chip write" Signed-off-by: Zhikui Ren <zhikui.ren@intel.com>
2022-03-03i3c: master: dw: Set IBI_WITH_DATA based on Target's BCR[2] bitIwona Winiarska1-1/+2
The Active Controller should set the IBI Payload Control to 1 only when the Target device supports the mandatory byte (BCR[2]=1). Otherwise, when the Target device doesn't support MDB (BCR[2]=0), the IBI Payload Control bit should set to 0. Fixes: ee31c3564a25 ("i3c: master: dw: add IBI support") Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-03-02i3c: master: Remove unused variablesIwona Winiarska1-1/+0
drivers/i3c/master.c: In function 'i3c_master_bus_init': drivers/i3c/master.c:1758:32: warning: unused variable 'i3ctmp' [-Wunused-variable] 1758 | struct i3c_dev_desc *i3cdev, *i3ctmp; | ^~~~~~ drivers/i3c/master.c:1758:23: warning: unused variable 'i3cdev' [-Wunused-variable] 1758 | struct i3c_dev_desc *i3cdev, *i3ctmp; | ^~~~~~ Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2022-02-24hwmon: (pmbus) Clear pmbus fault/warning bits after readVikash Chandola1-0/+5
Almost all fault/warning bits in pmbus status registers remain set even after fault/warning condition are removed. As per pmbus specification these faults must be cleared by user. Modify hwmon behavior to clear fault/warning bit after fetching data if fault/warning bit was set. This allows to get fresh data in next read. Signed-off-by: Vikash Chandola <vikash.chandola@linux.intel.com> Link: https://lore.kernel.org/r/20220222131253.2426834-1-vikash.chandola@linux.intel.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> (cherry picked from commit 35f165f08950a876f1b95a61d79c93678fba2fd6)
2022-02-24Revert "hwmon: (pmbus) Clear pmbus fault/warning bits before read"Vikash Chandola1-9/+0
This reverts commit 747840ee70ac06bd8e4ebad5d0c0d25009481644. Better solution was found after conversation at linux-hwmon. Hence reverting original downstream fix in favour of upstream fix. Signed-off-by: Vikash Chandola <vikash.chandola@intel.com>
2022-02-17Merge tag 'v5.15.24' into dev-5.15Joel Stanley510-2184/+4898
This is the 5.15.24 stable release Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-17ARM: dts: aspeed: Add device tree for Quanta S6Q BMCGeorge Hung2-0/+611
The Quanta S6Q is a server platform with AST2600 BMC SoC Signed-off-by: George Hung <george.hung@quantatw.com> Reviewed-by: Alan Kuo <Alan_Kuo@quantatw.com> Link: https://lore.kernel.org/r/20220217031355.46102-1-george.hung@quantatw.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-16Linux 5.15.24Greg Kroah-Hartman1-1/+1
Link: https://lore.kernel.org/r/20220214092506.354292783@linuxfoundation.org Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Shuah Khan <skhan@linuxfoundation.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Fox Chen <foxhlchen@gmail.com> Tested-by: Slade Watkins <slade@sladewatkins.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Tested-by: Bagas Sanjaya <bagasdotme@gmail.com> Tested-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16iommu: Fix potential use-after-free during probeVijayanand Jitta1-2/+7
commit b54240ad494300ff0994c4539a531727874381f4 upstream. Kasan has reported the following use after free on dev->iommu. when a device probe fails and it is in process of freeing dev->iommu in dev_iommu_free function, a deferred_probe_work_func runs in parallel and tries to access dev->iommu->fwspec in of_iommu_configure path thus causing use after free. BUG: KASAN: use-after-free in of_iommu_configure+0xb4/0x4a4 Read of size 8 at addr ffffff87a2f1acb8 by task kworker/u16:2/153 Workqueue: events_unbound deferred_probe_work_func Call trace: dump_backtrace+0x0/0x33c show_stack+0x18/0x24 dump_stack_lvl+0x16c/0x1e0 print_address_description+0x84/0x39c __kasan_report+0x184/0x308 kasan_report+0x50/0x78 __asan_load8+0xc0/0xc4 of_iommu_configure+0xb4/0x4a4 of_dma_configure_id+0x2fc/0x4d4 platform_dma_configure+0x40/0x5c really_probe+0x1b4/0xb74 driver_probe_device+0x11c/0x228 __device_attach_driver+0x14c/0x304 bus_for_each_drv+0x124/0x1b0 __device_attach+0x25c/0x334 device_initial_probe+0x24/0x34 bus_probe_device+0x78/0x134 deferred_probe_work_func+0x130/0x1a8 process_one_work+0x4c8/0x970 worker_thread+0x5c8/0xaec kthread+0x1f8/0x220 ret_from_fork+0x10/0x18 Allocated by task 1: ____kasan_kmalloc+0xd4/0x114 __kasan_kmalloc+0x10/0x1c kmem_cache_alloc_trace+0xe4/0x3d4 __iommu_probe_device+0x90/0x394 probe_iommu_group+0x70/0x9c bus_for_each_dev+0x11c/0x19c bus_iommu_probe+0xb8/0x7d4 bus_set_iommu+0xcc/0x13c arm_smmu_bus_init+0x44/0x130 [arm_smmu] arm_smmu_device_probe+0xb88/0xc54 [arm_smmu] platform_drv_probe+0xe4/0x13c really_probe+0x2c8/0xb74 driver_probe_device+0x11c/0x228 device_driver_attach+0xf0/0x16c __driver_attach+0x80/0x320 bus_for_each_dev+0x11c/0x19c driver_attach+0x38/0x48 bus_add_driver+0x1dc/0x3a4 driver_register+0x18c/0x244 __platform_driver_register+0x88/0x9c init_module+0x64/0xff4 [arm_smmu] do_one_initcall+0x17c/0x2f0 do_init_module+0xe8/0x378 load_module+0x3f80/0x4a40 __se_sys_finit_module+0x1a0/0x1e4 __arm64_sys_finit_module+0x44/0x58 el0_svc_common+0x100/0x264 do_el0_svc+0x38/0xa4 el0_svc+0x20/0x30 el0_sync_handler+0x68/0xac el0_sync+0x160/0x180 Freed by task 1: kasan_set_track+0x4c/0x84 kasan_set_free_info+0x28/0x4c ____kasan_slab_free+0x120/0x15c __kasan_slab_free+0x18/0x28 slab_free_freelist_hook+0x204/0x2fc kfree+0xfc/0x3a4 __iommu_probe_device+0x284/0x394 probe_iommu_group+0x70/0x9c bus_for_each_dev+0x11c/0x19c bus_iommu_probe+0xb8/0x7d4 bus_set_iommu+0xcc/0x13c arm_smmu_bus_init+0x44/0x130 [arm_smmu] arm_smmu_device_probe+0xb88/0xc54 [arm_smmu] platform_drv_probe+0xe4/0x13c really_probe+0x2c8/0xb74 driver_probe_device+0x11c/0x228 device_driver_attach+0xf0/0x16c __driver_attach+0x80/0x320 bus_for_each_dev+0x11c/0x19c driver_attach+0x38/0x48 bus_add_driver+0x1dc/0x3a4 driver_register+0x18c/0x244 __platform_driver_register+0x88/0x9c init_module+0x64/0xff4 [arm_smmu] do_one_initcall+0x17c/0x2f0 do_init_module+0xe8/0x378 load_module+0x3f80/0x4a40 __se_sys_finit_module+0x1a0/0x1e4 __arm64_sys_finit_module+0x44/0x58 el0_svc_common+0x100/0x264 do_el0_svc+0x38/0xa4 el0_svc+0x20/0x30 el0_sync_handler+0x68/0xac el0_sync+0x160/0x180 Fix this by setting dev->iommu to NULL first and then freeing dev_iommu structure in dev_iommu_free function. Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com> Link: https://lore.kernel.org/r/1643613155-20215-1-git-send-email-quic_vjitta@quicinc.com Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16perf: Fix list corruption in perf_cgroup_switch()Song Liu1-2/+2
commit 5f4e5ce638e6a490b976ade4a40017b40abb2da0 upstream. There's list corruption on cgrp_cpuctx_list. This happens on the following path: perf_cgroup_switch: list_for_each_entry(cgrp_cpuctx_list) cpu_ctx_sched_in ctx_sched_in ctx_pinned_sched_in merge_sched_in perf_cgroup_event_disable: remove the event from the list Use list_for_each_entry_safe() to allow removing an entry during iteration. Fixes: 058fe1c0440e ("perf/core: Make cgroup switch visit only cpuctxs with cgroup events") Signed-off-by: Song Liu <song@kernel.org> Reviewed-by: Rik van Riel <riel@surriel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20220204004057.2961252-1-song@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16arm64: dts: imx8mq: fix lcdif port nodeAlexander Stein1-1/+1
commit 91f6d5f181f6629dd74ab71759fe92d3f4eff966 upstream. The port node does not have a unit-address, remove it. This fixes the warnings: lcd-controller@30320000: 'port' is a required property lcd-controller@30320000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+' Fixes: commit d0081bd02a03 ("arm64: dts: imx8mq: Add NWL MIPI DSI controller") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16MIPS: octeon: Fix missed PTR->PTR_WD conversionThomas Bogendoerfer1-1/+1
commit 50317b636e7184d15126e2dfc83db0963a38d31e upstream. Fixes: fa62f39dc7e2 ("MIPS: Fix build error due to PTR used in more places") Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16scsi: lpfc: Reduce log messages seen after firmware downloadJames Smart2-2/+8
commit 5852ed2a6a39c862c8a3fdf646e1f4e01b91d710 upstream. Messages around firmware download were incorrectly tagged as being related to discovery trace events. Thus, firmware download status ended up dumping the trace log as well as the firmware update message. As there were a couple of log messages in this state, the trace log was dumped multiple times. Resolve this by converting from trace events to SLI events. Link: https://lore.kernel.org/r/20220207180442.72836-1-jsmart2021@gmail.com Reviewed-by: Ewan D. Milne <emilne@redhat.com> Signed-off-by: James Smart <jsmart2021@gmail.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16scsi: lpfc: Remove NVMe support if kernel has NVME_FC disabledJames Smart2-5/+12
commit c80b27cfd93ba9f5161383f798414609e84729f3 upstream. The driver is initiating NVMe PRLIs to determine device NVMe support. This should not be occurring if CONFIG_NVME_FC support is disabled. Correct this by changing the default value for FC4 support. Currently it defaults to FCP and NVMe. With change, when NVME_FC support is not enabled in the kernel, the default value is just FCP. Link: https://lore.kernel.org/r/20220207180516.73052-1-jsmart2021@gmail.com Reviewed-by: Ewan D. Milne <emilne@redhat.com> Signed-off-by: James Smart <jsmart2021@gmail.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16Makefile.extrawarn: Move -Wunaligned-access to W=1Nathan Chancellor1-0/+1
commit 1cf5f151d25fcca94689efd91afa0253621fb33a upstream. -Wunaligned-access is a new warning in clang that is default enabled for arm and arm64 under certain circumstances within the clang frontend (see LLVM commit below). On v5.17-rc2, an ARCH=arm allmodconfig build shows 1284 total/70 unique instances of this warning (most of the instances are in header files), which is quite noisy. To keep a normal build green through CONFIG_WERROR, only show this warning with W=1, which will allow automated build systems to catch new instances of the warning so that the total number can be driven down to zero eventually since catching unaligned accesses at compile time would be generally useful. Cc: stable@vger.kernel.org Link: https://github.com/llvm/llvm-project/commit/35737df4dcd28534bd3090157c224c19b501278a Link: https://github.com/ClangBuiltLinux/linux/issues/1569 Link: https://github.com/ClangBuiltLinux/linux/issues/1576 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16x86/sgx: Silence softlockup detection when releasing large enclavesReinette Chatre1-0/+2
commit 8795359e35bc33bf86b6d0765aa7f37431db3b9c upstream. Vijay reported that the "unclobbered_vdso_oversubscribed" selftest triggers the softlockup detector. Actual SGX systems have 128GB of enclave memory or more. The "unclobbered_vdso_oversubscribed" selftest creates one enclave which consumes all of the enclave memory on the system. Tearing down such a large enclave takes around a minute, most of it in the loop where the EREMOVE instruction is applied to each individual 4k enclave page. Spending one minute in a loop triggers the softlockup detector. Add a cond_resched() to give other tasks a chance to run and placate the softlockup detector. Cc: stable@vger.kernel.org Fixes: 1728ab54b4be ("x86/sgx: Add a page reclaimer") Reported-by: Vijay Dhanraj <vijay.dhanraj@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Tested-by: Jarkko Sakkinen <jarkko@kernel.org> (kselftest as sanity check) Link: https://lkml.kernel.org/r/ced01cac1e75f900251b0a4ae1150aa8ebd295ec.1644345232.git.reinette.chatre@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16hwmon: (dell-smm) Speed up setting of fan speedArmin Wolf1-4/+8
commit c0d79987a0d82671bff374c07f2201f9bdf4aaa2 upstream. When setting the fan speed, i8k_set_fan() calls i8k_get_fan_status(), causing an unnecessary SMM call since from the two users of this function, only i8k_ioctl_unlocked() needs to know the new fan status while dell_smm_write() ignores the new fan status. Since SMM calls can be very slow while also making error reporting difficult for dell_smm_write(), remove the function call from i8k_set_fan() and call it separately in i8k_ioctl_unlocked(). Tested on a Dell Inspiron 3505. Signed-off-by: Armin Wolf <W_Armin@gmx.de> Reviewed-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20211021190531.17379-6-W_Armin@gmx.de Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16bus: mhi: pci_generic: Add mru_default for Cinterion MV31-WSlark Xiao1-0/+1
commit 05daa805a86c831ad9692f6f15e1b877c8f10638 upstream. For default mechanism, product would use default MRU 3500 if they didn't define it. But for Cinterion MV31-W, there is a known issue which MRU 3500 would lead to data connection lost. So we align it with Qualcomm default MRU settings. Link: https://lore.kernel.org/r/20220119102519.5342-1-slark_xiao@163.com [mani: Modified the commit message to reflect Cinterion MV31-W and CCed stable] Fixes: 87693e092bd0 ("bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI") Cc: stable@vger.kernel.org # v5.14 + Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Slark Xiao <slark_xiao@163.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220205135731.157871-3-manivannan.sadhasivam@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-02-16bus: mhi: pci_generic: Add mru_default for Foxconn SDX55Slark Xiao1-0/+1
commit a0572cea8866230ac13da6358c88075f89e99b20 upstream. For default mechanism, product would use default MRU 3500 if they didn't define it. But for Foxconn SDX55, there is a known issue which MRU 3500 would lead to data connection lost. So we align it with Qualcomm default MRU settings. Link: https://lore.kernel.org/r/20220119101213.5008-1-slark_xiao@163.com [mani: Added pci_generic prefix to subject and CCed stable] Fixes: aac426562f56 ("bus: mhi: pci_generic: Introduce Foxconn T99W175 support") Cc: stable@vger.kernel.org # v5.12+ Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Slark Xiao <slark_xiao@163.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220205135731.157871-2-manivannan.sadhasivam@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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