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-rw-r--r--include/asm-mips/atomic.h14
-rw-r--r--include/asm-mips/io.h6
-rw-r--r--include/asm-mips/ip32/crime.h2
-rw-r--r--include/asm-mips/ip32/mace.h44
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h3
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h6
-rw-r--r--include/asm-mips/mach-ip32/mc146818rtc.h7
-rw-r--r--include/asm-mips/mach-jmr3927/ds1742.h (renamed from include/asm-mips/mach-jmr3927/asm/ds1742.h)6
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h3
-rw-r--r--include/asm-mips/mach-pb1x00/pb1550.h7
-rw-r--r--include/asm-mips/mips-boards/seadint.h11
-rw-r--r--include/asm-mips/signal.h21
-rw-r--r--include/linux/ds17287rtc.h67
-rw-r--r--include/linux/ds1742rtc.h53
-rw-r--r--include/linux/pci_ids.h1
15 files changed, 194 insertions, 57 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 2c87b41e69ba..55c37c106ef0 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -231,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
}
/*
- * atomic_sub_if_positive - add integer to atomic variable
+ * atomic_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
* @v: pointer of type atomic_t
*
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
*/
static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
{
@@ -577,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
}
/*
- * atomic64_sub_if_positive - add integer to atomic variable
+ * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
* @v: pointer of type atomic64_t
*
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
*/
static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
{
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3061870b7f6c..d42685747e7d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -459,10 +459,10 @@ __BUILDIO(q, u64)
#define __BUILD_MEMORY_STRING(bwlq, type) \
\
-static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \
- unsigned int count) \
+static inline void writes##bwlq(volatile void __iomem *mem, \
+ const void *addr, unsigned int count) \
{ \
- volatile type *__addr = addr; \
+ const volatile type *__addr = addr; \
\
while (count--) { \
mem_write##bwlq(*__addr, mem); \
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
index 152879bae20f..a13702fafa85 100644
--- a/include/asm-mips/ip32/crime.h
+++ b/include/asm-mips/ip32/crime.h
@@ -154,7 +154,7 @@ struct sgi_crime {
#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
};
-extern struct sgi_crime *crime;
+extern struct sgi_crime __iomem *crime;
#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 5bdc51d85b6c..990082c81f39 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -150,24 +150,34 @@ struct mace_audio {
/* register definitions for parallel port DMA */
struct mace_parport {
-/* 0 - do nothing, 1 - pulse terminal count to the device after buffer is drained */
-#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
-/* Should not cross 4K page boundary */
-#define MACEPAR_CONTEXT_DATALEN_MASK 0xfff00000000
-/* Can be arbitrarily aligned on any byte boundary on output, 64 byte aligned on input */
-#define MACEPAR_CONTEXT_BASEADDR_MASK 0xffffffff
+ /* 0 - do nothing,
+ * 1 - pulse terminal count to the device after buffer is drained */
+#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
+ /* Should not cross 4K page boundary */
+#define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL
+#define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL
+#define MACEPAR_CONTEXT_DATALEN_SHIFT 32
+ /* Can be arbitrarily aligned on any byte boundary on output,
+ * 64 byte aligned on input */
+#define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL
volatile u64 context_a;
volatile u64 context_b;
-#define MACEPAR_CTLSTAT_DIRECTION BIT(0) /* 0 - mem->device, 1 - device->mem */
-#define MACEPAR_CTLSTAT_ENABLE BIT(1) /* 0 - channel frozen, 1 - channel enabled */
-#define MACEPAR_CTLSTAT_RESET BIT(2) /* 0 - channel active, 1 - complete channel reset */
-#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
-#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
- volatile u64 cntlstat; /* Control/Status register */
-#define MACEPAR_DIAG_CTXINUSE BIT(1)
-#define MACEPAR_DIAG_DMACTIVE BIT(2) /* 1 - Dma engine is enabled and processing something */
-#define MACEPAR_DIAG_CTRMASK 0x3ffc /* Counter of bytes left */
- volatile u64 diagnostic; /* RO: diagnostic register */
+ /* 0 - mem->device, 1 - device->mem */
+#define MACEPAR_CTLSTAT_DIRECTION BIT(0)
+ /* 0 - channel frozen, 1 - channel enabled */
+#define MACEPAR_CTLSTAT_ENABLE BIT(1)
+ /* 0 - channel active, 1 - complete channel reset */
+#define MACEPAR_CTLSTAT_RESET BIT(2)
+#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
+#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
+ volatile u64 cntlstat; /* Control/Status register */
+#define MACEPAR_DIAG_CTXINUSE BIT(0)
+ /* 1 - Dma engine is enabled and processing something */
+#define MACEPAR_DIAG_DMACTIVE BIT(1)
+ /* Counter of bytes left */
+#define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL
+#define MACEPAR_DIAG_CTRSHIFT 2
+ volatile u64 diagnostic; /* RO: diagnostic register */
};
/* ISA Control and DMA registers */
@@ -353,6 +363,6 @@ struct sgi_mace {
char _pad6[0x80000 - sizeof(struct mace_isa)];
};
-extern struct sgi_mace *mace;
+extern struct sgi_mace __iomem *mace;
#endif /* __ASM_MACE_H__ */
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 5d894376fc1a..647fdb54cc1d 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
#define BOARD_PC1_INT DB1200_PC1_INT
#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+/* Nand chip select */
+#define NAND_CS 1
+
#endif /* __ASM_DB1200_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index efafe65258b6..7b28b23f91ce 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG 0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
#endif /* __ASM_DB1X00_H */
diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h
index f5d780ff843f..c28ba8d84076 100644
--- a/include/asm-mips/mach-ip32/mc146818rtc.h
+++ b/include/asm-mips/mach-ip32/mc146818rtc.h
@@ -11,7 +11,6 @@
#ifndef __ASM_MACH_IP32_MC146818RTC_H
#define __ASM_MACH_IP32_MC146818RTC_H
-#include <asm/io.h>
#include <asm/ip32/mace.h>
#define RTC_PORT(x) (0x70 + (x))
@@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
mace->isa.rtc[addr << 8] = data;
}
-/* FIXME: Do it right. For now just assume that noone lives in 20th century
- * and no O2 user in 22th century ;-) */
+/*
+ * FIXME: Do it right. For now just assume that noone lives in 20th century
+ * and no O2 user in 22th century ;-)
+ */
#define mc146818_decode_year(year) ((year) + 2000)
#define RTC_ALWAYS_BCD 0
diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h
index 134a4b6c334a..cff6192d4bdb 100644
--- a/include/asm-mips/mach-jmr3927/asm/ds1742.h
+++ b/include/asm-mips/mach-jmr3927/ds1742.h
@@ -5,12 +5,12 @@
*
* Copyright (C) 2003 by Ralf Baechle
*/
-#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H
-#define __ASM_MACH_JMR3927_ASM_DS1742_H
+#ifndef __ASM_MACH_JMR3927_DS1742_H
+#define __ASM_MACH_JMR3927_DS1742_H
#include <asm/jmr3927/jmr3927.h>
#define rtc_read(reg) (jmr3927_nvram_in(addr))
#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg)))
-#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */
+#endif /* __ASM_MACH_JMR3927_DS1742_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 9a3088b19bf3..409d443322c1 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
#define BOARD_PC1_INT PB1200_PC1_INT
#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+/* Nand chip select */
+#define NAND_CS 1
+
#endif /* __ASM_PB1200_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d6088ea96..9578ead11e8a 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG 0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+
#endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index c3dcfcb928b6..365c2a3c64f5 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,9 +20,14 @@
#ifndef _MIPS_SEADINT_H
#define _MIPS_SEADINT_H
-#define SEADINT_UART0 2
-#define SEADINT_UART1 3
+/*
+ * Interrupts 0..7 are used for SEAD CPU interrupts
+ */
+#define MIPSCPU_INT_BASE 0
+
+#define MIPSCPU_INT_UART0 2
+#define MIPSCPU_INT_UART1 3
-extern void seadint_init(void);
+#define MIPSCPU_INT_CPUCTR 7
#endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8ca539e80d87..6fe903e09c62 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -155,27 +155,6 @@ typedef struct sigaltstack {
#ifdef __KERNEL__
#include <asm/sigcontext.h>
-/*
- * The following break codes are or were in use for specific purposes in
- * other MIPS operating systems. Linux/MIPS doesn't use all of them. The
- * unused ones are here as placeholders; we might encounter them in
- * non-Linux/MIPS object files or make use of them in the future.
- */
-#define BRK_USERBP 0 /* User bp (used by debuggers) */
-#define BRK_KERNELBP 1 /* Break in the kernel */
-#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */
-#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */
-#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */
-#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */
-#define BRK_OVERFLOW 6 /* Overflow check */
-#define BRK_DIVZERO 7 /* Divide by zero check */
-#define BRK_RANGE 8 /* Range error check */
-#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */
-#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
-#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
-#define BRK_MULOVF 1023 /* Multiply overflow */
-#define BRK_BUG 512 /* Used by BUG() */
-
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
#endif /* __KERNEL__ */
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 000000000000..c281ba42e28f
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
+/*
+ * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) 2003 Guido Guenther <agx@sigxcpu.org>
+ */
+#ifndef __LINUX_DS17287RTC_H
+#define __LINUX_DS17287RTC_H
+
+#include <linux/rtc.h> /* get the user-level API */
+#include <linux/spinlock.h> /* spinlock_t */
+#include <linux/mc146818rtc.h>
+
+/* Register A */
+#define DS_REGA_DV2 0x40 /* countdown chain */
+#define DS_REGA_DV1 0x20 /* oscillator enable */
+#define DS_REGA_DV0 0x10 /* bank select */
+
+/* bank 1 registers */
+#define DS_B1_MODEL 0x40 /* model number byte */
+#define DS_B1_SN1 0x41 /* serial number byte 1 */
+#define DS_B1_SN2 0x42 /* serial number byte 2 */
+#define DS_B1_SN3 0x43 /* serial number byte 3 */
+#define DS_B1_SN4 0x44 /* serial number byte 4 */
+#define DS_B1_SN5 0x45 /* serial number byte 5 */
+#define DS_B1_SN6 0x46 /* serial number byte 6 */
+#define DS_B1_CRC 0x47 /* CRC byte */
+#define DS_B1_CENTURY 0x48 /* Century byte */
+#define DS_B1_DALARM 0x49 /* date alarm */
+#define DS_B1_XCTRL4A 0x4a /* extendec control register 4a */
+#define DS_B1_XCTRL4B 0x4b /* extendec control register 4b */
+#define DS_B1_RTCADDR2 0x4e /* rtc address 2 */
+#define DS_B1_RTCADDR3 0x4f /* rtc address 3 */
+#define DS_B1_RAMLSB 0x50 /* extended ram LSB */
+#define DS_B1_RAMMSB 0x51 /* extended ram MSB */
+#define DS_B1_RAMDPORT 0x53 /* extended ram data port */
+
+/* register details */
+/* extended control register 4a */
+#define DS_XCTRL4A_VRT2 0x80 /* valid ram and time */
+#define DS_XCTRL4A_INCR 0x40 /* increment progress status */
+#define DS_XCTRL4A_BME 0x20 /* burst mode enable */
+#define DS_XCTRL4A_PAB 0x08 /* power active bar ctrl */
+#define DS_XCTRL4A_RF 0x04 /* ram clear flag */
+#define DS_XCTRL4A_WF 0x02 /* wake up alarm flag */
+#define DS_XCTRL4A_KF 0x01 /* kickstart flag */
+
+/* interrupt causes */
+#define DS_XCTRL4A_IFS (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
+
+/* extended control register 4b */
+#define DS_XCTRL4B_ABE 0x80 /* auxiliary battery enable */
+#define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */
+#define DS_XCTRL4B_CS 0x20 /* crystal select */
+#define DS_XCTRL4B_RCE 0x10 /* ram clear enable */
+#define DS_XCTRL4B_PRS 0x08 /* PAB resec select */
+#define DS_XCTRL4B_RIE 0x04 /* ram clear interrupt enable */
+#define DS_XCTRL4B_WFE 0x02 /* wake up alarm interrupt enable */
+#define DS_XCTRL4B_KFE 0x01 /* kickstart interrupt enable */
+
+/* interrupt enable bits */
+#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
+
+#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 000000000000..a83cdd1cafc9
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
+/*
+ * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
+ *
+ * Copyright (C) 1999-2001 Toshiba Corporation
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * Permission is hereby granted to copy, modify and redistribute this code
+ * in terms of the GNU Library General Public License, Version 2 or later,
+ * at your option.
+ */
+#ifndef __LINUX_DS1742RTC_H
+#define __LINUX_DS1742RTC_H
+
+#include <asm/ds1742.h>
+
+#define RTC_BRAM_SIZE 0x800
+#define RTC_OFFSET 0x7f8
+
+/*
+ * Register summary
+ */
+#define RTC_CONTROL (RTC_OFFSET + 0)
+#define RTC_CENTURY (RTC_OFFSET + 0)
+#define RTC_SECONDS (RTC_OFFSET + 1)
+#define RTC_MINUTES (RTC_OFFSET + 2)
+#define RTC_HOURS (RTC_OFFSET + 3)
+#define RTC_DAY (RTC_OFFSET + 4)
+#define RTC_DATE (RTC_OFFSET + 5)
+#define RTC_MONTH (RTC_OFFSET + 6)
+#define RTC_YEAR (RTC_OFFSET + 7)
+
+#define RTC_CENTURY_MASK 0x3f
+#define RTC_SECONDS_MASK 0x7f
+#define RTC_DAY_MASK 0x07
+
+/*
+ * Bits in the Control/Century register
+ */
+#define RTC_WRITE 0x80
+#define RTC_READ 0x40
+
+/*
+ * Bits in the Seconds register
+ */
+#define RTC_STOP 0x80
+
+/*
+ * Bits in the Day register
+ */
+#define RTC_BATT_FLAG 0x80
+#define RTC_FREQ_TEST 0x40
+
+#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4c1c8fd2925..7b387faedb4d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1401,6 +1401,7 @@
#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
#define PCI_VENDOR_ID_MARVELL 0x11ab
+#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-04 23:14:44 +0300