diff options
Diffstat (limited to 'drivers/pinctrl/pinctrl-at91.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-at91.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 2f797cb7e205..a0824477072b 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -1238,9 +1238,9 @@ static int at91_pinctrl_probe(struct platform_device *pdev) platform_set_drvdata(pdev, info); info->pctl = pinctrl_register(&at91_pinctrl_desc, &pdev->dev, info); - if (!info->pctl) { + if (IS_ERR(info->pctl)) { dev_err(&pdev->dev, "could not register AT91 pinctrl driver\n"); - return -EINVAL; + return PTR_ERR(info->pctl); } /* We will handle a range of GPIO pins */ @@ -1326,6 +1326,21 @@ static void at91_gpio_set(struct gpio_chip *chip, unsigned offset, writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); } +static void at91_gpio_set_multiple(struct gpio_chip *chip, + unsigned long *mask, unsigned long *bits) +{ + struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); + void __iomem *pio = at91_gpio->regbase; + +#define BITS_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) + /* Mask additionally to ngpio as not all GPIO controllers have 32 pins */ + uint32_t set_mask = (*mask & *bits) & BITS_MASK(chip->ngpio); + uint32_t clear_mask = (*mask & ~(*bits)) & BITS_MASK(chip->ngpio); + + writel_relaxed(set_mask, pio + PIO_SODR); + writel_relaxed(clear_mask, pio + PIO_CODR); +} + static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int val) { @@ -1685,6 +1700,7 @@ static struct gpio_chip at91_gpio_template = { .get = at91_gpio_get, .direction_output = at91_gpio_direction_output, .set = at91_gpio_set, + .set_multiple = at91_gpio_set_multiple, .dbg_show = at91_gpio_dbg_show, .can_sleep = false, .ngpio = MAX_NB_GPIO_PER_BANK, |